OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.dg/] [20020919-1.c] - Blame information for rev 823

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 149 jeremybenn
/* Copyright (C) 2002  Free Software Foundation.
2
   by Hans-Peter Nilsson  <hp@axis.com>
3
 
4
   Making sure that asm clobbers conflicting with asm-declared input
5
   operands are detected: ``You may not write a clobber description in a
6
   way that overlaps with an input or output operand''.
7
 
8
   You must be this tall ---> fit two long longs in asm-declared registers
9
   to enter this amusement.  */
10
 
11
/* { dg-do compile { target alpha-*-* cris-*-* i?86-*-* mmix-*-* powerpc*-*-* rs6000-*-* x86_64-*-* } } */
12
/* { dg-options "-O2" } */
13
 
14
/* Constructed examples; input/output (same register), output, input, and
15
   input and output (different registers).  */
16
 
17
/* The long longs are used to test overlap overlap for multi-register
18
   registers.  REG2 and REG4 must be the second halves (defined as
19
   higher-numbered parts) of REG1 and REG3 respectively when two registers
20
   are needed.  */
21
 
22
#if defined (__alpha__)
23
# define REG1 "$1"
24
# define REG2 "$2"
25
#elif defined (__CRIS__)
26
# define REG1 "r10"
27
# define REG2 "r11"
28
# define REG3 "r12"
29
# define REG4 "r13"
30
# define REG5 "r9"
31
#elif defined (__i386__)
32
# define REG1 "%eax"
33
# define REG2 "%edx"
34
/* On Darwin -fpic is on by default, so don't use %ebx. */
35
# define REG3 "%esi"
36
# define REG4 "%edi"
37
#elif defined (__MMIX__)
38
# define REG1 "$8"
39
# define REG2 "$9"
40
#elif defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) \
41
        || defined (__POWERPC__) || defined (PPC) || defined (_IBMR2)
42
# define REG1 "6"
43
# define REG2 "7"
44
# ifndef __powerpc64__
45
#  define REG3 "8"
46
#  define REG4 "9"
47
# endif
48
#elif defined (__x86_64__)
49
# define REG1 "rax"
50
# define REG2 "rdx"
51
#endif
52
 
53
/* For readability of the tests.  */
54
#ifdef REG3
55
# define REG1a REG1
56
# define REG1b REG2
57
# define REG2a REG3
58
# define REG2b REG4
59
#else
60
# define REG1a REG1
61
# define REG1b REG1
62
# define REG2a REG2
63
# define REG2b REG2
64
#endif
65
 
66
/* REG5 is just another reg if there is one; the difference to REG4 is to
67
   keep the original set of registers for CRIS.  */
68
#ifndef REG5
69
#define REG5 REG2b
70
#endif
71
 
72
void *
73
foo (void *p)
74
{
75
  register void *q asm (REG1) = p;
76
  asm ("foo1 %0" : "=r" (q) : "0" (q) : REG1); /* { dg-error "conflict" } */
77
  return q;
78
}
79
 
80
void *
81
nfoo (void *p)
82
{
83
  register void *q asm (REG1) = p;
84
  asm ("foo1 %0" : "=r" (q) : "0" (q) : REG2);
85
  return q;
86
}
87
 
88
long long
89
foolla (long long llp)
90
{
91
  register long long ll asm (REG1a) = llp;
92
  asm ("foo1a %0" : "=r" (ll) : "0" (ll) : REG1a); /* { dg-error "conflict" } */
93
  return ll;
94
}
95
 
96
long long
97
nfoolla (long long llp)
98
{
99
  register long long ll asm (REG1a) = llp;
100
  asm ("foo1a %0" : "=r" (ll) : "0" (ll) : REG2a);
101
  return ll;
102
}
103
 
104
long long
105
foollb (long long llp)
106
{
107
  register long long ll asm (REG1a) = llp;
108
  asm ("foo1b %0" : "=r" (ll) : "0" (ll) : REG1b); /* { dg-error "conflict" } */
109
  return ll;
110
}
111
 
112
void *
113
bar (void *p)
114
{
115
  register void *q asm (REG1);
116
  register void *w asm (REG2) = p;
117
  asm ("bar1 %1,%0" : "=r" (q) : "r" (w) : REG1); /* { dg-error "conflict" } */
118
  return q;
119
}
120
 
121
long long
122
barlla (long long llp)
123
{
124
  register long long ll asm (REG1a);
125
  register long long mm asm (REG2a) = llp;
126
  asm ("bar1a %1,%0" : "=r" (ll) : "r" (mm) : REG1b); /* { dg-error "conflict" } */
127
  return ll;
128
}
129
 
130
long long
131
barllb (long long llp)
132
{
133
  register long long ll asm (REG1a);
134
  register long long mm asm (REG2a) = llp;
135
  asm ("bar1b %1,%0" : "=r" (ll) : "r" (mm) : REG2b); /* { dg-error "conflict" } */
136
  return ll;
137
}
138
 
139
void *
140
foobar (void *p)
141
{
142
  register void *q asm (REG1);
143
  register void *w asm (REG2) = p;
144
  asm ("foobar1 %1,%0" : "=r" (q) : "r" (w) : REG2); /* { dg-error "conflict" } */
145
  return q;
146
}
147
 
148
void *
149
nfoobar (void *p)
150
{
151
  register void *q asm (REG1);
152
  register void *w = p;
153
  asm ("foobar1 %1,%0" : "=r" (q) : "r" (w) : REG2);
154
  return q;
155
}
156
 
157
long long
158
foobarlla (long long llp)
159
{
160
  register long long ll asm (REG1a);
161
  register long long mm asm (REG2a) = llp;
162
  asm ("foobar1a %1,%0" : "=r" (ll) : "r" (mm) : REG1b); /* { dg-error "conflict" } */
163
  return ll;
164
}
165
 
166
long long
167
nfoobarlla (long long llp)
168
{
169
  register long long ll asm (REG1a);
170
  register long long mm = llp;
171
  asm ("foobar1a %1,%0" : "=r" (ll) : "r" (mm) : REG2a);
172
  return ll;
173
}
174
 
175
long long
176
foobarllb (long long llp)
177
{
178
  register long long ll asm (REG1a);
179
  register long long mm asm (REG2a) = llp;
180
  asm ("foobar1b %1,%0" : "=r" (ll) : "r" (mm) : REG2b); /* { dg-error "conflict" } */
181
  return ll;
182
}
183
 
184
long long
185
nfoobarllb (long long llp)
186
{
187
  register long long ll asm (REG1a);
188
  register long long mm = llp;
189
  asm ("foobar1b %1,%0" : "=r" (ll) : "r" (mm) : REG2b);
190
  return ll;
191
}
192
 
193
void *
194
baz (void *p)
195
{
196
  register void *q asm (REG1);
197
  register void *w asm (REG2) = p;
198
  asm ("baz1 %1,%0" : "=r" (q) : "r" (w) : REG1, REG2); /* { dg-error "conflict" } */
199
  return q;
200
}
201
 
202
void *
203
nbaz (void *p)
204
{
205
  register void *q;
206
  register void *w = p;
207
  asm ("baz1 %1,%0" : "=r" (q) : "r" (w) : REG1, REG2);
208
  return q;
209
}
210
 
211
void *
212
nbaz2 (void *p)
213
{
214
  register void *q asm (REG1);
215
  register void *w asm (REG2) = p;
216
  asm ("baz1 %1,%0" : "=r" (q) : "r" (w));
217
  return q;
218
}
219
 
220
long long
221
bazlla (long long llp)
222
{
223
  register long long ll asm (REG1a);
224
  register long long mm asm (REG2a) = llp;
225
  asm ("baz1a %1,%0" : "=r" (ll) : "r" (mm) : REG1a, REG2a); /* { dg-error "conflict" } */
226
  return ll;
227
}
228
 
229
long long
230
bazllb (long long llp)
231
{
232
  register long long ll asm (REG1a);
233
  register long long mm asm (REG2a) = llp;
234
  asm ("baz2a %1,%0" : "=r" (ll) : "r" (mm) : REG1b, REG2b); /* { dg-error "conflict" } */
235
  return ll;
236
}
237
 
238
/* Real-world example of bug.  */
239
 
240
struct stat;
241
int
242
_dl_stat (const char *file_name, struct stat *buf)
243
{
244
  register long a asm (REG1) = (long) file_name;
245
  register long b asm (REG2) = (long) buf;
246
 
247
  asm volatile ("movu.w %1,$r9\n\tbreak 13" : "=r" (a) : "g" (106), "0" (a), "r" (b) : REG1, REG5); /* { dg-error "conflict" } */
248
  if (a >= 0)
249
    return (int) a;
250
  return (int) -1;
251
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.