URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.dg/] [pragma-isr.c] - Blame information for rev 853

Go to most recent revision | Details | Compare with Previous | View Log


/* { dg-do compile { target h8300-*-* sh-*-* sh[1234ble]*-*-*} } */
/* { dg-options "-O3" } */
/* Test case will check whether rte is generated for two ISRs*/
extern void foo();
#pragma interrupt
void  isr1(void)
{
                foo();
}
 
#pragma interrupt
void  isr2(void)
{
                foo();
}
 
/* { dg-final { scan-assembler-times "rte" 2} } */

Line No.	Rev	Author	Line
1	149	jeremybenn	`/* { dg-do compile { target h8300-- sh-- sh[1234ble]--} } /`
2			`/* { dg-options "-O3" } */`
3			`/* Test case will check whether rte is generated for two ISRs*/`
4			`extern void foo();`
5			`#pragma interrupt`
6			`void isr1(void)`
7			`{`
8			`foo();`
9			`}`
10
11			`#pragma interrupt`
12			`void isr2(void)`
13			`{`
14			`foo();`
15			`}`
16
17			`/* { dg-final { scan-assembler-times "rte" 2} } */`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.dg/] [pragma-isr.c] - Blame information for rev 853