OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.target/] [i386/] [signbit-2.c] - Blame information for rev 816

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 149 jeremybenn
/* PR optimization/8746 */
2
/* { dg-do run { target i?86-*-* x86_64-*-* } } */
3
/* { dg-require-effective-target ilp32 } */
4
/* { dg-options "-O1 -mtune=i586" } */
5
 
6
extern void abort (void);
7
 
8
unsigned short r0;
9
 
10
int foo(int x)
11
{
12
  unsigned short r = x&0xf000;
13
 
14
  if (!(r&0x8000))
15
  {
16
    r0 = r;
17
    return 0;
18
  }
19
  else
20
    return 1;
21
}
22
 
23
int main(void)
24
{
25
  if (foo(0x8000) != 1)
26
    abort();
27
 
28
   return 0;
29
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.