OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.target/] [i386/] [sse-20.c] - Blame information for rev 822

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 149 jeremybenn
/* PR target/13685 */
2
/* { dg-options "-Os -msse" } */
3
 
4
typedef float __m128 __attribute__ ((vector_size (16)));
5
typedef int __m64 __attribute__ ((vector_size (8)));
6
 
7
int puts (const char *s);
8
void foo (__m128 *, __m64 *, int);
9
 
10
int main (void)
11
{
12
  foo (0, 0, 0);
13
  return 0;
14
}
15
 
16
void foo (__m128 *dst, __m64 *src, int n)
17
{
18
  __m128 xmm0 = { 0 };
19
  while (n > 64)
20
    {
21
      puts ("");
22
      xmm0 = __builtin_ia32_cvtpi2ps (xmm0, *src);
23
      *dst = xmm0;
24
      n --;
25
    }
26
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.