OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec_check.h] - Blame information for rev 816

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 149 jeremybenn
/* A runtime check for AltiVec capability.  */
2
/* Contributed by Ziemowit Laski  <zlaski@apple.com>  */
3
 
4
#include <signal.h>
5
extern void exit (int);
6
extern void abort (void);
7
 
8
void
9
sig_ill_handler (int sig)
10
{
11
    exit (0);
12
}
13
 
14
void altivec_check(void) {
15
 
16
  /* Exit on systems without AltiVec.  */
17
  signal (SIGILL, sig_ill_handler);
18
#ifdef __MACH__
19
  asm volatile ("vor v0,v0,v0");
20
#else
21
  asm volatile ("vor 0,0,0");
22
#endif
23
  signal (SIGILL, SIG_DFL);
24
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.