OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [gdb/] [mn10300-tdep.h] - Blame information for rev 857

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Target-dependent interface for Matsushita MN10300 for GDB, the GNU debugger.
2
 
3
   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4
   2007, 2008 Free Software Foundation, Inc.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
enum {
22
  E_D0_REGNUM = 0,
23
  E_D1_REGNUM = 1,
24
  E_D2_REGNUM = 2,
25
  E_D3_REGNUM = 3,
26
  E_A0_REGNUM = 4,
27
  E_A1_REGNUM = 5,
28
  E_A2_REGNUM = 6,
29
  E_A3_REGNUM = 7,
30
  E_SP_REGNUM = 8,
31
  E_PC_REGNUM = 9,
32
  E_MDR_REGNUM = 10,
33
  E_PSW_REGNUM = 11,
34
  E_LIR_REGNUM = 12,
35
  E_LAR_REGNUM = 13,
36
  E_MDRQ_REGNUM = 14,
37
  E_E0_REGNUM = 15,
38
  E_E1_REGNUM = 16,
39
  E_E2_REGNUM = 17,
40
  E_E3_REGNUM = 18,
41
  E_E4_REGNUM = 19,
42
  E_E5_REGNUM = 20,
43
  E_E6_REGNUM = 21,
44
  E_E7_REGNUM = 22,
45
  E_E8_REGNUM = 23,
46
  E_E9_REGNUM = 24,
47
  E_E10_REGNUM = 25,
48
  E_MCRH_REGNUM = 26,
49
  E_MCRL_REGNUM = 27,
50
  E_MCVF_REGNUM = 28,
51
  E_FPCR_REGNUM = 29,
52
  E_FS0_REGNUM = 32
53
};
54
 
55
enum movm_register_bits {
56
  movm_exother_bit = 0x01,
57
  movm_exreg1_bit  = 0x02,
58
  movm_exreg0_bit  = 0x04,
59
  movm_other_bit   = 0x08,
60
  movm_a3_bit      = 0x10,
61
  movm_a2_bit      = 0x20,
62
  movm_d3_bit      = 0x40,
63
  movm_d2_bit      = 0x80
64
};
65
 
66
/* Values for frame_info.status */
67
 
68
enum frame_kind {
69
  MY_FRAME_IN_SP = 0x1,
70
  MY_FRAME_IN_FP = 0x2,
71
  NO_MORE_FRAMES = 0x4
72
};
73
 
74
/* mn10300 private data */
75
struct gdbarch_tdep
76
{
77
  int am33_mode;
78
};
79
 
80
#define AM33_MODE(gdbarch) (gdbarch_tdep (gdbarch)->am33_mode)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.