OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [gdb/] [regformats/] [mips-linux.dat] - Blame information for rev 840

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
# DO NOT EDIT: generated from mips-linux.xml
2
name:mips_linux
3
expedite:r29,pc
4
32:r0
5
32:r1
6
32:r2
7
32:r3
8
32:r4
9
32:r5
10
32:r6
11
32:r7
12
32:r8
13
32:r9
14
32:r10
15
32:r11
16
32:r12
17
32:r13
18
32:r14
19
32:r15
20
32:r16
21
32:r17
22
32:r18
23
32:r19
24
32:r20
25
32:r21
26
32:r22
27
32:r23
28
32:r24
29
32:r25
30
32:r26
31
32:r27
32
32:r28
33
32:r29
34
32:r30
35
32:r31
36
32:status
37
32:lo
38
32:hi
39
32:badvaddr
40
32:cause
41
32:pc
42
32:f0
43
32:f1
44
32:f2
45
32:f3
46
32:f4
47
32:f5
48
32:f6
49
32:f7
50
32:f8
51
32:f9
52
32:f10
53
32:f11
54
32:f12
55
32:f13
56
32:f14
57
32:f15
58
32:f16
59
32:f17
60
32:f18
61
32:f19
62
32:f20
63
32:f21
64
32:f22
65
32:f23
66
32:f24
67
32:f25
68
32:f26
69
32:f27
70
32:f28
71
32:f29
72
32:f30
73
32:f31
74
32:fcsr
75
32:fir
76
32:restart

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.