OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [iq2000/] [sim-if.c] - Blame information for rev 827

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Main simulator entry points specific to the IQ2000.
2
   Copyright (C) 2000, 2007, 2008 Free Software Foundation, Inc.
3
   Contributed by Cygnus Solutions.
4
 
5
This file is part of the GNU simulators.
6
 
7
This program is free software; you can redistribute it and/or modify
8
it under the terms of the GNU General Public License as published by
9
the Free Software Foundation; either version 3 of the License, or
10
(at your option) any later version.
11
 
12
This program is distributed in the hope that it will be useful,
13
but WITHOUT ANY WARRANTY; without even the implied warranty of
14
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
GNU General Public License for more details.
16
 
17
You should have received a copy of the GNU General Public License
18
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
 
20
#include "sim-main.h"
21
#ifdef HAVE_STDLIB_H
22
#include <stdlib.h>
23
#endif
24
#include "sim-options.h"
25
#include "libiberty.h"
26
#include "bfd.h"
27
 
28
static void free_state (SIM_DESC);
29
 
30
/* Records simulator descriptor so utilities like iq2000_dump_regs can be
31
   called from gdb.  */
32
SIM_DESC current_state;
33
 
34
/* Cover function for sim_cgen_disassemble_insn.  */
35
 
36
void
37
iq2000bf_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn,
38
                          const ARGBUF *abuf, IADDR pc, char *buf)
39
{
40
  sim_cgen_disassemble_insn(cpu, insn, abuf, pc, buf);
41
}
42
 
43
/* Cover function of sim_state_free to free the cpu buffers as well.  */
44
 
45
static void
46
free_state (SIM_DESC sd)
47
{
48
  if (STATE_MODULES (sd) != NULL)
49
    sim_module_uninstall (sd);
50
  sim_cpu_free_all (sd);
51
  sim_state_free (sd);
52
}
53
 
54
/* Create an instance of the simulator.  */
55
 
56
SIM_DESC
57
sim_open (kind, callback, abfd, argv)
58
     SIM_OPEN_KIND kind;
59
     host_callback *callback;
60
     struct bfd *abfd;
61
     char **argv;
62
{
63
  char c;
64
  int i;
65
  SIM_DESC sd = sim_state_alloc (kind, callback);
66
 
67
  /* The cpu data is kept in a separately allocated chunk of memory.  */
68
  if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
69
    {
70
      free_state (sd);
71
      return 0;
72
    }
73
 
74
#if 0 /* FIXME: pc is in mach-specific struct */
75
  /* FIXME: watchpoints code shouldn't need this */
76
  {
77
    SIM_CPU *current_cpu = STATE_CPU (sd, 0);
78
    STATE_WATCHPOINTS (sd)->pc = &(PC);
79
    STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
80
  }
81
#endif
82
 
83
  if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
84
    {
85
      free_state (sd);
86
      return 0;
87
    }
88
 
89
#if 0 /* FIXME: 'twould be nice if we could do this */
90
  /* These options override any module options.
91
     Obviously ambiguity should be avoided, however the caller may wish to
92
     augment the meaning of an option.  */
93
  if (extra_options != NULL)
94
    sim_add_option_table (sd, extra_options);
95
#endif
96
 
97
  /* getopt will print the error message so we just have to exit if this fails.
98
     FIXME: Hmmm...  in the case of gdb we need getopt to call
99
     print_filtered.  */
100
  if (sim_parse_args (sd, argv) != SIM_RC_OK)
101
    {
102
      free_state (sd);
103
      return 0;
104
    }
105
 
106
  /* Allocate core managed memory.  */
107
  sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_INSN_VALUE, IQ2000_INSN_MEM_SIZE);
108
  sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_DATA_VALUE, IQ2000_DATA_MEM_SIZE);
109
 
110
  /* check for/establish the reference program image */
111
  if (sim_analyze_program (sd,
112
                           (STATE_PROG_ARGV (sd) != NULL
113
                            ? *STATE_PROG_ARGV (sd)
114
                            : NULL),
115
                           abfd) != SIM_RC_OK)
116
    {
117
      free_state (sd);
118
      return 0;
119
    }
120
 
121
  /* Establish any remaining configuration options.  */
122
  if (sim_config (sd) != SIM_RC_OK)
123
    {
124
      free_state (sd);
125
      return 0;
126
    }
127
 
128
  if (sim_post_argv_init (sd) != SIM_RC_OK)
129
    {
130
      free_state (sd);
131
      return 0;
132
    }
133
 
134
  /* Open a copy of the cpu descriptor table.  */
135
  {
136
    CGEN_CPU_DESC cd = iq2000_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
137
                                              CGEN_ENDIAN_BIG);
138
 
139
    for (i = 0; i < MAX_NR_PROCESSORS; ++i)
140
      {
141
        SIM_CPU *cpu = STATE_CPU (sd, i);
142
        CPU_CPU_DESC (cpu) = cd;
143
        CPU_DISASSEMBLER (cpu) = iq2000bf_disassemble_insn;
144
      }
145
    iq2000_cgen_init_dis (cd);
146
  }
147
 
148
  /* Initialize various cgen things not done by common framework.
149
     Must be done after iq2000_cgen_cpu_open.  */
150
  cgen_init (sd);
151
 
152
  /* Store in a global so things like sparc32_dump_regs can be invoked
153
     from the gdb command line.  */
154
  current_state = sd;
155
 
156
  return sd;
157
}
158
 
159
void
160
sim_close (sd, quitting)
161
     SIM_DESC sd;
162
     int quitting;
163
{
164
  iq2000_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
165
  sim_module_uninstall (sd);
166
}
167
 
168
SIM_RC
169
sim_create_inferior (sd, abfd, argv, envp)
170
     SIM_DESC sd;
171
     struct bfd *abfd;
172
     char **argv;
173
     char **envp;
174
{
175
  SIM_CPU *current_cpu = STATE_CPU (sd, 0);
176
  SIM_ADDR addr;
177
 
178
  if (abfd != NULL)
179
    addr = bfd_get_start_address (abfd);
180
  else
181
    addr = CPU2INSN(0);
182
  sim_pc_set (current_cpu, addr);
183
 
184
#if 0
185
  STATE_ARGV (sd) = sim_copy_argv (argv);
186
  STATE_ENVP (sd) = sim_copy_argv (envp);
187
#endif
188
 
189
  return SIM_RC_OK;
190
}
191
 
192
void
193
sim_do_command (sd, cmd)
194
     SIM_DESC sd;
195
     char *cmd;
196
{
197
  if (sim_args_command (sd, cmd) != SIM_RC_OK)
198
    sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
199
}
200
 
201
 
202
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.