OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [m32r/] [configure.ac] - Blame information for rev 816

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
dnl Process this file with autoconf to produce a configure script.
2
AC_PREREQ(2.59)dnl
3
AC_INIT(Makefile.in)
4
AC_CONFIG_HEADER(config.h:config.in)
5
 
6
sinclude(../common/aclocal.m4)
7
 
8
# Bugs in autoconf 2.59 break the call to SIM_AC_COMMON, hack around
9
# it by inlining the macro's contents.
10
sinclude(../common/common.m4)
11
 
12
SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
13
SIM_AC_OPTION_ALIGNMENT(STRICT_ALIGNMENT)
14
SIM_AC_OPTION_HOSTENDIAN
15
SIM_AC_OPTION_SCACHE(16384)
16
SIM_AC_OPTION_DEFAULT_MODEL(m32r/d)
17
SIM_AC_OPTION_ENVIRONMENT
18
SIM_AC_OPTION_INLINE()
19
SIM_AC_OPTION_CGEN_MAINT
20
 
21
  case "${target_alias}" in
22
  m32r*-linux*)
23
    traps_obj=traps-linux.o
24
    sim_extra_cflags="-DM32R_LINUX"
25
    ;;
26
  *)
27
    traps_obj=traps.o
28
    sim_extra_cflags="-DM32R_ELF"
29
    ;;
30
  esac
31
AC_SUBST(traps_obj)
32
AC_SUBST(sim_extra_cflags)
33
 
34
 
35
SIM_AC_OUTPUT

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.