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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [m68hc11/] [interrupts.h] - Blame information for rev 856

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1 24 jeremybenn
/* interrupts.h -- 68HC11 Interrupts Emulation
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   Copyright 1999, 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
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   Written by Stephane Carrez (stcarrez@worldnet.fr)
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This file is part of GDB, GAS, and the GNU binutils.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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#ifndef _M6811_SIM_INTERRUPTS_H
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#define _M6811_SIM_INTERRUPTS_H
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/* Definition of 68HC11 interrupts.  These enum are used as an index
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   in the interrupt table.  */
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enum M6811_INT
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{
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  M6811_INT_RESERVED1 = 0,
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  M6811_INT_RESERVED2,
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  M6811_INT_RESERVED3,
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  M6811_INT_RESERVED4,
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  M6811_INT_RESERVED5,
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  M6811_INT_RESERVED6,
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  M6811_INT_RESERVED7,
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  M6811_INT_RESERVED8,
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  M6811_INT_RESERVED9,
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  M6811_INT_RESERVED10,
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  M6811_INT_RESERVED11,
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  M6811_INT_SCI,
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  M6811_INT_SPI,
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  M6811_INT_AINPUT,
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  M6811_INT_AOVERFLOW,
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  M6811_INT_TCTN,
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  M6811_INT_OUTCMP5,
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  M6811_INT_OUTCMP4,
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  M6811_INT_OUTCMP3,
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  M6811_INT_OUTCMP2,
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  M6811_INT_OUTCMP1,
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  M6811_INT_INCMP3,
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  M6811_INT_INCMP2,
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  M6811_INT_INCMP1,
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  M6811_INT_RT,
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  M6811_INT_IRQ,
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  M6811_INT_XIRQ,
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  M6811_INT_SWI,
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  M6811_INT_ILLEGAL,
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  M6811_INT_COPRESET,
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  M6811_INT_COPFAIL,
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  M6811_INT_RESET,
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  M6811_INT_NUMBER
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};
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/* Structure to describe how to recognize an interrupt in the
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   68hc11 IO regs.  */
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struct interrupt_def
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{
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  enum M6811_INT   int_number;
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  unsigned char    int_paddr;
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  unsigned char    int_mask;
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  unsigned char    enable_paddr;
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  unsigned char    enabled_mask;
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};
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#define MAX_INT_HISTORY 64
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/* Structure used to keep track of interrupt history.
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   This is used to understand in which order interrupts were
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   raised and when.  */
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struct interrupt_history
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{
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  enum M6811_INT   type;
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  /* CPU cycle when interrupt handler is called.  */
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  signed64         taken_cycle;
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  /* CPU cycle when the interrupt is first raised by the device.  */
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  signed64         raised_cycle;
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};
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#define SIM_STOP_WHEN_RAISED 1
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#define SIM_STOP_WHEN_TAKEN  2
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/* Information and control of pending interrupts.  */
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struct interrupt
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{
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  /* CPU cycle when the interrupt is raised by the device.  */
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  signed64         cpu_cycle;
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  /* Number of times the interrupt was raised.  */
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  unsigned long    raised_count;
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  /* Controls whether we must stop the simulator.  */
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  int              stop_mode;
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};
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/* Management of 68HC11 interrupts:
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    - We use a table of 'interrupt_def' to describe the interrupts that must be
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      raised depending on IO register flags (enable and present flags).
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    - We keep a mask of pending interrupts.  This mask is refreshed by
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      calling 'interrupts_update_pending'.  It must be refreshed each time
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      an IO register is changed.
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    - 'interrupts_process' must be called after each insn. It has two purposes:
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      first it maintains a min/max count of CPU cycles between which interrupts
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      are masked; second it checks for pending interrupts and raise one if
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      interrupts are enabled.  */
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struct interrupts {
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  struct _sim_cpu   *cpu;
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  /* Mask of current pending interrupts.  */
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  unsigned long     pending_mask;
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  /* Address of vector table.  This is set depending on the
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     68hc11 init mode.  */
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  uint16            vectors_addr;
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  /* Priority order of interrupts.  This is controlled by setting the HPRIO
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     IO register.  */
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  enum M6811_INT    interrupt_order[M6811_INT_NUMBER];
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  struct interrupt  interrupts[M6811_INT_NUMBER];
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  /* Simulator statistics to report useful debug information to users.  */
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  /* - Max/Min number of CPU cycles executed with interrupts masked.  */
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  signed64          start_mask_cycle;
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  signed64          min_mask_cycles;
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  signed64          max_mask_cycles;
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  signed64          last_mask_cycles;
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  /* - Same for XIRQ.  */
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  signed64          xirq_start_mask_cycle;
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  signed64          xirq_min_mask_cycles;
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  signed64          xirq_max_mask_cycles;
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  signed64          xirq_last_mask_cycles;
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  /* - Total number of interrupts raised.  */
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  unsigned long     nb_interrupts_raised;
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  /* Interrupt history to help understand which interrupts
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     were raised recently and in which order.  */
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  int               history_index;
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  struct interrupt_history interrupts_history[MAX_INT_HISTORY];
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};
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extern void interrupts_initialize     (SIM_DESC sd, struct _sim_cpu* cpu);
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extern void interrupts_reset          (struct interrupts* interrupts);
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extern void interrupts_update_pending (struct interrupts* interrupts);
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extern int  interrupts_get_current    (struct interrupts* interrupts);
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extern int  interrupts_process        (struct interrupts* interrupts);
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extern void interrupts_raise          (struct interrupts* interrupts,
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                                       enum M6811_INT number);
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extern void interrupts_info           (SIM_DESC sd,
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                                       struct interrupts* interrupts);
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#endif

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