OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [ppc/] [psim.h] - Blame information for rev 840

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/*  This file is part of the program psim.
2
 
3
    Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
4
 
5
    This program is free software; you can redistribute it and/or modify
6
    it under the terms of the GNU General Public License as published by
7
    the Free Software Foundation; either version 2 of the License, or
8
    (at your option) any later version.
9
 
10
    This program is distributed in the hope that it will be useful,
11
    but WITHOUT ANY WARRANTY; without even the implied warranty of
12
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
    GNU General Public License for more details.
14
 
15
    You should have received a copy of the GNU General Public License
16
    along with this program; if not, write to the Free Software
17
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
 
19
    */
20
 
21
 
22
#ifndef _PSIM_H_
23
#define _PSIM_H_
24
 
25
#include "basics.h"
26
 
27
 
28
/* the system object */
29
/* typedef struct _psim psim; */
30
/* typedef struct _device device; */
31
 
32
/* when the `system' stops, find out why.  FIXME - at this point this
33
   is really a bit puzzling.  After all, how can there be a status
34
   when there several processors involved */
35
 
36
typedef struct _psim_status {
37
  int cpu_nr;
38
  stop_reason reason;
39
  int signal;
40
  unsigned_word program_counter;
41
} psim_status;
42
 
43
 
44
/* create an initial device tree and then populate it using
45
   information obtained from either the command line or a file */
46
 
47
extern device *psim_tree
48
(void);
49
 
50
extern char **psim_options
51
(device *root,
52
 char **argv);
53
 
54
extern void psim_command
55
(device *root,
56
 char **argv);
57
 
58
 
59
extern void psim_merge_device_file
60
(device *root,
61
 const char *file_name);
62
 
63
extern void psim_usage
64
(int verbose);
65
 
66
 
67
/* create a new simulator from the device tree */
68
 
69
extern psim *psim_create
70
(const char *file_name,
71
 device *root);
72
 
73
 
74
/* Given the created simulator (re) initialize it */
75
 
76
extern void psim_init
77
(psim *system);
78
 
79
extern void psim_stack
80
(psim *system,
81
 char **argv,
82
 char **envp);
83
 
84
 
85
/* Run/stop the system */
86
 
87
extern void psim_step
88
(psim *system);
89
 
90
extern void psim_run
91
(psim *system);
92
 
93
extern void psim_restart
94
(psim *system,
95
 int cpu_nr);
96
 
97
extern void psim_set_halt_and_restart
98
(psim *system,
99
 void *halt_jmp_buf,
100
 void *restart_jmp_buf);
101
 
102
extern void psim_clear_halt_and_restart
103
(psim *system);
104
 
105
extern void psim_stop
106
(psim *system);
107
 
108
extern void psim_halt
109
(psim *system,
110
 int cpu_nr,
111
 stop_reason reason,
112
 int signal);
113
 
114
extern int psim_last_cpu
115
(psim *system);
116
 
117
extern int psim_nr_cpus
118
(psim *system);
119
 
120
 
121
extern psim_status psim_get_status
122
(psim *system);
123
 
124
 
125
/* reveal the internals of the simulation.  Grant access to the
126
   processor (cpu) device tree (device) and events (event_queue). */
127
 
128
extern cpu *psim_cpu
129
(psim *system,
130
 int cpu_nr);
131
 
132
extern device *psim_device
133
(psim *system,
134
 const char *path);
135
 
136
extern event_queue *psim_event_queue
137
(psim *system);
138
 
139
 
140
 
141
/* Manipulate the state (registers or memory) of a processor within
142
   the system.  In the case of memory, the read/write is performed
143
   using the specified processors address translation tables.
144
 
145
   Where applicable, WHICH_CPU == -1 indicates all processors and
146
   WHICH_CPU == <nr_cpus> indicates the `current' processor.
147
 
148
   The register functions return the size of the register, or 0 if the
149
   register's name is not recognized.  */
150
 
151
extern int psim_read_register
152
(psim *system,
153
 int which_cpu,
154
 void *host_ordered_buf,
155
 const char reg[],
156
 transfer_mode mode);
157
 
158
extern int psim_write_register
159
(psim *system,
160
 int which_cpu,
161
 const void *buf,
162
 const char reg[],
163
 transfer_mode mode);
164
 
165
extern unsigned psim_read_memory
166
(psim *system,
167
 int which_cpu,
168
 void *buf,
169
 unsigned_word vaddr,
170
 unsigned len);
171
 
172
extern unsigned psim_write_memory
173
(psim *system,
174
 int which_cpu,
175
 const void *buf,
176
 unsigned_word vaddr,
177
 unsigned len,
178
 int violate_read_only_section);
179
 
180
extern void psim_print_info
181
(psim *system,
182
 int verbose);
183
 
184
#endif /* _PSIM_H_ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.