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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [bcvlr.cgs] - Blame information for rev 840

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Line No. Rev Author Line
1 24 jeremybenn
# frv testcase for bcvlr $ICCi,$ccond,$hint
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# mach: all
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4
        .include "testutils.inc"
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6
        start
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        .global bcvlr
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bcvlr:
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        ; ccond is true
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        set_spr_immed   128,lcr
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        set_spr_addr    bad,lr
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        set_icc         0x0 0
14
        bcvlr           icc0,0,0
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16
        set_spr_addr    bad,lr
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        set_icc         0x1 1
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        bcvlr           icc1,0,1
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        set_spr_addr    ok3,lr
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        set_icc         0x2 2
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        bcvlr           icc2,0,2
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        fail
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ok3:
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        set_spr_addr    ok4,lr
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        set_icc         0x3 3
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        bcvlr           icc3,0,3
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        fail
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ok4:
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        set_spr_addr    bad,lr
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        set_icc         0x4 0
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        bcvlr           icc0,0,0
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34
        set_spr_addr    bad,lr
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        set_icc         0x5 1
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        bcvlr           icc1,0,1
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38
        set_spr_addr    ok7,lr
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        set_icc         0x6 2
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        bcvlr           icc2,0,2
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        fail
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ok7:
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        set_spr_addr    ok8,lr
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        set_icc         0x7 3
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        bcvlr           icc3,0,3
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        fail
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ok8:
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        set_spr_addr    bad,lr
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        set_icc         0x8 0
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        bcvlr           icc0,0,0
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52
        set_spr_addr    bad,lr
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        set_icc         0x9 1
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        bcvlr           icc1,0,1
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56
        set_spr_addr    okb,lr
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        set_icc         0xa 2
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        bcvlr           icc2,0,2
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        fail
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okb:
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        set_spr_addr    okc,lr
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        set_icc         0xb 3
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        bcvlr           icc3,0,3
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        fail
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okc:
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        set_spr_addr    bad,lr
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        set_icc         0xc 0
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        bcvlr           icc0,0,0
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70
        set_spr_addr    bad,lr
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        set_icc         0xd 1
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        bcvlr           icc1,0,1
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74
        set_spr_addr    okf,lr
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        set_icc         0xe 2
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        bcvlr           icc2,0,2
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        fail
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okf:
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        set_spr_addr    okg,lr
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        set_icc         0xf 3
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        bcvlr           icc3,0,3
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        fail
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okg:
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        ; ccond is true
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        set_spr_immed   1,lcr
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        set_spr_addr    bad,lr
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        set_icc         0x0 0
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        bcvlr           icc0,1,0
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        set_spr_immed   1,lcr
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        set_spr_addr    bad,lr
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        set_icc         0x1 1
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        bcvlr           icc1,1,1
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96
        set_spr_immed   1,lcr
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        set_spr_addr    okj,lr
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        set_icc         0x2 2
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        bcvlr           icc2,1,2
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        fail
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okj:
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        set_spr_immed   1,lcr
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        set_spr_addr    okk,lr
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        set_icc         0x3 3
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        bcvlr           icc3,1,3
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        fail
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okk:
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        set_spr_immed   1,lcr
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        set_spr_addr    bad,lr
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        set_icc         0x4 0
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        bcvlr           icc0,1,0
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113
        set_spr_immed   1,lcr
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        set_spr_addr    bad,lr
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        set_icc         0x5 1
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        bcvlr           icc1,1,1
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118
        set_spr_immed   1,lcr
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        set_spr_addr    okn,lr
120
        set_icc         0x6 2
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        bcvlr           icc2,1,2
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        fail
123
okn:
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        set_spr_immed   1,lcr
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        set_spr_addr    oko,lr
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        set_icc         0x7 3
127
        bcvlr           icc3,1,3
128
        fail
129
oko:
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        set_spr_immed   1,lcr
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        set_spr_addr    bad,lr
132
        set_icc         0x8 0
133
        bcvlr           icc0,1,0
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135
        set_spr_immed   1,lcr
136
        set_spr_addr    bad,lr
137
        set_icc         0x9 1
138
        bcvlr           icc1,1,1
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140
        set_spr_immed   1,lcr
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        set_spr_addr    okr,lr
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        set_icc         0xa 2
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        bcvlr           icc2,1,2
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        fail
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okr:
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        set_spr_immed   1,lcr
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        set_spr_addr    oks,lr
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        set_icc         0xb 3
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        bcvlr           icc3,1,3
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        fail
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oks:
152
        set_spr_immed   1,lcr
153
        set_spr_addr    bad,lr
154
        set_icc         0xc 0
155
        bcvlr           icc0,1,0
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157
        set_spr_immed   1,lcr
158
        set_spr_addr    bad,lr
159
        set_icc         0xd 1
160
        bcvlr           icc1,1,1
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162
        set_spr_immed   1,lcr
163
        set_spr_addr    okv,lr
164
        set_icc         0xe 2
165
        bcvlr           icc2,1,2
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        fail
167
okv:
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        set_spr_immed   1,lcr
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        set_spr_addr    okw,lr
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        set_icc         0xf 3
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        bcvlr           icc3,1,3
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        fail
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okw:
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        ; ccond is false
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        set_spr_immed   128,lcr
176
        set_spr_addr    bad,lr
177
        set_icc         0x0 0
178
        bcvlr           icc0,1,0
179
 
180
        set_icc         0x1 1
181
        bcvlr           icc1,1,1
182
 
183
        set_icc         0x2 2
184
        bcvlr           icc2,1,2
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186
        set_icc         0x3 3
187
        bcvlr           icc3,1,3
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189
        set_icc         0x4 0
190
        bcvlr           icc0,1,0
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192
        set_icc         0x5 1
193
        bcvlr           icc1,1,1
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195
        set_icc         0x6 2
196
        bcvlr           icc2,1,2
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198
        set_icc         0x7 3
199
        bcvlr           icc3,1,3
200
 
201
        set_icc         0x8 0
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        bcvlr           icc0,1,0
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204
        set_icc         0x9 1
205
        bcvlr           icc1,1,1
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207
        set_icc         0xa 2
208
        bcvlr           icc2,1,2
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210
        set_icc         0xb 3
211
        bcvlr           icc3,1,3
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213
        set_icc         0xc 0
214
        bcvlr           icc0,1,0
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        set_icc         0xd 1
217
        bcvlr           icc1,1,1
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219
        set_icc         0xe 2
220
        bcvlr           icc2,1,2
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222
        set_icc         0xf 3
223
        bcvlr           icc3,1,3
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225
        ; ccond is false
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        set_spr_immed   1,lcr
227
        set_spr_addr    bad,lr
228
        set_icc         0x0 0
229
        bcvlr           icc0,0,0
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231
        set_spr_immed   1,lcr
232
        set_icc         0x1 1
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        bcvlr           icc1,0,1
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235
        set_spr_immed   1,lcr
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        set_icc         0x2 2
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        bcvlr           icc2,0,2
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239
        set_spr_immed   1,lcr
240
        set_icc         0x3 3
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        bcvlr           icc3,0,3
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243
        set_spr_immed   1,lcr
244
        set_icc         0x4 0
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        bcvlr           icc0,0,0
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247
        set_spr_immed   1,lcr
248
        set_icc         0x5 1
249
        bcvlr           icc1,0,1
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251
        set_spr_immed   1,lcr
252
        set_icc         0x6 2
253
        bcvlr           icc2,0,2
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255
        set_spr_immed   1,lcr
256
        set_icc         0x7 3
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        bcvlr           icc3,0,3
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259
        set_spr_immed   1,lcr
260
        set_icc         0x8 0
261
        bcvlr           icc0,0,0
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263
        set_spr_immed   1,lcr
264
        set_icc         0x9 1
265
        bcvlr           icc1,0,1
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267
        set_spr_immed   1,lcr
268
        set_icc         0xa 2
269
        bcvlr           icc2,0,2
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271
        set_spr_immed   1,lcr
272
        set_icc         0xb 3
273
        bcvlr           icc3,0,3
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275
        set_spr_immed   1,lcr
276
        set_icc         0xc 0
277
        bcvlr           icc0,0,0
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279
        set_spr_immed   1,lcr
280
        set_icc         0xd 1
281
        bcvlr           icc1,0,1
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283
        set_spr_immed   1,lcr
284
        set_icc         0xe 2
285
        bcvlr           icc2,0,2
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287
        set_spr_immed   1,lcr
288
        set_icc         0xf 3
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        bcvlr           icc3,0,3
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291
        pass
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bad:
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        fail

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