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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [cmcpxiu.cgs] - Blame information for rev 840

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Line No. Rev Author Line
1 24 jeremybenn
# frv testcase for cmcpxiu $GRi,$GRj,$GRk,$CCi,$cond
2
# mach: frv fr500 fr400
3
 
4
        .include "testutils.inc"
5
 
6
        start
7
 
8
        .global cmcpxiu
9
cmcpxiu:
10
        set_spr_immed   0x1b1b,cccr
11
 
12
        set_fr_iimmed   4,2,fr7         ; multiply small numbers
13
        set_fr_iimmed   3,5,fr8
14
        cmcpxiu         fr7,fr8,acc0,cc0,1
15
        test_accg_immed         0,accg0
16
        test_acc_immed  26,acc0
17
 
18
        set_fr_iimmed   1,2,fr7         ; multiply by 1
19
        set_fr_iimmed   1,3,fr8
20
        cmcpxiu         fr7,fr8,acc0,cc0,1
21
        test_accg_immed         0,accg0
22
        test_acc_immed  5,acc0
23
 
24
        set_fr_iimmed   0,2,fr7         ; multiply by 0
25
        set_fr_iimmed   0,2,fr8
26
        cmcpxiu         fr7,fr8,acc0,cc0,1
27
        test_accg_immed         0,accg0
28
        test_acc_immed  0,acc0
29
 
30
        set_fr_iimmed   0x3fff,1,fr7    ; 15 bit result
31
        set_fr_iimmed   0x0001,2,fr8
32
        cmcpxiu         fr7,fr8,acc0,cc0,1
33
        test_accg_immed         0,accg0
34
        test_acc_limmed 0x0000,0x7fff,acc0
35
 
36
        set_fr_iimmed   0x4000,1,fr7    ; 16 bit result
37
        set_fr_iimmed   0x0001,2,fr8
38
        cmcpxiu         fr7,fr8,acc0,cc0,1
39
        test_accg_immed         0,accg0
40
        test_acc_limmed 0x0000,0x8001,acc0
41
 
42
        set_fr_iimmed   0x4000,1,fr7    ; 17 bit result
43
        set_fr_iimmed   0x0001,4,fr8
44
        cmcpxiu         fr7,fr8,acc0,cc0,1
45
        test_accg_immed         0,accg0
46
        test_acc_immed  0x00010001,acc0
47
 
48
        set_fr_iimmed   0x7fff,0x0000,fr7       ; max positive result
49
        set_fr_iimmed   0x7fff,0x7fff,fr8
50
        cmcpxiu         fr7,fr8,acc0,cc4,1
51
        test_accg_immed         0,accg0
52
        test_acc_immed  0x3fff0001,acc0
53
 
54
        set_fr_iimmed   0x8000,0x8000,fr7       ; max positive result
55
        set_fr_iimmed   0x0000,0x8000,fr8
56
        cmcpxiu         fr7,fr8,acc0,cc4,1
57
        test_accg_immed         0,accg0
58
        test_acc_limmed 0x4000,0x0000,acc0
59
 
60
        set_fr_iimmed   0xffff,0x0000,fr7       ; max positive result
61
        set_fr_iimmed   0xffff,0xffff,fr8
62
        cmcpxiu         fr7,fr8,acc0,cc4,1
63
        test_accg_immed         0,accg0
64
        test_acc_limmed 0xfffe,0x0001,acc0
65
 
66
        set_fr_iimmed   0xfffe,0xffff,fr7       ; almost max positive result
67
        set_fr_iimmed   0xffff,0xffff,fr8
68
        cmcpxiu         fr7,fr8,acc0,cc4,1
69
        test_accg_immed 1,accg0
70
        test_acc_immed  0xfffb0003,acc0
71
 
72
        set_fr_iimmed   0xffff,0xffff,fr7       ; max positive result
73
        set_fr_iimmed   0xffff,0xffff,fr8
74
        cmcpxiu         fr7,fr8,acc0,cc4,1
75
        test_accg_immed 1,accg0
76
        test_acc_immed  0xfffc0002,acc0
77
 
78
        set_fr_iimmed   4,2,fr7         ; multiply small numbers
79
        set_fr_iimmed   3,5,fr8
80
        cmcpxiu         fr7,fr8,acc0,cc1,0
81
        test_accg_immed         0,accg0
82
        test_acc_immed  26,acc0
83
 
84
        set_fr_iimmed   1,2,fr7         ; multiply by 1
85
        set_fr_iimmed   1,3,fr8
86
        cmcpxiu         fr7,fr8,acc0,cc1,0
87
        test_accg_immed         0,accg0
88
        test_acc_immed  5,acc0
89
 
90
        set_fr_iimmed   0,2,fr7         ; multiply by 0
91
        set_fr_iimmed   0,2,fr8
92
        cmcpxiu         fr7,fr8,acc0,cc1,0
93
        test_accg_immed         0,accg0
94
        test_acc_immed  0,acc0
95
 
96
        set_fr_iimmed   0x3fff,1,fr7    ; 15 bit result
97
        set_fr_iimmed   0x0001,2,fr8
98
        cmcpxiu         fr7,fr8,acc0,cc1,0
99
        test_accg_immed         0,accg0
100
        test_acc_limmed 0x0000,0x7fff,acc0
101
 
102
        set_fr_iimmed   0x4000,1,fr7    ; 16 bit result
103
        set_fr_iimmed   0x0001,2,fr8
104
        cmcpxiu         fr7,fr8,acc0,cc1,0
105
        test_accg_immed         0,accg0
106
        test_acc_limmed 0x0000,0x8001,acc0
107
 
108
        set_fr_iimmed   0x4000,1,fr7    ; 17 bit result
109
        set_fr_iimmed   0x0001,4,fr8
110
        cmcpxiu         fr7,fr8,acc0,cc1,0
111
        test_accg_immed         0,accg0
112
        test_acc_immed  0x00010001,acc0
113
 
114
        set_fr_iimmed   0x7fff,0x0000,fr7       ; max positive result
115
        set_fr_iimmed   0x7fff,0x7fff,fr8
116
        cmcpxiu         fr7,fr8,acc0,cc5,0
117
        test_accg_immed         0,accg0
118
        test_acc_immed  0x3fff0001,acc0
119
 
120
        set_fr_iimmed   0x8000,0x8000,fr7       ; max positive result
121
        set_fr_iimmed   0x0000,0x8000,fr8
122
        cmcpxiu         fr7,fr8,acc0,cc5,0
123
        test_accg_immed         0,accg0
124
        test_acc_limmed 0x4000,0x0000,acc0
125
 
126
        set_fr_iimmed   0xffff,0x0000,fr7       ; max positive result
127
        set_fr_iimmed   0xffff,0xffff,fr8
128
        cmcpxiu         fr7,fr8,acc0,cc5,0
129
        test_accg_immed         0,accg0
130
        test_acc_limmed 0xfffe,0x0001,acc0
131
 
132
        set_fr_iimmed   0xfffe,0xffff,fr7       ; almost max positive result
133
        set_fr_iimmed   0xffff,0xffff,fr8
134
        cmcpxiu         fr7,fr8,acc0,cc5,0
135
        test_accg_immed 1,accg0
136
        test_acc_immed  0xfffb0003,acc0
137
 
138
        set_fr_iimmed   0xffff,0xffff,fr7       ; max positive result
139
        set_fr_iimmed   0xffff,0xffff,fr8
140
        cmcpxiu         fr7,fr8,acc0,cc5,0
141
        test_accg_immed 1,accg0
142
        test_acc_immed  0xfffc0002,acc0
143
 
144
        set_accg_immed  0x00000011,accg0
145
        set_acc_immed   0x11111111,acc0
146
        set_fr_iimmed   4,2,fr7         ; multiply small numbers
147
        set_fr_iimmed   3,5,fr8
148
        cmcpxiu         fr7,fr8,acc0,cc0,0
149
        test_accg_immed         0x00000011,accg0
150
        test_acc_immed  0x11111111,acc0
151
 
152
        set_fr_iimmed   1,2,fr7         ; multiply by 1
153
        set_fr_iimmed   1,3,fr8
154
        cmcpxiu         fr7,fr8,acc0,cc0,0
155
        test_accg_immed         0x00000011,accg0
156
        test_acc_immed  0x11111111,acc0
157
 
158
        set_fr_iimmed   0,2,fr7         ; multiply by 0
159
        set_fr_iimmed   0,2,fr8
160
        cmcpxiu         fr7,fr8,acc0,cc0,0
161
        test_accg_immed         0x00000011,accg0
162
        test_acc_immed  0x11111111,acc0
163
 
164
        set_fr_iimmed   0x3fff,1,fr7    ; 15 bit result
165
        set_fr_iimmed   0x0001,2,fr8
166
        cmcpxiu         fr7,fr8,acc0,cc0,0
167
        test_accg_immed         0x00000011,accg0
168
        test_acc_immed  0x11111111,acc0
169
 
170
        set_fr_iimmed   0x4000,1,fr7    ; 16 bit result
171
        set_fr_iimmed   0x0001,4,fr8
172
        cmcpxiu         fr7,fr8,acc0,cc0,0
173
        test_accg_immed         0x00000011,accg0
174
        test_acc_immed  0x11111111,acc0
175
 
176
        set_fr_iimmed   0x8000,1,fr7    ; 17 bit result
177
        set_fr_iimmed   0x0001,4,fr8
178
        cmcpxiu         fr7,fr8,acc0,cc0,0
179
        test_accg_immed         0x00000011,accg0
180
        test_acc_immed  0x11111111,acc0
181
 
182
        set_fr_iimmed   0x7fff,0x0000,fr7       ; max positive result
183
        set_fr_iimmed   0x7fff,0x7fff,fr8
184
        cmcpxiu         fr7,fr8,acc0,cc4,0
185
        test_accg_immed         0x00000011,accg0
186
        test_acc_immed  0x11111111,acc0
187
 
188
        set_fr_iimmed   0x8000,0x8000,fr7       ; max positive result
189
        set_fr_iimmed   0x0000,0x8000,fr8
190
        cmcpxiu         fr7,fr8,acc0,cc4,0
191
        test_accg_immed         0x00000011,accg0
192
        test_acc_immed  0x11111111,acc0
193
 
194
        set_fr_iimmed   0xffff,0x0000,fr7       ; max positive result
195
        set_fr_iimmed   0xffff,0xffff,fr8
196
        cmcpxiu         fr7,fr8,acc0,cc4,0
197
        test_accg_immed         0x00000011,accg0
198
        test_acc_immed  0x11111111,acc0
199
 
200
        set_spr_immed   0,msr0
201
        set_spr_immed   0,msr1
202
        set_fr_iimmed   0x0000,0x0001,fr7       ; saturation
203
        set_fr_iimmed   0x0001,0xffff,fr8
204
        cmcpxiu         fr7,fr8,acc0,cc4,0
205
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
206
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
207
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
208
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
209
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
210
        test_accg_immed         0x00000011,accg0
211
        test_acc_immed  0x11111111,acc0
212
 
213
        set_fr_iimmed   0x0000,0xffff,fr7       ; saturation
214
        set_fr_iimmed   0xffff,0xffff,fr8
215
        cmcpxiu         fr7,fr8,acc0,cc4,0
216
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
217
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
218
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
219
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
220
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
221
        test_accg_immed         0x00000011,accg0
222
        test_acc_immed  0x11111111,acc0
223
 
224
        set_fr_iimmed   0xfffe,0xffff,fr7       ; saturation
225
        set_fr_iimmed   0xffff,0xffff,fr8
226
        cmcpxiu         fr7,fr8,acc0,cc4,0
227
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
228
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
229
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
230
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
231
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
232
        test_accg_immed         0x00000011,accg0
233
        test_acc_immed  0x11111111,acc0
234
 
235
        set_accg_immed  0x00000011,accg0
236
        set_acc_immed   0x11111111,acc0
237
        set_fr_iimmed   4,2,fr7         ; multiply small numbers
238
        set_fr_iimmed   3,5,fr8
239
        cmcpxiu         fr7,fr8,acc0,cc1,1
240
        test_accg_immed         0x00000011,accg0
241
        test_acc_immed  0x11111111,acc0
242
 
243
        set_fr_iimmed   1,2,fr7         ; multiply by 1
244
        set_fr_iimmed   1,3,fr8
245
        cmcpxiu         fr7,fr8,acc0,cc1,1
246
        test_accg_immed         0x00000011,accg0
247
        test_acc_immed  0x11111111,acc0
248
 
249
        set_fr_iimmed   0,2,fr7         ; multiply by 0
250
        set_fr_iimmed   0,2,fr8
251
        cmcpxiu         fr7,fr8,acc0,cc1,1
252
        test_accg_immed         0x00000011,accg0
253
        test_acc_immed  0x11111111,acc0
254
 
255
        set_fr_iimmed   0x3fff,1,fr7    ; 15 bit result
256
        set_fr_iimmed   0x0001,2,fr8
257
        cmcpxiu         fr7,fr8,acc0,cc1,1
258
        test_accg_immed         0x00000011,accg0
259
        test_acc_immed  0x11111111,acc0
260
 
261
        set_fr_iimmed   0x4000,1,fr7    ; 16 bit result
262
        set_fr_iimmed   0x0001,4,fr8
263
        cmcpxiu         fr7,fr8,acc0,cc1,1
264
        test_accg_immed         0x00000011,accg0
265
        test_acc_immed  0x11111111,acc0
266
 
267
        set_fr_iimmed   0x8000,1,fr7    ; 17 bit result
268
        set_fr_iimmed   0x0001,4,fr8
269
        cmcpxiu         fr7,fr8,acc0,cc1,1
270
        test_accg_immed         0x00000011,accg0
271
        test_acc_immed  0x11111111,acc0
272
 
273
        set_fr_iimmed   0x7fff,0x0000,fr7       ; max positive result
274
        set_fr_iimmed   0x7fff,0x7fff,fr8
275
        cmcpxiu         fr7,fr8,acc0,cc5,1
276
        test_accg_immed         0x00000011,accg0
277
        test_acc_immed  0x11111111,acc0
278
 
279
        set_fr_iimmed   0x8000,0x8000,fr7       ; max positive result
280
        set_fr_iimmed   0x0000,0x8000,fr8
281
        cmcpxiu         fr7,fr8,acc0,cc5,1
282
        test_accg_immed         0x00000011,accg0
283
        test_acc_immed  0x11111111,acc0
284
 
285
        set_fr_iimmed   0xffff,0x0000,fr7       ; max positive result
286
        set_fr_iimmed   0xffff,0xffff,fr8
287
        cmcpxiu         fr7,fr8,acc0,cc5,1
288
        test_accg_immed         0x00000011,accg0
289
        test_acc_immed  0x11111111,acc0
290
 
291
        set_spr_immed   0,msr0
292
        set_spr_immed   0,msr1
293
        set_fr_iimmed   0x0000,0x0001,fr7       ; saturation
294
        set_fr_iimmed   0x0001,0xffff,fr8
295
        cmcpxiu         fr7,fr8,acc0,cc5,1
296
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
297
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
298
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
299
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
300
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
301
        test_accg_immed         0x00000011,accg0
302
        test_acc_immed  0x11111111,acc0
303
 
304
        set_fr_iimmed   0x0000,0xffff,fr7       ; saturation
305
        set_fr_iimmed   0xffff,0xffff,fr8
306
        cmcpxiu         fr7,fr8,acc0,cc5,1
307
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
308
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
309
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
310
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
311
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
312
        test_accg_immed         0x00000011,accg0
313
        test_acc_immed  0x11111111,acc0
314
 
315
        set_fr_iimmed   0xfffe,0xffff,fr7       ; saturation
316
        set_fr_iimmed   0xffff,0xffff,fr8
317
        cmcpxiu         fr7,fr8,acc0,cc5,1
318
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
319
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
320
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
321
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
322
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
323
        test_accg_immed         0x00000011,accg0
324
        test_acc_immed  0x11111111,acc0
325
 
326
        set_accg_immed  0x00000011,accg0
327
        set_acc_immed   0x11111111,acc0
328
        set_fr_iimmed   4,2,fr7         ; multiply small numbers
329
        set_fr_iimmed   3,5,fr8
330
        cmcpxiu         fr7,fr8,acc0,cc2,1
331
        test_accg_immed         0x00000011,accg0
332
        test_acc_immed  0x11111111,acc0
333
 
334
        set_fr_iimmed   1,2,fr7         ; multiply by 1
335
        set_fr_iimmed   1,3,fr8
336
        cmcpxiu         fr7,fr8,acc0,cc2,0
337
        test_accg_immed         0x00000011,accg0
338
        test_acc_immed  0x11111111,acc0
339
 
340
        set_fr_iimmed   0,2,fr7         ; multiply by 0
341
        set_fr_iimmed   0,2,fr8
342
        cmcpxiu         fr7,fr8,acc0,cc2,1
343
        test_accg_immed         0x00000011,accg0
344
        test_acc_immed  0x11111111,acc0
345
 
346
        set_fr_iimmed   0x3fff,1,fr7    ; 15 bit result
347
        set_fr_iimmed   0x0001,2,fr8
348
        cmcpxiu         fr7,fr8,acc0,cc2,0
349
        test_accg_immed         0x00000011,accg0
350
        test_acc_immed  0x11111111,acc0
351
 
352
        set_fr_iimmed   0x4000,1,fr7    ; 16 bit result
353
        set_fr_iimmed   0x0001,4,fr8
354
        cmcpxiu         fr7,fr8,acc0,cc2,1
355
        test_accg_immed         0x00000011,accg0
356
        test_acc_immed  0x11111111,acc0
357
 
358
        set_fr_iimmed   0x8000,1,fr7    ; 17 bit result
359
        set_fr_iimmed   0x0001,4,fr8
360
        cmcpxiu         fr7,fr8,acc0,cc2,0
361
        test_accg_immed         0x00000011,accg0
362
        test_acc_immed  0x11111111,acc0
363
 
364
        set_fr_iimmed   0x7fff,0x0000,fr7       ; max positive result
365
        set_fr_iimmed   0x7fff,0x7fff,fr8
366
        cmcpxiu         fr7,fr8,acc0,cc6,1
367
        test_accg_immed         0x00000011,accg0
368
        test_acc_immed  0x11111111,acc0
369
 
370
        set_fr_iimmed   0x8000,0x8000,fr7       ; max positive result
371
        set_fr_iimmed   0x0000,0x8000,fr8
372
        cmcpxiu         fr7,fr8,acc0,cc6,0
373
        test_accg_immed         0x00000011,accg0
374
        test_acc_immed  0x11111111,acc0
375
 
376
        set_fr_iimmed   0xffff,0x0000,fr7       ; max positive result
377
        set_fr_iimmed   0xffff,0xffff,fr8
378
        cmcpxiu         fr7,fr8,acc0,cc6,1
379
        test_accg_immed         0x00000011,accg0
380
        test_acc_immed  0x11111111,acc0
381
 
382
        set_spr_immed   0,msr0
383
        set_spr_immed   0,msr1
384
        set_fr_iimmed   0x0000,0x0001,fr7       ; saturation
385
        set_fr_iimmed   0x0001,0xffff,fr8
386
        cmcpxiu         fr7,fr8,acc0,cc6,0
387
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
388
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
389
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
390
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
391
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
392
        test_accg_immed         0x00000011,accg0
393
        test_acc_immed  0x11111111,acc0
394
 
395
        set_fr_iimmed   0x0000,0xffff,fr7       ; saturation
396
        set_fr_iimmed   0xffff,0xffff,fr8
397
        cmcpxiu         fr7,fr8,acc0,cc6,1
398
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
399
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
400
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
401
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
402
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
403
        test_accg_immed         0x00000011,accg0
404
        test_acc_immed  0x11111111,acc0
405
 
406
        set_fr_iimmed   0xfffe,0xffff,fr7       ; saturation
407
        set_fr_iimmed   0xffff,0xffff,fr8
408
        cmcpxiu         fr7,fr8,acc0,cc6,0
409
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
410
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
411
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
412
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
413
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
414
        test_accg_immed         0x00000011,accg0
415
        test_acc_immed  0x11111111,acc0
416
 
417
        set_accg_immed  0x00000011,accg0
418
        set_acc_immed   0x11111111,acc0
419
        set_fr_iimmed   4,2,fr7         ; multiply small numbers
420
        set_fr_iimmed   3,5,fr8
421
        cmcpxiu         fr7,fr8,acc0,cc3,1
422
        test_accg_immed         0x00000011,accg0
423
        test_acc_immed  0x11111111,acc0
424
 
425
        set_fr_iimmed   1,2,fr7         ; multiply by 1
426
        set_fr_iimmed   1,3,fr8
427
        cmcpxiu         fr7,fr8,acc0,cc3,0
428
        test_accg_immed         0x00000011,accg0
429
        test_acc_immed  0x11111111,acc0
430
 
431
        set_fr_iimmed   0,2,fr7         ; multiply by 0
432
        set_fr_iimmed   0,2,fr8
433
        cmcpxiu         fr7,fr8,acc0,cc3,1
434
        test_accg_immed         0x00000011,accg0
435
        test_acc_immed  0x11111111,acc0
436
 
437
        set_fr_iimmed   0x3fff,1,fr7    ; 15 bit result
438
        set_fr_iimmed   0x0001,2,fr8
439
        cmcpxiu         fr7,fr8,acc0,cc3,0
440
        test_accg_immed         0x00000011,accg0
441
        test_acc_immed  0x11111111,acc0
442
 
443
        set_fr_iimmed   0x4000,1,fr7    ; 16 bit result
444
        set_fr_iimmed   0x0001,4,fr8
445
        cmcpxiu         fr7,fr8,acc0,cc3,1
446
        test_accg_immed         0x00000011,accg0
447
        test_acc_immed  0x11111111,acc0
448
 
449
        set_fr_iimmed   0x8000,1,fr7    ; 17 bit result
450
        set_fr_iimmed   0x0001,4,fr8
451
        cmcpxiu         fr7,fr8,acc0,cc3,0
452
        test_accg_immed         0x00000011,accg0
453
        test_acc_immed  0x11111111,acc0
454
 
455
        set_fr_iimmed   0x7fff,0x0000,fr7       ; max positive result
456
        set_fr_iimmed   0x7fff,0x7fff,fr8
457
        cmcpxiu         fr7,fr8,acc0,cc7,1
458
        test_accg_immed         0x00000011,accg0
459
        test_acc_immed  0x11111111,acc0
460
 
461
        set_fr_iimmed   0x8000,0x8000,fr7       ; max positive result
462
        set_fr_iimmed   0x0000,0x8000,fr8
463
        cmcpxiu         fr7,fr8,acc0,cc7,0
464
        test_accg_immed         0x00000011,accg0
465
        test_acc_immed  0x11111111,acc0
466
 
467
        set_fr_iimmed   0xffff,0x0000,fr7       ; max positive result
468
        set_fr_iimmed   0xffff,0xffff,fr8
469
        cmcpxiu         fr7,fr8,acc0,cc7,1
470
        test_accg_immed         0x00000011,accg0
471
        test_acc_immed  0x11111111,acc0
472
 
473
        set_spr_immed   0,msr0
474
        set_spr_immed   0,msr1
475
        set_fr_iimmed   0x0000,0x0001,fr7       ; saturation
476
        set_fr_iimmed   0x0001,0xffff,fr8
477
        cmcpxiu         fr7,fr8,acc0,cc7,0
478
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
479
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
480
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
481
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
482
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
483
        test_accg_immed         0x00000011,accg0
484
        test_acc_immed  0x11111111,acc0
485
 
486
        set_fr_iimmed   0x0000,0xffff,fr7       ; saturation
487
        set_fr_iimmed   0xffff,0xffff,fr8
488
        cmcpxiu         fr7,fr8,acc0,cc7,1
489
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
490
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
491
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
492
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
493
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
494
        test_accg_immed         0x00000011,accg0
495
        test_acc_immed  0x11111111,acc0
496
 
497
        set_fr_iimmed   0xfffe,0xffff,fr7       ; saturation
498
        set_fr_iimmed   0xffff,0xffff,fr8
499
        cmcpxiu         fr7,fr8,acc0,cc7,0
500
        test_spr_bits   0x3c,2,0x0,msr0         ; msr0.sie is clear
501
        test_spr_bits   2,1,0,msr0              ; msr0.ovf is clear
502
        test_spr_bits   2,1,0,msr1              ; msr1.ovf is clear
503
        test_spr_bits   1,0,0,msr0              ; msr0.aovf is clear
504
        test_spr_bits   0x7000,12,0,msr0        ; msr0.mtt is clear
505
        test_accg_immed         0x00000011,accg0
506
        test_acc_immed  0x11111111,acc0
507
 
508
        pass

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