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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [commitga.cgs] - Blame information for rev 827

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Line No. Rev Author Line
1 24 jeremybenn
# frv testcase for commitga
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# mach: frv
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        .include "testutils.inc"
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        start
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        .global commitga
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commitga:
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        and_spr_immed   -4081,tbr               ; clear tbr.tt
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        set_gr_spr      tbr,gr17
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        inc_gr_immed    0x190,gr17              ; address of exception handler
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        set_bctrlr_0_0  gr17
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        set_spr_immed   128,lcr
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        set_psr_et      1
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        set_gr_immed    0,gr15
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        nldi            @(sp,0),gr20    ; Activate gr20 with nesr.fr==0
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        nldfi           @(sp,0),fr20    ; Activate fr20 with nesr.fr==1
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        nldi            @(sp,0),gr52    ; Activate gr52 with nesr.fr==0
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        set_spr_immed   0x00000000,gner1
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        set_spr_immed   0x00000000,gner0
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        set_spr_addr    bad,lr
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        commitga                        ; should be a nop
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        test_gr_immed   0,gr15
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        test_spr_immed  0x00000000,gner1
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        test_spr_immed  0x00000000,gner0
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        test_spr_immed  0x94800001,nesr0
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        test_spr_gr     neear0,sp
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        test_spr_immed  0xd4800401,nesr1
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        test_spr_gr     neear1,sp
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        test_spr_immed  0xb4800801,nesr2
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        test_spr_gr     neear2,sp
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        or_spr_immed    0x00100000,gner1
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        or_spr_immed    0x00200000,gner1
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        or_spr_immed    0x00100000,gner0
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        set_spr_addr    ok,lr
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        set_gr_addr     com1,gr16
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com1:   commitga
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        test_gr_immed   1,gr15
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        pass
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ok:     test_spr_immed  0x1,esfr1               ; esr0 is active
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        test_spr_gr     epcr0,gr16
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        test_spr_bits   0x0001,0,0x1,esr0       ; esr0 is valid
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        test_spr_bits   0x003e,1,0x14,esr0      ; esr0.ec is set
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        test_spr_bits   0x0800,11,0x0,esr0      ; esr0.eav is clear
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        test_spr_bits   0x01000,12,0x0,esr0     ; esr0.edv is clear
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        test_spr_immed  0x00000000,gner1
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        test_spr_immed  0x00000000,gner0
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        test_spr_immed  0,nesr0
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        test_spr_immed  0,neear0
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        test_spr_immed  0xd4800401,nesr1
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        test_spr_gr     neear1,sp
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        test_spr_immed  0,nesr2
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        test_spr_immed  0,neear0
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        inc_gr_immed    1,gr15
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        rett            0
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bad:    fail

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