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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [interrupts/] [timer.cgs] - Blame information for rev 157

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Line No. Rev Author Line
1 24 jeremybenn
# frv testcase to generate timer interrupt for st $GRk,@($GRi,$GRj)
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# mach: fr500 fr550 fr400
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# sim: --timer 200,14
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        .include "testutils.inc"
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        start
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        .global align
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align:
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        and_spr_immed   -4081,tbr               ; clear tbr.tt
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        set_gr_spr      tbr,gr17
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        inc_gr_immed    0x2e0,gr17              ; address of exception handler
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        set_bctrlr_0_0  gr17
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        set_spr_immed   0x7fffffff,lcr
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        set_spr_addr    ok1,lr
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        and_spr_immed   0xffffff87,psr ; enable external interrupts
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        or_spr_immed    0x00000069,psr ; enable external interrupts
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        set_gr_immed    10,gr16
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        set_gr_immed    0,gr15
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again:  cmp             gr15,gr16,icc0
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        blt             icc0,0,again
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        pass
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; exception handler
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ok1:
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        inc_gr_immed    1,gr15
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        rett            0
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        fail

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