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# frv testcase to generate timer interrupt for st $GRk,@($GRi,$GRj)

# mach: fr500 fr550 fr400

# sim: --timer 200,14

        .include "testutils.inc"

        start

        .global align

align:

        and_spr_immed   -4081,tbr               ; clear tbr.tt

        set_gr_spr      tbr,gr17

        inc_gr_immed    0x2e0,gr17              ; address of exception handler

        set_bctrlr_0_0  gr17

        set_spr_immed   0x7fffffff,lcr

        set_spr_addr    ok1,lr

        and_spr_immed   0xffffff87,psr ; enable external interrupts

        or_spr_immed    0x00000069,psr ; enable external interrupts

        set_gr_immed    10,gr16

        set_gr_immed    0,gr15

again:  cmp             gr15,gr16,icc0

        blt             icc0,0,again

        pass

; exception handler

ok1:

        inc_gr_immed    1,gr15

        rett            0

        fail