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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [maveh.cgs] - Blame information for rev 840

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Line No. Rev Author Line
1 24 jeremybenn
# frv testcase for maveh $FRi,$FRj,$FRj
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# mach: all
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        .include "testutils.inc"
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        start
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        .global maveh
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maveh:
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        set_fr_iimmed   0x0000,0x0000,fr10
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        set_fr_iimmed   0x0000,0x0000,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0x0000,0x0000,fr12
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        set_fr_iimmed   0x0001,0x0000,fr10
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        set_fr_iimmed   0x0002,0x0001,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0x0001,0x0000,fr12
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        set_fr_iimmed   0x0000,0xffff,fr10
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        set_fr_iimmed   0xffff,0xfffe,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0xffff,0xfffe,fr12
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        set_fr_iimmed   0xdead,0x0000,fr10
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        set_fr_iimmed   0x0000,0xbeef,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0xef56,0xdf77,fr12
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        set_fr_iimmed   0x0000,0xdead,fr10
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        set_fr_iimmed   0xbeef,0x0000,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0xdf77,0xef56,fr12
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        set_fr_iimmed   0x1234,0x5678,fr10
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        set_fr_iimmed   0x1111,0x1111,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0x11a2,0x33c4,fr12
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        set_fr_iimmed   0x1234,0x5678,fr10
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        set_fr_iimmed   0xffff,0xffff,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0x0919,0x2b3b,fr12
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        set_spr_immed   0,msr0
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        set_fr_iimmed   0x7ffe,0x7ffe,fr10
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        set_fr_iimmed   0x0002,0x0001,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0x4000,0x3fff,fr12
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        set_spr_immed   0,msr0
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        set_fr_iimmed   0x8001,0x8001,fr10
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        set_fr_iimmed   0xffff,0xfffe,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0xc000,0xbfff,fr12
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        set_spr_immed   0,msr0
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        set_fr_iimmed   0x8001,0x8001,fr10
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        set_fr_iimmed   0xfffe,0xfffe,fr11
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        maveh           fr10,fr11,fr12
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        test_fr_limmed  0xbfff,0xbfff,fr12
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        set_spr_immed   0,msr0
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        set_spr_immed   0,msr1
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        set_fr_iimmed   0x8000,0x8000,fr10
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        set_fr_iimmed   0x7fff,0x7fff,fr11
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        maveh.p         fr10,fr10,fr12
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        maveh           fr11,fr11,fr13
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        test_fr_limmed  0x8000,0x8000,fr12
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        test_fr_limmed  0x7fff,0x7fff,fr13
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        pass

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