OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [h8300/] [band.s] - Blame information for rev 840

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
# Hitachi H8 testcase 'band', 'bor', 'bxor', 'bld', 'bst', 'bstz'
2
# mach(): all
3
# as(h8300):    --defsym sim_cpu=0
4
# as(h8300h):   --defsym sim_cpu=1
5
# as(h8300s):   --defsym sim_cpu=2
6
# as(h8sx):     --defsym sim_cpu=3
7
# ld(h8300h):   -m h8300helf
8
# ld(h8300s):   -m h8300self
9
# ld(h8sx):     -m h8300sxelf
10
 
11
        .include "testutils.inc"
12
 
13
        .data
14
byte_src:       .byte 0xa5
15
byte_dst:       .byte 0
16
 
17
        start
18
 
19
band_imm3_reg8:
20
        set_grs_a5a5
21
        set_ccr_zero
22
        ;; band xx:3, reg8
23
        band    #7, r0l         ; this should NOT set the carry flag.
24
        test_cc_clear
25
        band    #6, r0l         ; this should NOT set the carry flag.
26
        test_cc_clear
27
 
28
        orc     #1, ccr         ; set the carry flag
29
        band    #7, r0l         ; this should NOT clear the carry flag
30
        test_carry_set
31
        test_ovf_clear
32
        test_neg_clear
33
        test_zero_clear
34
        band    #6, r0l         ; this should clear the carry flag
35
        test_cc_clear
36
 
37
        test_grs_a5a5           ; general registers should not be changed.
38
 
39
band_imm3_ind:
40
        set_grs_a5a5
41
.if (sim_cpu == h8300)
42
        mov     #byte_src, r1
43
        set_ccr_zero
44
        ;; band xx:3, ind
45
        band    #7, @r1         ; this should NOT set the carry flag.
46
        test_cc_clear
47
        band    #6, @r1         ; this should NOT set the carry flag.
48
        test_cc_clear
49
 
50
        orc     #1, ccr         ; set the carry flag
51
        band    #7, @r1         ; this should NOT clear the carry flag
52
        test_carry_set
53
        test_ovf_clear
54
        test_neg_clear
55
        test_zero_clear
56
        band    #6, @r1         ; this should clear the carry flag
57
        test_cc_clear
58
;;;     test_h_gr16  byte_src r1        ;FIXME
59
.else
60
        mov     #byte_src, er1
61
        set_ccr_zero
62
        ;; band xx:3, ind
63
        band    #7, @er1        ; this should NOT set the carry flag.
64
        test_cc_clear
65
        band    #6, @er1        ; this should NOT set the carry flag.
66
        test_cc_clear
67
 
68
        orc     #1, ccr         ; set the carry flag
69
        band    #7, @er1        ; this should NOT clear the carry flag
70
        test_carry_set
71
        test_ovf_clear
72
        test_neg_clear
73
        test_zero_clear
74
        band    #6, @er1        ; this should clear the carry flag
75
        test_cc_clear
76
        test_h_gr32  byte_src er1
77
.endif                          ; h8300
78
        test_gr_a5a5 0           ; general registers should not be changed.
79
        test_gr_a5a5 2
80
        test_gr_a5a5 3
81
        test_gr_a5a5 4
82
        test_gr_a5a5 5
83
        test_gr_a5a5 6
84
        test_gr_a5a5 7
85
 
86
band_imm3_abs8:
87
        set_grs_a5a5
88
        mov.b   r1l, @0x20
89
        set_ccr_zero
90
        ;; band xx:3, aa:8
91
        band    #7, @0x20:8     ; this should NOT set the carry flag.
92
        test_cc_clear
93
        band    #6, @0x20:8     ; this should NOT set the carry flag.
94
        test_cc_clear
95
 
96
        orc     #1, ccr         ; set the carry flag
97
        band    #7, @0x20:8     ; this should NOT clear the carry flag
98
        test_carry_set
99
        test_ovf_clear
100
        test_neg_clear
101
        test_zero_clear
102
        band    #6, @0x20:8     ; this should clear the carry flag
103
        test_cc_clear
104
 
105
        test_grs_a5a5           ; general registers should not be changed.
106
 
107
.if (sim_cpu > h8300h)
108
band_imm3_abs16:
109
        set_grs_a5a5
110
        set_ccr_zero
111
        ;; band xx:3, aa:16
112
        band    #7, @byte_src:16        ; this should NOT set the carry flag.
113
        test_cc_clear
114
        band    #6, @byte_src:16        ; this should NOT set the carry flag.
115
        test_cc_clear
116
 
117
        orc     #1, ccr                 ; set the carry flag
118
        band    #7, @byte_src:16        ; this should NOT clear the carry flag
119
        test_carry_set
120
        test_ovf_clear
121
        test_neg_clear
122
        test_zero_clear
123
        band    #6, @byte_src:16        ; this should clear the carry flag
124
        test_cc_clear
125
 
126
        test_grs_a5a5           ; general registers should not be changed.
127
 
128
band_imm3_abs32:
129
        set_grs_a5a5
130
        set_ccr_zero
131
        ;; band xx:3, aa:32
132
        band    #7, @byte_src:32        ; this should NOT set the carry flag.
133
        test_cc_clear
134
        band    #6, @byte_src:32        ; this should NOT set the carry flag.
135
        test_cc_clear
136
 
137
        orc     #1, ccr                 ; set the carry flag
138
        band    #7, @byte_src:32        ; this should NOT clear the carry flag
139
        test_carry_set
140
        test_ovf_clear
141
        test_neg_clear
142
        test_zero_clear
143
        band    #6, @byte_src:32        ; this should clear the carry flag
144
        test_cc_clear
145
 
146
        test_grs_a5a5           ; general registers should not be changed.
147
.endif
148
 
149
bor_imm3_reg8:
150
        set_grs_a5a5
151
        set_ccr_zero
152
        ;; bor xx:3, reg8
153
        bor     #6, r0l         ; this should NOT set the carry flag.
154
        test_cc_clear
155
 
156
        bor     #7, r0l         ; this should set the carry flag.
157
        test_carry_set
158
        test_ovf_clear
159
        test_neg_clear
160
        test_zero_clear
161
 
162
        orc     #1, ccr         ; set the carry flag
163
        bor     #7, r0l         ; this should NOT clear the carry flag
164
        test_carry_set
165
        test_ovf_clear
166
        test_neg_clear
167
        test_zero_clear
168
        bor     #6, r0l         ; this should NOT clear the carry flag
169
        test_carry_set
170
        test_ovf_clear
171
        test_neg_clear
172
        test_zero_clear
173
 
174
        test_grs_a5a5           ; general registers should not be changed.
175
 
176
bor_imm3_abs8:
177
        set_grs_a5a5
178
        mov.b   r1l, @0x20
179
        set_ccr_zero
180
        ;; bor xx:3, aa:8
181
        bor     #6, @0x20:8     ; this should NOT set the carry flag.
182
        test_cc_clear
183
        bor     #7, @0x20:8     ; this should set the carry flag.
184
        test_carry_set
185
        test_ovf_clear
186
        test_neg_clear
187
        test_zero_clear
188
 
189
        orc     #1, ccr         ; set the carry flag
190
        bor     #7, @0x20:8     ; this should NOT clear the carry flag
191
        test_carry_set
192
        test_ovf_clear
193
        test_neg_clear
194
        test_zero_clear
195
        bor     #6, @0x20:8     ; this should NOT clear the carry flag
196
        test_carry_set
197
        test_ovf_clear
198
        test_neg_clear
199
        test_zero_clear
200
 
201
        test_grs_a5a5           ; general registers should not be changed.
202
 
203
bxor_imm3_reg8:
204
        set_grs_a5a5
205
        set_ccr_zero
206
        ;; bxor xx:3, reg8
207
        bxor    #6, r0l         ; this should NOT set the carry flag.
208
        test_cc_clear
209
 
210
        bxor    #7, r0l         ; this should set the carry flag.
211
        test_carry_set
212
        test_ovf_clear
213
        test_neg_clear
214
        test_zero_clear
215
 
216
        orc     #1, ccr         ; set the carry flag
217
        bxor    #6, r0l         ; this should NOT clear the carry flag
218
        test_carry_set
219
        test_ovf_clear
220
        test_neg_clear
221
        test_zero_clear
222
 
223
        bxor    #7, r0l         ; this should clear the carry flag
224
        test_cc_clear
225
 
226
        test_grs_a5a5           ; general registers should not be changed.
227
 
228
bxor_imm3_abs8:
229
        set_grs_a5a5
230
        mov.b   r1l, @0x20
231
        set_ccr_zero
232
        ;; bxor xx:3, aa:8
233
        bxor    #6, @0x20:8     ; this should NOT set the carry flag.
234
        test_cc_clear
235
        bxor    #7, @0x20:8     ; this should set the carry flag.
236
        test_carry_set
237
        test_ovf_clear
238
        test_neg_clear
239
        test_zero_clear
240
 
241
        orc     #1, ccr         ; set the carry flag
242
        bxor    #6, @0x20:8     ; this should NOT clear the carry flag
243
        test_carry_set
244
        test_ovf_clear
245
        test_neg_clear
246
        test_zero_clear
247
 
248
        bxor    #7, @0x20:8     ; this should clear the carry flag
249
        test_cc_clear
250
 
251
        test_grs_a5a5           ; general registers should not be changed.
252
 
253
bld_imm3_reg8:
254
        set_grs_a5a5
255
        set_ccr_zero
256
        ;; bld xx:3, reg8
257
        bld     #6, r0l         ; this should NOT set the carry flag.
258
        test_cc_clear
259
        bld     #7, r0l         ; this should set the carry flag.
260
        test_carry_set
261
        test_ovf_clear
262
        test_neg_clear
263
        test_zero_clear
264
 
265
        test_grs_a5a5           ; general registers should not be changed.
266
 
267
bld_imm3_ind:
268
        set_grs_a5a5
269
.if (sim_cpu == h8300)
270
        mov     #byte_src, r1
271
        set_ccr_zero
272
        ;; bld xx:3, ind
273
        bld     #6, @r1         ; this should NOT set the carry flag.
274
        test_cc_clear
275
        bld     #7, @r1         ; this should set the carry flag.
276
        test_carry_set
277
        test_ovf_clear
278
        test_neg_clear
279
        test_zero_clear
280
;;;     test_h_gr16  byte_src r1        ;FIXME
281
.else
282
        mov     #byte_src, er1
283
        set_ccr_zero
284
        ;; bld xx:3, ind
285
        bld     #6, @er1        ; this should NOT set the carry flag.
286
        test_cc_clear
287
        bld     #7, @er1        ; this should NOT set the carry flag.
288
        test_carry_set
289
        test_ovf_clear
290
        test_neg_clear
291
        test_zero_clear
292
        test_h_gr32  byte_src er1
293
.endif                          ; h8300
294
        test_gr_a5a5 0           ; general registers should not be changed.
295
        test_gr_a5a5 2
296
        test_gr_a5a5 3
297
        test_gr_a5a5 4
298
        test_gr_a5a5 5
299
        test_gr_a5a5 6
300
        test_gr_a5a5 7
301
 
302
bld_imm3_abs8:
303
        set_grs_a5a5
304
        mov.b   r1l, @0x20
305
        set_ccr_zero
306
        ;; bld xx:3, aa:8
307
        bld     #6, @0x20:8     ; this should NOT set the carry flag.
308
        test_cc_clear
309
        bld     #7, @0x20:8     ; this should set the carry flag.
310
        test_carry_set
311
        test_ovf_clear
312
        test_neg_clear
313
        test_zero_clear
314
 
315
        test_grs_a5a5           ; general registers should not be changed.
316
 
317
.if (sim_cpu > h8300h)
318
bld_imm3_abs16:
319
        set_grs_a5a5
320
        set_ccr_zero
321
        ;; bld xx:3, aa:16
322
        bld     #6, @byte_src:16        ; this should NOT set the carry flag.
323
        test_cc_clear
324
        bld     #7, @byte_src:16        ; this should set the carry flag.
325
        test_carry_set
326
        test_ovf_clear
327
        test_neg_clear
328
        test_zero_clear
329
 
330
        test_grs_a5a5           ; general registers should not be changed.
331
 
332
bld_imm3_abs32:
333
        set_grs_a5a5
334
        set_ccr_zero
335
        ;; bld xx:3, aa:32
336
        bld     #6, @byte_src:32        ; this should NOT set the carry flag.
337
        test_cc_clear
338
        bld     #7, @byte_src:32        ; this should set the carry flag.
339
        test_carry_set
340
        test_ovf_clear
341
        test_neg_clear
342
        test_zero_clear
343
 
344
        test_grs_a5a5           ; general registers should not be changed.
345
.endif
346
 
347
bst_imm3_reg8:
348
        set_grs_a5a5
349
        set_ccr_zero
350
        ;; bst xx:3, reg8
351
        bst     #7, r0l         ; this should clear bit 7
352
        test_cc_clear
353
        test_h_gr16 0xa525 r0
354
 
355
        set_ccr_zero
356
        orc     #1, ccr         ; set the carry flag
357
        bst     #6, r0l         ; this should set bit 6
358
        test_carry_set
359
        test_ovf_clear
360
        test_neg_clear
361
        test_zero_clear
362
        test_h_gr16 0xa565 r0
363
 
364
        test_gr_a5a5 1          ; Rest of general regs should not be changed.
365
        test_gr_a5a5 2
366
        test_gr_a5a5 3
367
        test_gr_a5a5 4
368
        test_gr_a5a5 5
369
        test_gr_a5a5 6
370
        test_gr_a5a5 7
371
 
372
bst_imm3_abs8:
373
        set_grs_a5a5
374
        mov.b   r1l, @0x20
375
        set_ccr_zero
376
        ;; bst xx:3, aa:8
377
        bst     #7, @0x20:8     ; this should clear bit 7
378
        test_cc_clear
379
        mov.b   @0x20, r0l
380
        test_h_gr16 0xa525 r0
381
 
382
        set_ccr_zero
383
        orc     #1, ccr         ; set the carry flag
384
        bst     #6, @0x20:8     ; this should set bit 6
385
        test_carry_set
386
        test_ovf_clear
387
        test_neg_clear
388
        test_zero_clear
389
        mov.b   @0x20, r0l
390
        test_h_gr16 0xa565 r0
391
 
392
        test_gr_a5a5 1          ; general registers should not be changed.
393
        test_gr_a5a5 2
394
        test_gr_a5a5 3
395
        test_gr_a5a5 4
396
        test_gr_a5a5 5
397
        test_gr_a5a5 6
398
        test_gr_a5a5 7
399
 
400
.if (sim_cpu == h8sx)
401
bstz_imm3_abs8:
402
        set_grs_a5a5
403
        mov.b   r1l, @0x20
404
        set_ccr_zero
405
        ;; bstz xx:3, aa:8
406
        bstz    #7, @0x20:8     ; this should clear bit 7
407
        test_cc_clear
408
        mov.b   @0x20, r0l
409
        test_h_gr16 0xa525 r0
410
 
411
        set_ccr_zero
412
        orc     #4, ccr         ; set the zero flag
413
        bstz    #6, @0x20:8     ; this should set bit 6
414
        test_carry_clear
415
        test_ovf_clear
416
        test_neg_clear
417
        test_zero_set
418
        mov.b   @0x20, r0l
419
        test_h_gr16 0xa565 r0
420
 
421
        test_gr_a5a5 1          ; general registers should not be changed.
422
        test_gr_a5a5 2
423
        test_gr_a5a5 3
424
        test_gr_a5a5 4
425
        test_gr_a5a5 5
426
        test_gr_a5a5 6
427
        test_gr_a5a5 7
428
.endif                          ; h8sx
429
 
430
btst_imm3_reg8:
431
        set_grs_a5a5
432
        set_ccr_zero
433
        ;; btst xx:3, reg8
434
        btst    #7, r0l         ; this should NOT set the zero flag.
435
        test_cc_clear
436
        btst    #6, r0l         ; this should set the zero flag.
437
        test_carry_clear
438
        test_ovf_clear
439
        test_neg_clear
440
        test_zero_set
441
 
442
        test_grs_a5a5           ; general registers should not be changed.
443
 
444
btst_imm3_ind:
445
        set_grs_a5a5
446
.if (sim_cpu == h8300)
447
        mov     #byte_src, r1
448
        set_ccr_zero
449
        ;; btst xx:3, ind
450
        btst    #7, @r1         ; this should NOT set the zero flag.
451
        test_cc_clear
452
        btst    #6, @r1         ; this should set the zero flag.
453
        test_carry_clear
454
        test_ovf_clear
455
        test_neg_clear
456
        test_zero_set
457
;;;     test_h_gr16  byte_src r1        ;FIXME
458
.else
459
        mov     #byte_src, er1
460
        set_ccr_zero
461
        ;; btst xx:3, ind
462
        btst    #7, @er1        ; this should NOT set the zero flag.
463
        test_cc_clear
464
        btst    #6, @er1        ; this should NOT set the zero flag.
465
        test_carry_clear
466
        test_ovf_clear
467
        test_neg_clear
468
        test_zero_set
469
        test_h_gr32  byte_src er1
470
.endif                          ; h8300
471
        test_gr_a5a5 0           ; general registers should not be changed.
472
        test_gr_a5a5 2
473
        test_gr_a5a5 3
474
        test_gr_a5a5 4
475
        test_gr_a5a5 5
476
        test_gr_a5a5 6
477
        test_gr_a5a5 7
478
 
479
btst_imm3_abs8:
480
        set_grs_a5a5
481
        mov.b   r1l, @0x20
482
        set_ccr_zero
483
        ;; btst xx:3, aa:8
484
        btst    #7, @0x20:8     ; this should NOT set the zero flag.
485
        test_cc_clear
486
        btst    #6, @0x20:8     ; this should set the zero flag.
487
        test_carry_clear
488
        test_ovf_clear
489
        test_neg_clear
490
        test_zero_set
491
 
492
        test_grs_a5a5           ; general registers should not be changed.
493
 
494
.if (sim_cpu > h8300h)
495
btst_imm3_abs16:
496
        set_grs_a5a5
497
        set_ccr_zero
498
        ;; btst xx:3, aa:16
499
        btst    #7, @byte_src:16        ; this should NOT set the zero flag.
500
        test_cc_clear
501
        btst    #6, @byte_src:16        ; this should set the zero flag.
502
        test_carry_clear
503
        test_ovf_clear
504
        test_neg_clear
505
        test_zero_set
506
 
507
        test_grs_a5a5           ; general registers should not be changed.
508
 
509
btst_imm3_abs32:
510
        set_grs_a5a5
511
        set_ccr_zero
512
        ;; btst xx:3, aa:32
513
        btst    #7, @byte_src:32        ; this should NOT set the zero flag.
514
        test_cc_clear
515
        btst    #6, @byte_src:32        ; this should set the zero flag.
516
        test_carry_clear
517
        test_ovf_clear
518
        test_neg_clear
519
        test_zero_set
520
 
521
        test_grs_a5a5           ; general registers should not be changed.
522
.endif
523
 
524
        pass
525
        exit 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.