OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [h8300/] [cmpb.s] - Blame information for rev 827

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
# Hitachi H8 testcase 'cmp.b'
2
# mach(): all
3
# as(h8300):    --defsym sim_cpu=0
4
# as(h8300h):   --defsym sim_cpu=1
5
# as(h8300s):   --defsym sim_cpu=2
6
# as(h8sx):     --defsym sim_cpu=3
7
# ld(h8300h):   -m h8300helf
8
# ld(h8300s):   -m h8300self
9
# ld(h8sx):     -m h8300sxelf
10
 
11
        .include "testutils.inc"
12
 
13
        # Instructions tested:
14
        # cmp.b #xx:8, rd       ;                     a rd   xxxxxxxx
15
        # cmp.b #xx:8, @erd     ;         7 d rd ???? a ???? xxxxxxxx
16
        # cmp.b #xx:8, @erd+    ; 0 1 7 4 6 c rd 1??? a ???? xxxxxxxx
17
        # cmp.b #xx:8, @erd-    ; 0 1 7 6 6 c rd 1??? a ???? xxxxxxxx
18
        # cmp.b #xx:8, @+erd    ; 0 1 7 5 6 c rd 1??? a ???? xxxxxxxx
19
        # cmp.b #xx:8, @-erd    ; 0 1 7 7 6 c rd 1??? a ???? xxxxxxxx
20
        # cmp.b rs, rd          ;                     1 c rs rd
21
        # cmp.b reg8, @erd      ;         7 d rd ???? 1 c rs ????
22
        # cmp.b reg8, @erd+     ;         0 1 7     9 8 rd 2 rs
23
        # cmp.b reg8, @erd-     ;         0 1 7     9 a rd 2 rs
24
        # cmp.b reg8, @+erd     ;         0 1 7     9 9 rd 2 rs
25
        # cmp.b reg8, @-erd     ;         0 1 7     9 b rd 2 rs
26
        # cmp.b rsind, rdind         ; 7 c 0rs 5 0 ?rd 2 ????
27
        # cmp.b rspostinc, rdpostinc ; 0 1 7 4 6 c 0rs c 8 ?rd 2 ????
28
        # cmp.b rspostdec, rdpostdec ; 0 1 7 6 6 c 0rs c a ?rd 2 ????
29
        # cmp.b rspreinc, rdpreinc   ; 0 1 7 5 6 c 0rs c 9 ?rd 2 ????
30
        # cmp.b rspredec, rdpredec   ; 0 1 7 7 6 c 0rs c b ?rd 2 ????
31
        # cmp.b disp2, disp2         ; 0 1 7 01dd:2 6 8 0rs c 00dd:2 ?rd 2 ????
32
        # cmp.b disp16, disp16       ; 0 1 7 4 6 e 0rs c dd:16 c 0rd 2 ???? dd:16
33
        # cmp.b disp32, disp32       ; 7 8 0rs 4 6 a 2 c dd:32 c 1rd 2 ???? dd:32
34
        # cmp.b indexb16, indexb16   ; 0 1 7 5 6 e 0rs c dd:16 d 0rd 2 ???? dd:16
35
        # cmp.b indexw16, indexw16   ; 0 1 7 6 6 e 0rs c dd:16 e 0rd 2 ???? dd:16
36
        # cmp.b indexl16, indexl16   ; 0 1 7 7 6 e 0rs c dd:16 f 0rd 2 ???? dd:16
37
        # cmp.b indexb32, indexb32   ; 7 8 0rs 5 6 a 2 c dd:32 d 1rd 2 ???? dd:32
38
        # cmp.b indexw32, indexw32   ; 7 8 0rs 6 6 a 2 c dd:32 e 1rd 2 ???? dd:32
39
        # cmp.b indexl32, indexl32   ; 7 8 0rs 7 6 a 2 c dd:32 f 1rd 2 ???? dd:32
40
        # cmp.b abs16, abs16         ; 6 a 1 5 aa:16 4 0??? 2 ???? aa:16
41
        # cmp.b abs32, abs32         ; 6 a 3 5 aa:32 4 1??? 2 ???? aa:32
42
        #
43
 
44
        # Coming soon:
45
 
46
        # ...
47
 
48
.data
49
byte_src:       .byte 0x5a
50
pre_byte:       .byte 0
51
byte_dst:       .byte 0xa5
52
post_byte:      .byte 0
53
 
54
        start
55
 
56
cmp_b_imm8_reg8:
57
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
58
        ;;  fixme set ccr
59
 
60
        ;;  cmp.b #xx:8,Rd
61
        cmp.b   #0xa5, r0l      ; Immediate 8-bit src, reg8 dest
62
        beq     .Leq1
63
        fail
64
.Leq1:  cmp.b   #0xa6, r0l
65
        blt     .Llt1
66
        fail
67
.Llt1:  cmp.b   #0xa4, r0l
68
        bgt     .Lgt1
69
        fail
70
.Lgt1:
71
        ;; fixme test ccr       ; H=0 N=1 Z=0 V=0 C=0
72
        test_h_gr16 0xa5a5 r0   ; r0 unchanged
73
.if (sim_cpu)                   ; non-zero means h8300h, s, or sx
74
        test_h_gr32 0xa5a5a5a5 er0      ; er0 unchanged
75
.endif
76
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
77
        test_gr_a5a5 2
78
        test_gr_a5a5 3
79
        test_gr_a5a5 4
80
        test_gr_a5a5 5
81
        test_gr_a5a5 6
82
        test_gr_a5a5 7
83
 
84
.if (sim_cpu == h8sx)
85
cmp_b_imm8_rdind:
86
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
87
        set_ccr_zero
88
 
89
        ;;  cmp.b #xx:8,@eRd
90
        mov     #byte_dst, er0
91
        cmp.b   #0xa5:8, @er0   ; Immediate 8-bit src, reg indirect dst
92
;;;     .word   0x7d00
93
;;;     .word   0xa0a5
94
        beq     .Leq2
95
        fail
96
.Leq2:  set_ccr_zero
97
        cmp.b   #0xa6, @er0
98
;;;     .word   0x7d00
99
;;;     .word   0xa0a6
100
        blt     .Llt2
101
        fail
102
.Llt2:  set_ccr_zero
103
        cmp.b   #0xa4, @er0
104
;;;     .word   0x7d00
105
;;;     .word   0xa0a4
106
        bgt     .Lgt2
107
        fail
108
.Lgt2:
109
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
110
        test_ovf_clear
111
        test_zero_clear
112
        test_neg_clear
113
 
114
        test_h_gr32 byte_dst er0        ; er0 still contains address
115
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
116
        test_gr_a5a5 2
117
        test_gr_a5a5 3
118
        test_gr_a5a5 4
119
        test_gr_a5a5 5
120
        test_gr_a5a5 6
121
        test_gr_a5a5 7
122
 
123
        ;; Now check the result of the cmp to memory (memory unchanged).
124
        sub.b   r0l, r0l
125
        mov.b   @byte_dst, r0l
126
        cmp.b   #0xa5, r0l
127
        beq     .L2
128
        fail
129
.L2:
130
 
131
cmp_b_imm8_rdpostinc:
132
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
133
        set_ccr_zero
134
 
135
        ;;  cmp.b #xx:8,@eRd+
136
        mov     #byte_dst, er0
137
        cmp.b   #0xa5:8, @er0+  ; Immediate 8-bit src, reg postinc dst
138
;;;     .word   0x0174
139
;;;     .word   0x6c08
140
;;;     .word   0xa0a5
141
        beq     .Leq3
142
        fail
143
.Leq3:  test_h_gr32 post_byte er0       ; er0 contains address plus one
144
        mov     #byte_dst, er0
145
        set_ccr_zero
146
        cmp.b   #0xa6, @er0+
147
;;;     .word   0x0174
148
;;;     .word   0x6c08
149
;;;     .word   0xa0a6
150
        blt     .Llt3
151
        fail
152
.Llt3:  test_h_gr32 post_byte er0       ; er0 contains address plus one
153
        mov     #byte_dst, er0
154
        set_ccr_zero
155
        cmp.b   #0xa4, @er0+
156
;;;     .word   0x0174
157
;;;     .word   0x6c08
158
;;;     .word   0xa0a4
159
        bgt     .Lgt3
160
        fail
161
.Lgt3:
162
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
163
        test_ovf_clear
164
        test_zero_clear
165
        test_neg_clear
166
 
167
        test_h_gr32 post_byte er0       ; er0 contains address plus one
168
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
169
        test_gr_a5a5 2
170
        test_gr_a5a5 3
171
        test_gr_a5a5 4
172
        test_gr_a5a5 5
173
        test_gr_a5a5 6
174
        test_gr_a5a5 7
175
 
176
        ;; Now check the result of the cmp to memory (memory unchanged).
177
        sub.b   r0l, r0l
178
        mov.b   @byte_dst, r0l
179
        cmp.b   #0xa5, r0l
180
        beq     .L3
181
        fail
182
.L3:
183
 
184
cmp_b_imm8_rdpostdec:
185
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
186
        set_ccr_zero
187
 
188
        ;;  cmp.b #xx:8,@eRd-
189
        mov     #byte_dst, er0
190
        cmp.b   #0xa5:8, @er0-  ; Immediate 8-bit src, reg postdec dst
191
;;;     .word   0x0176
192
;;;     .word   0x6c08
193
;;;     .word   0xa0a5
194
        beq     .Leq4
195
        fail
196
.Leq4:  test_h_gr32 pre_byte er0        ; er0 contains address minus one
197
        mov     #byte_dst, er0
198
        set_ccr_zero
199
        cmp.b   #0xa6, @er0-
200
;;;     .word   0x0176
201
;;;     .word   0x6c08
202
;;;     .word   0xa0a6
203
        blt     .Llt4
204
        fail
205
.Llt4:  test_h_gr32 pre_byte er0        ; er0 contains address minus one
206
        mov     #byte_dst, er0
207
        set_ccr_zero
208
        cmp.b   #0xa4, @er0-
209
;;;     .word   0x0176
210
;;;     .word   0x6c08
211
;;;     .word   0xa0a4
212
        bgt     .Lgt4
213
        fail
214
.Lgt4:
215
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
216
        test_ovf_clear
217
        test_zero_clear
218
        test_neg_clear
219
 
220
        test_h_gr32 pre_byte er0        ; er0 contains address minus one
221
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
222
        test_gr_a5a5 2
223
        test_gr_a5a5 3
224
        test_gr_a5a5 4
225
        test_gr_a5a5 5
226
        test_gr_a5a5 6
227
        test_gr_a5a5 7
228
 
229
        ;; Now check the result of the cmp to memory (memory unchanged).
230
        sub.b   r0l, r0l
231
        mov.b   @byte_dst, r0l
232
        cmp.b   #0xa5, r0l
233
        beq     .L4
234
        fail
235
.L4:
236
 
237
cmp_b_imm8_rdpreinc:
238
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
239
        set_ccr_zero
240
 
241
        ;;  cmp.b #xx:8,@+eRd
242
        mov     #pre_byte, er0
243
        cmp.b   #0xa5:8, @+er0  ; Immediate 8-bit src, reg pre-inc dst
244
;;;     .word   0x0175
245
;;;     .word   0x6c08
246
;;;     .word   0xa0a5
247
        beq     .Leq5
248
        fail
249
.Leq5:  test_h_gr32 byte_dst er0        ; er0 contains destination address 
250
        mov     #pre_byte, er0
251
        set_ccr_zero
252
        cmp.b   #0xa6, @+er0
253
;;;     .word   0x0175
254
;;;     .word   0x6c08
255
;;;     .word   0xa0a6
256
        blt     .Llt5
257
        fail
258
.Llt5:  test_h_gr32 byte_dst er0        ; er0 contains destination address 
259
        mov     #pre_byte, er0
260
        set_ccr_zero
261
        cmp.b   #0xa4, @+er0
262
;;;     .word   0x0175
263
;;;     .word   0x6c08
264
;;;     .word   0xa0a4
265
        bgt     .Lgt5
266
        fail
267
.Lgt5:
268
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
269
        test_ovf_clear
270
        test_zero_clear
271
        test_neg_clear
272
 
273
        test_h_gr32 byte_dst er0        ; er0 contains destination address 
274
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
275
        test_gr_a5a5 2
276
        test_gr_a5a5 3
277
        test_gr_a5a5 4
278
        test_gr_a5a5 5
279
        test_gr_a5a5 6
280
        test_gr_a5a5 7
281
 
282
        ;; Now check the result of the cmp to memory (memory unchanged).
283
        sub.b   r0l, r0l
284
        mov.b   @byte_dst, r0l
285
        cmp.b   #0xa5, r0l
286
        beq     .L5
287
        fail
288
.L5:
289
 
290
cmp_b_imm8_rdpredec:
291
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
292
        set_ccr_zero
293
 
294
        ;;  cmp.b #xx:8,@-eRd
295
        mov     #post_byte, er0
296
        cmp.b   #0xa5:8, @-er0  ; Immediate 8-bit src, reg pre-dec dst
297
;;;     .word   0x0177
298
;;;     .word   0x6c08
299
;;;     .word   0xa0a5
300
        beq     .Leq6
301
        fail
302
.Leq6:  test_h_gr32 byte_dst er0        ; er0 contains destination address 
303
        mov     #post_byte, er0
304
        set_ccr_zero
305
        cmp.b   #0xa6, @-er0
306
;;;     .word   0x0177
307
;;;     .word   0x6c08
308
;;;     .word   0xa0a6
309
        blt     .Llt6
310
        fail
311
.Llt6:  test_h_gr32 byte_dst er0        ; er0 contains destination address 
312
        mov     #post_byte, er0
313
        set_ccr_zero
314
        cmp.b   #0xa4, @-er0
315
;;;     .word   0x0177
316
;;;     .word   0x6c08
317
;;;     .word   0xa0a4
318
        bgt     .Lgt6
319
        fail
320
.Lgt6:
321
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
322
        test_ovf_clear
323
        test_zero_clear
324
        test_neg_clear
325
 
326
        test_h_gr32 byte_dst er0        ; er0 contains destination address 
327
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
328
        test_gr_a5a5 2
329
        test_gr_a5a5 3
330
        test_gr_a5a5 4
331
        test_gr_a5a5 5
332
        test_gr_a5a5 6
333
        test_gr_a5a5 7
334
 
335
        ;; Now check the result of the cmp to memory (memory unchanged).
336
        sub.b   r0l, r0l
337
        mov.b   @byte_dst, r0l
338
        cmp.b   #0xa5, r0l
339
        beq     .L6
340
        fail
341
.L6:
342
 
343
 
344
.endif
345
 
346
cmp_b_reg8_reg8:
347
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
348
        ;;  fixme set ccr
349
 
350
        ;;  cmp.b Rs,Rd
351
        mov.b   #0xa5, r0h
352
        cmp.b   r0h, r0l        ; Reg8 src, reg8 dst
353
        beq     .Leq7
354
        fail
355
.Leq7:  mov.b   #0xa6, r0h
356
        cmp.b   r0h, r0l
357
        blt     .Llt7
358
        fail
359
.Llt7:  mov.b   #0xa4, r0h
360
        cmp.b   r0h, r0l
361
        bgt     .Lgt7
362
        fail
363
.Lgt7:
364
        ;; fixme test ccr       ; H=0 N=1 Z=0 V=0 C=0
365
        test_h_gr16 0xa4a5 r0   ; r0l unchanged.
366
.if (sim_cpu)                   ; non-zero means h8300h, s, or sx
367
        test_h_gr32 0xa5a5a4a5 er0      ; r0l unchanged
368
.endif
369
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
370
        test_gr_a5a5 2
371
        test_gr_a5a5 3
372
        test_gr_a5a5 4
373
        test_gr_a5a5 5
374
        test_gr_a5a5 6
375
        test_gr_a5a5 7
376
 
377
.if (sim_cpu == h8sx)
378
cmp_b_reg8_rdind:
379
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
380
        set_ccr_zero
381
 
382
        ;;  cmp.b rs8,@eRd      ; cmp reg8 to register indirect
383
        mov     #byte_dst, er0
384
        mov     #0xa5, r1l
385
        cmp.b   r1l, @er0       ; reg8 src, reg indirect dest
386
;;;     .word   0x7d00
387
;;;     .word   0x1c90
388
        beq     .Leq8
389
        fail
390
.Leq8:  set_ccr_zero
391
        mov     #0xa6, r1l
392
        cmp.b   r1l, @er0
393
;;;     .word   0x7d00
394
;;;     .word   0x1c90
395
        blt     .Llt8
396
        fail
397
.Llt8:  set_ccr_zero
398
        mov     #0xa4, r1l
399
        cmp.b   r1l, @er0
400
;;;     .word   0x7d00
401
;;;     .word   0x1c90
402
        bgt     .Lgt8
403
        fail
404
.Lgt8:
405
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
406
        test_ovf_clear
407
        test_zero_clear
408
        test_neg_clear
409
 
410
        test_h_gr32 byte_dst er0        ; er0 still contains address
411
        test_h_gr32 0xa5a5a5a4 er1      ; er1 has the test load
412
 
413
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
414
        test_gr_a5a5 3
415
        test_gr_a5a5 4
416
        test_gr_a5a5 5
417
        test_gr_a5a5 6
418
        test_gr_a5a5 7
419
 
420
        ;; Now check the result of the cmp to memory (no change).
421
        sub.b   r0l, r0l
422
        mov.b   @byte_dst, r0l
423
        cmp.b   #0xa5, r0l
424
        beq     .L8
425
        fail
426
.L8:
427
 
428
cmp_b_reg8_rdpostinc:
429
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
430
        set_ccr_zero
431
 
432
        ;;  cmp.b reg8,@eRd+
433
        mov     #byte_dst, er0
434
        mov     #0xa5, r1l
435
        cmp.b   r1l, @er0+      ; Immediate 8-bit src, reg post-incr dst
436
;;;     .word   0x0179
437
;;;     .word   0x8029
438
        beq     .Leq9
439
        fail
440
.Leq9:  test_h_gr32 post_byte er0       ; er0 contains address plus one
441
        mov     #byte_dst er0
442
        mov     #0xa6, r1l
443
        set_ccr_zero
444
        cmp.b   r1l, @er0+
445
;;;     .word   0x0179
446
;;;     .word   0x8029
447
        blt     .Llt9
448
        fail
449
.Llt9:  test_h_gr32 post_byte er0       ; er0 contains address plus one
450
        mov     #byte_dst er0
451
        mov     #0xa4, r1l
452
        set_ccr_zero
453
        cmp.b   r1l, @er0+
454
;;;     .word   0x0179
455
;;;     .word   0x8029
456
        bgt     .Lgt9
457
        fail
458
.Lgt9:
459
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
460
        test_ovf_clear
461
        test_zero_clear
462
        test_neg_clear
463
 
464
        test_h_gr32 post_byte er0       ; er0 contains address plus one
465
        test_h_gr32 0xa5a5a5a4 er1      ; er1 contains test load
466
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
467
        test_gr_a5a5 3
468
        test_gr_a5a5 4
469
        test_gr_a5a5 5
470
        test_gr_a5a5 6
471
        test_gr_a5a5 7
472
 
473
        ;; Now check the result of the cmp to memory (memory unchanged).
474
        sub.b   r0l, r0l
475
        mov.b   @byte_dst, r0l
476
        cmp.b   #0xa5, r0l
477
        beq     .L9
478
        fail
479
.L9:
480
 
481
cmp_b_reg8_rdpostdec:
482
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
483
        set_ccr_zero
484
 
485
        ;;  cmp.b reg8,@eRd-
486
        mov     #byte_dst, er0
487
        mov     #0xa5, r1l
488
        cmp.b   r1l, @er0-      ; Immediate 8-bit src, reg postdec dst
489
;;;     .word   0x0179
490
;;;     .word   0xa029
491
        beq     .Leq10
492
        fail
493
.Leq10: test_h_gr32 pre_byte er0        ; er0 contains address minus one
494
        mov     #byte_dst er0
495
        mov     #0xa6, r1l
496
        set_ccr_zero
497
        cmp.b   r1l, @er0-
498
;;;     .word   0x0179
499
;;;     .word   0xa029
500
        blt     .Llt10
501
        fail
502
.Llt10: test_h_gr32 pre_byte er0        ; er0 contains address minus one
503
        mov     #byte_dst er0
504
        mov     #0xa4, r1l
505
        set_ccr_zero
506
        cmp.b   r1l, @er0-
507
;;;     .word   0x0179
508
;;;     .word   0xa029
509
        bgt     .Lgt10
510
        fail
511
.Lgt10:
512
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
513
        test_ovf_clear
514
        test_zero_clear
515
        test_neg_clear
516
 
517
        test_h_gr32 pre_byte er0        ; er0 contains address minus one
518
        test_h_gr32 0xa5a5a5a4 er1      ; er1 contains test load
519
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
520
        test_gr_a5a5 3
521
        test_gr_a5a5 4
522
        test_gr_a5a5 5
523
        test_gr_a5a5 6
524
        test_gr_a5a5 7
525
 
526
        ;; Now check the result of the cmp to memory (memory unchanged).
527
        sub.b   r0l, r0l
528
        mov.b   @byte_dst, r0l
529
        cmp.b   #0xa5, r0l
530
        beq     .L10
531
        fail
532
.L10:
533
 
534
cmp_b_reg8_rdpreinc:
535
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
536
        set_ccr_zero
537
 
538
        ;;  cmp.b reg8,@+eRd
539
        mov     #pre_byte, er0
540
        mov     #0xa5, r1l
541
        cmp.b   r1l, @+er0      ; Immediate 8-bit src, reg post-incr dst
542
;;;     .word   0x0179
543
;;;     .word   0x9029
544
        beq     .Leq11
545
        fail
546
.Leq11: test_h_gr32 byte_dst er0        ; er0 contains destination address 
547
        mov     #pre_byte er0
548
        mov     #0xa6, r1l
549
        set_ccr_zero
550
        cmp.b   r1l, @+er0
551
;;;     .word   0x0179
552
;;;     .word   0x9029
553
        blt     .Llt11
554
        fail
555
.Llt11: test_h_gr32 byte_dst er0        ; er0 contains destination address 
556
        mov     #pre_byte er0
557
        mov     #0xa4, r1l
558
        set_ccr_zero
559
        cmp.b   r1l, @+er0
560
;;;     .word   0x0179
561
;;;     .word   0x9029
562
        bgt     .Lgt11
563
        fail
564
.Lgt11:
565
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
566
        test_ovf_clear
567
        test_zero_clear
568
        test_neg_clear
569
 
570
        test_h_gr32 byte_dst er0        ; er0 contains destination address 
571
        test_h_gr32 0xa5a5a5a4 er1      ; er1 contains test load
572
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
573
        test_gr_a5a5 3
574
        test_gr_a5a5 4
575
        test_gr_a5a5 5
576
        test_gr_a5a5 6
577
        test_gr_a5a5 7
578
 
579
        ;; Now check the result of the cmp to memory (memory unchanged).
580
        sub.b   r0l, r0l
581
        mov.b   @byte_dst, r0l
582
        cmp.b   #0xa5, r0l
583
        beq     .L11
584
        fail
585
.L11:
586
 
587
cmp_b_reg8_rdpredec:
588
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
589
        set_ccr_zero
590
 
591
        ;;  cmp.b reg8,@-eRd
592
        mov     #post_byte, er0
593
        mov     #0xa5, r1l
594
        cmp.b   r1l, @-er0      ; Immediate 8-bit src, reg postdec dst
595
;;;     .word   0x0179
596
;;;     .word   0xb029
597
        beq     .Leq12
598
        fail
599
.Leq12: test_h_gr32 byte_dst er0        ; er0 contains destination address 
600
        mov     #post_byte er0
601
        mov     #0xa6, r1l
602
        set_ccr_zero
603
        cmp.b   r1l, @-er0
604
;;;     .word   0x0179
605
;;;     .word   0xb029
606
        blt     .Llt12
607
        fail
608
.Llt12: test_h_gr32 byte_dst er0        ; er0 contains destination address 
609
        mov     #post_byte er0
610
        mov     #0xa4, r1l
611
        set_ccr_zero
612
        cmp.b   r1l, @-er0
613
;;;     .word   0x0179
614
;;;     .word   0xb029
615
        bgt     .Lgt12
616
        fail
617
.Lgt12:
618
        test_carry_clear        ; H=0 N=0 Z=0 V=0 C=0
619
        test_ovf_clear
620
        test_zero_clear
621
        test_neg_clear
622
 
623
        test_h_gr32 byte_dst er0        ; er0 contains destination address 
624
        test_h_gr32 0xa5a5a5a4 er1      ; er1 contains test load
625
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
626
        test_gr_a5a5 3
627
        test_gr_a5a5 4
628
        test_gr_a5a5 5
629
        test_gr_a5a5 6
630
        test_gr_a5a5 7
631
 
632
        ;; Now check the result of the cmp to memory (memory unchanged).
633
        sub.b   r0l, r0l
634
        mov.b   @byte_dst, r0l
635
        cmp.b   #0xa5, r0l
636
        beq     .L12
637
        fail
638
.L12:
639
 
640
cmp_b_rsind_rdind:
641
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
642
        mov     #byte_src, er1
643
        mov     #byte_dst, er2
644
        set_ccr_zero
645
        cmp.b   @er1, @er2
646
        test_neg_clear          ; N=0, Z=0, V=1, C=0
647
        test_zero_clear
648
        test_ovf_set
649
        test_carry_clear
650
 
651
        test_gr_a5a5    0
652
        test_h_gr32     byte_src er1
653
        test_h_gr32     byte_dst er2
654
        test_gr_a5a5    3
655
        test_gr_a5a5    4
656
        test_gr_a5a5    5
657
        test_gr_a5a5    6
658
        test_gr_a5a5    7
659
        cmp.b   #0x5a, @byte_src:16
660
        bne     fail1
661
        cmp.b   #0xa5, @byte_dst:16
662
        bne     fail1
663
.if 1                           ; ambiguous
664
cmp_b_rspostinc_rdpostinc:
665
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
666
        mov     #byte_src, er1
667
        mov     #byte_dst, er2
668
        set_ccr_zero
669
        cmp.b   @er1+, @er2+
670
;;;     .word   0x0174
671
;;;     .word   0x6c1c
672
;;;     .word   0x8220
673
 
674
        test_neg_clear          ; N=0, Z=0, V=1, C=0
675
        test_zero_clear
676
        test_ovf_set
677
        test_carry_clear
678
 
679
        test_gr_a5a5    0
680
        test_h_gr32     byte_src+1 er1
681
        test_h_gr32     byte_dst+1 er2
682
        test_gr_a5a5    3
683
        test_gr_a5a5    4
684
        test_gr_a5a5    5
685
        test_gr_a5a5    6
686
        test_gr_a5a5    7
687
        cmp.b   #0x5a, @byte_src:16
688
        bne     fail1
689
        cmp.b   #0xa5, @byte_dst:16
690
        bne     fail1
691
.endif
692
.if 1                           ; ambiguous
693
cmp_b_rspostdec_rdpostdec:
694
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
695
        mov     #byte_src, er1
696
        mov     #byte_dst, er2
697
        set_ccr_zero
698
        cmp.b   @er1-, @er2-
699
;;;     .word   0x0176
700
;;;     .word   0x6c1c
701
;;;     .word   0xa220
702
 
703
        test_neg_clear          ; N=0, Z=0, V=1, C=0
704
        test_zero_clear
705
        test_ovf_set
706
        test_carry_clear
707
 
708
        test_gr_a5a5    0
709
        test_h_gr32     byte_src-1 er1
710
        test_h_gr32     byte_dst-1 er2
711
        test_gr_a5a5    3
712
        test_gr_a5a5    4
713
        test_gr_a5a5    5
714
        test_gr_a5a5    6
715
        test_gr_a5a5    7
716
        cmp.b   #0x5a, @byte_src:16
717
        bne     fail1
718
        cmp.b   #0xa5, @byte_dst:16
719
        bne     fail1
720
.endif
721
 
722
cmp_b_rspreinc_rdpreinc:
723
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
724
        mov     #byte_src-1, er1
725
        mov     #byte_dst-1, er2
726
        set_ccr_zero
727
        cmp.b   @+er1, @+er2
728
;;;     .word   0x0175
729
;;;     .word   0x6c1c
730
;;;     .word   0x9220
731
 
732
        test_neg_clear          ; N=0, Z=0, V=1, C=0
733
        test_zero_clear
734
        test_ovf_set
735
        test_carry_clear
736
 
737
        test_gr_a5a5    0
738
        test_h_gr32     byte_src er1
739
        test_h_gr32     byte_dst er2
740
        test_gr_a5a5    3
741
        test_gr_a5a5    4
742
        test_gr_a5a5    5
743
        test_gr_a5a5    6
744
        test_gr_a5a5    7
745
        cmp.b   #0x5a, @byte_src:16
746
        bne     fail1
747
        cmp.b   #0xa5, @byte_dst:16
748
        bne     fail1
749
 
750
cmp_b_rspredec_predec:
751
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
752
        mov     #byte_src+1, er1
753
        mov     #byte_dst+1, er2
754
        set_ccr_zero
755
        cmp.b   @-er1, @-er2
756
;;;     .word   0x0177
757
;;;     .word   0x6c1c
758
;;;     .word   0xb220
759
 
760
        test_neg_clear          ; N=0, Z=0, V=1, C=0
761
        test_zero_clear
762
        test_ovf_set
763
        test_carry_clear
764
 
765
        test_gr_a5a5    0
766
        test_h_gr32     byte_src er1
767
        test_h_gr32     byte_dst er2
768
        test_gr_a5a5    3
769
        test_gr_a5a5    4
770
        test_gr_a5a5    5
771
        test_gr_a5a5    6
772
        test_gr_a5a5    7
773
        cmp.b   #0x5a, @byte_src:16
774
        bne     fail1
775
        cmp.b   #0xa5, @byte_dst:16
776
        bne     fail1
777
 
778
cmp_b_disp2_disp2:
779
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
780
        mov     #byte_src-1, er1
781
        mov     #byte_dst-2, er2
782
        set_ccr_zero
783
        cmp.b   @(1:2, er1), @(2:2, er2)
784
;;;     .word   0x0175
785
;;;     .word   0x681c
786
;;;     .word   0x2220
787
 
788
        test_neg_clear          ; N=0, Z=0, V=1, C=0
789
        test_zero_clear
790
        test_ovf_set
791
        test_carry_clear
792
 
793
        test_gr_a5a5    0
794
        test_h_gr32     byte_src-1 er1
795
        test_h_gr32     byte_dst-2 er2
796
        test_gr_a5a5    3
797
        test_gr_a5a5    4
798
        test_gr_a5a5    5
799
        test_gr_a5a5    6
800
        test_gr_a5a5    7
801
        cmp.b   #0x5a, @byte_src:16
802
        bne     fail1
803
        cmp.b   #0xa5, @byte_dst:16
804
        bne     fail1
805
 
806
cmp_b_disp16_disp16:
807
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
808
        mov     #byte_src-3, er1
809
        mov     #byte_dst-4, er2
810
        set_ccr_zero
811
        cmp.b   @(3:16, er1), @(4:16, er2)
812
;;;     .word   0x0174
813
;;;     .word   0x6e1c
814
;;;     .word   3
815
;;;     .word   0xc220
816
;;;     .word   4
817
 
818
        test_neg_clear          ; N=0, Z=0, V=1, C=0
819
        test_zero_clear
820
        test_ovf_set
821
        test_carry_clear
822
 
823
        test_gr_a5a5    0
824
        test_h_gr32     byte_src-3 er1
825
        test_h_gr32     byte_dst-4 er2
826
        test_gr_a5a5    3
827
        test_gr_a5a5    4
828
        test_gr_a5a5    5
829
        test_gr_a5a5    6
830
        test_gr_a5a5    7
831
        cmp.b   #0x5a, @byte_src:16
832
        bne     fail1
833
        cmp.b   #0xa5, @byte_dst:16
834
        bne     fail1
835
 
836
cmp_b_disp32_disp32:
837
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
838
        mov     #byte_src+5, er1
839
        mov     #byte_dst+6, er2
840
        set_ccr_zero
841
        cmp.b   @(-5:32, er1), @(-6:32, er2)
842
;;;     .word   0x7814
843
;;;     .word   0x6a2c
844
;;;     .long   -5
845
;;;     .word   0xca20
846
;;;     .long   -6
847
 
848
        test_neg_clear          ; N=0, Z=0, V=1, C=0
849
        test_zero_clear
850
        test_ovf_set
851
        test_carry_clear
852
 
853
        test_gr_a5a5    0
854
        test_h_gr32     byte_src+5 er1
855
        test_h_gr32     byte_dst+6 er2
856
        test_gr_a5a5    3
857
        test_gr_a5a5    4
858
        test_gr_a5a5    5
859
        test_gr_a5a5    6
860
        test_gr_a5a5    7
861
        cmp.b   #0x5a, @byte_src:16
862
        bne     fail1
863
        cmp.b   #0xa5, @byte_dst:16
864
        bne     fail1
865
 
866
cmp_b_indexb16_indexb16:
867
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
868
        mov     #0xffffff01, er1
869
        mov     #0xffffff02, er2
870
        set_ccr_zero
871
        cmp.b   @(byte_src-1:16, r1.b), @(byte_dst-2:16, r2.b)
872
;;;     .word   0x0175
873
;;;     .word   0x6e1c
874
;;;     .word   byte_src-1
875
;;;     .word   0xd220
876
;;;     .word   byte_dst-2
877
 
878
        test_neg_clear          ; N=0, Z=0, V=1, C=0
879
        test_zero_clear
880
        test_ovf_set
881
        test_carry_clear
882
 
883
        test_gr_a5a5    0
884
        test_h_gr32     0xffffff01 er1
885
        test_h_gr32     0xffffff02 er2
886
        test_gr_a5a5    3
887
        test_gr_a5a5    4
888
        test_gr_a5a5    5
889
        test_gr_a5a5    6
890
        test_gr_a5a5    7
891
        cmp.b   #0x5a, @byte_src:16
892
        bne     fail1
893
        cmp.b   #0xa5, @byte_dst:16
894
        bne     fail1
895
.if 1                           ; ambiguous
896
cmp_b_indexw16_indexw16:
897
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
898
        mov     #0xffff0003, er1
899
        mov     #0xffff0004, er2
900
        set_ccr_zero
901
        cmp.b   @(byte_src-3:16, r1.w), @(byte_dst-4:16, r2.w)
902
;;;     .word   0x0176
903
;;;     .word   0x6e1c
904
;;;     .word   byte_src-3
905
;;;     .word   0xe220
906
;;;     .word   byte_dst-4
907
 
908
        test_neg_clear          ; N=0, Z=0, V=1, C=0
909
        test_zero_clear
910
        test_ovf_set
911
        test_carry_clear
912
 
913
        test_gr_a5a5    0
914
        test_h_gr32     0xffff0003 er1
915
        test_h_gr32     0xffff0004 er2
916
        test_gr_a5a5    3
917
        test_gr_a5a5    4
918
        test_gr_a5a5    5
919
        test_gr_a5a5    6
920
        test_gr_a5a5    7
921
        cmp.b   #0x5a, @byte_src:16
922
        bne     fail1
923
        cmp.b   #0xa5, @byte_dst:16
924
        bne     fail1
925
.endif
926
 
927
cmp_b_indexl16_indexl16:
928
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
929
        mov     #0x00000005, er1
930
        mov     #0x00000006, er2
931
        set_ccr_zero
932
        cmp.b   @(byte_src-5:16, er1.l), @(byte_dst-6:16, er2.l)
933
;;;     .word   0x0177
934
;;;     .word   0x6e1c
935
;;;     .word   byte_src-5
936
;;;     .word   0xf220
937
;;;     .word   byte_dst-6
938
 
939
        test_neg_clear          ; N=0, Z=0, V=1, C=0
940
        test_zero_clear
941
        test_ovf_set
942
        test_carry_clear
943
 
944
        test_gr_a5a5    0
945
        test_h_gr32     0x00000005 er1
946
        test_h_gr32     0x00000006 er2
947
        test_gr_a5a5    3
948
        test_gr_a5a5    4
949
        test_gr_a5a5    5
950
        test_gr_a5a5    6
951
        test_gr_a5a5    7
952
        cmp.b   #0x5a, @byte_src:16
953
        bne     fail1
954
        cmp.b   #0xa5, @byte_dst:16
955
        bne     fail1
956
 
957
cmp_b_indexb32_indexb32:
958
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
959
        mov     #0xffffff01, er1
960
        mov     #0xffffff02, er2
961
        set_ccr_zero
962
        cmp.b   @(byte_src-1:32, r1.b), @(byte_dst-2:32, r2.b)
963
;;;     .word   0x7815
964
;;;     .word   0x6a2c
965
;;;     .long   byte_src-1
966
;;;     .word   0xda20
967
;;;     .long   byte_dst-2
968
 
969
        test_neg_clear          ; N=0, Z=0, V=1, C=0
970
        test_zero_clear
971
        test_ovf_set
972
        test_carry_clear
973
 
974
        test_gr_a5a5    0
975
        test_h_gr32     0xffffff01 er1
976
        test_h_gr32     0xffffff02 er2
977
        test_gr_a5a5    3
978
        test_gr_a5a5    4
979
        test_gr_a5a5    5
980
        test_gr_a5a5    6
981
        test_gr_a5a5    7
982
        cmp.b   #0x5a, @byte_src:16
983
        bne     fail1
984
        cmp.b   #0xa5, @byte_dst:16
985
        bne     fail1
986
 
987
.if 1                           ; ambiguous
988
cmp_b_indexw32_indexw32:
989
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
990
        mov     #0xffff0003, er1
991
        mov     #0xffff0004, er2
992
        set_ccr_zero
993
        cmp.b   @(byte_src-3:32, r1.w), @(byte_dst-4:32, r2.w)
994
;;;     .word   0x7816
995
;;;     .word   0x6a2c
996
;;;     .long   byte_src-3
997
;;;     .word   0xea20
998
;;;     .long   byte_dst-4
999
 
1000
        test_neg_clear          ; N=0, Z=0, V=1, C=0
1001
        test_zero_clear
1002
        test_ovf_set
1003
        test_carry_clear
1004
 
1005
        test_gr_a5a5    0
1006
        test_h_gr32     0xffff0003 er1
1007
        test_h_gr32     0xffff0004 er2
1008
        test_gr_a5a5    3
1009
        test_gr_a5a5    4
1010
        test_gr_a5a5    5
1011
        test_gr_a5a5    6
1012
        test_gr_a5a5    7
1013
        cmp.b   #0x5a, @byte_src:16
1014
        bne     fail1
1015
        cmp.b   #0xa5, @byte_dst:16
1016
        bne     fail1
1017
.endif
1018
 
1019
cmp_b_indexl32_indexl32:
1020
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1021
        mov     #0x00000005, er1
1022
        mov     #0x00000006, er2
1023
        set_ccr_zero
1024
        cmp.b   @(byte_src-5:32, er1.l), @(byte_dst-6:32, er2.l)
1025
;;;     .word   0x7817
1026
;;;     .word   0x6a2c
1027
;;;     .long   byte_src-5
1028
;;;     .word   0xfa20
1029
;;;     .long   byte_dst-6
1030
 
1031
        test_neg_clear          ; N=0, Z=0, V=1, C=0
1032
        test_zero_clear
1033
        test_ovf_set
1034
        test_carry_clear
1035
 
1036
        test_gr_a5a5    0
1037
        test_h_gr32     0x00000005 er1
1038
        test_h_gr32     0x00000006 er2
1039
        test_gr_a5a5    3
1040
        test_gr_a5a5    4
1041
        test_gr_a5a5    5
1042
        test_gr_a5a5    6
1043
        test_gr_a5a5    7
1044
        cmp.b   #0x5a, @byte_src:16
1045
        bne     fail1
1046
        cmp.b   #0xa5, @byte_dst:16
1047
        bne     fail1
1048
 
1049
cmp_b_abs16_abs16:
1050
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1051
        set_ccr_zero
1052
        cmp.b   @byte_src:16, @byte_dst:16
1053
 
1054
        test_neg_clear          ; N=0, Z=0, V=1, C=0
1055
        test_zero_clear
1056
        test_ovf_set
1057
        test_carry_clear
1058
 
1059
        test_grs_a5a5
1060
        cmp.b   #0x5a, @byte_src:16
1061
        bne     fail1
1062
        cmp.b   #0xa5, @byte_dst:16
1063
        bne     fail1
1064
 
1065
cmp_b_abs32_abs32:
1066
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1067
        set_ccr_zero
1068
        cmp.b   @byte_src:32, @byte_dst:32
1069
 
1070
        test_neg_clear          ; N=0, Z=0, V=1, C=0
1071
        test_zero_clear
1072
        test_ovf_set
1073
        test_carry_clear
1074
 
1075
        test_grs_a5a5
1076
        cmp.b   #0x5a, @byte_src:16
1077
        bne     fail1
1078
        cmp.b   #0xa5, @byte_dst:16
1079
        bne     fail1
1080
 
1081
.endif
1082
        pass
1083
 
1084
        exit 0
1085
 
1086
fail1:  fail

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.