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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [h8300/] [movw.s] - Blame information for rev 840

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Line No. Rev Author Line
1 24 jeremybenn 
# Hitachi H8 testcase 'mov.w'
2 
# mach(): h8300h h8300s h8sx
3 
# as(h8300h):   --defsym sim_cpu=1
4 
# as(h8300s):   --defsym sim_cpu=2
5 
# as(h8sx):     --defsym sim_cpu=3
6 
# ld(h8300h):   -m h8300helf
7 
# ld(h8300s):   -m h8300self
8 
# ld(h8sx):     -m h8300sxelf
9 
 
10 
        .include "testutils.inc"
11 
 
12 
        start
13 
 
14 
        .data
15 
        .align  2
16 
word_src:
17 
        .word   0x7777
18 
word_dst:
19 
        .word   0
20 
 
21 
        .text
22 
 
23 
        ;;
24 
        ;; Move word from immediate source
25 
        ;;
26 
 
27 
.if (sim_cpu == h8sx)
28 
mov_w_imm3_to_reg16:
29 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
30 
        set_ccr_zero
31 
 
32 
        ;; mov.w #xx:3, rd
33 
        mov.w   #0x3:3, r0      ; Immediate 3-bit operand
34 
;;;     .word   0x0f30
35 
 
36 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
37 
        test_neg_clear
38 
        test_zero_clear
39 
        test_ovf_clear
40 
        test_carry_clear
41 
 
42 
        test_h_gr32 0xa5a50003 er0
43 
 
44 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
45 
        test_gr_a5a5 2
46 
        test_gr_a5a5 3
47 
        test_gr_a5a5 4
48 
        test_gr_a5a5 5
49 
        test_gr_a5a5 6
50 
        test_gr_a5a5 7
51 
.endif
52 
 
53 
mov_w_imm16_to_reg16:
54 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
55 
        set_ccr_zero
56 
 
57 
        ;; mov.w #xx:16, rd
58 
        mov.w   #0x1234, r0     ; Immediate 16-bit operand
59 
;;;     .word   0x7900
60 
;;;     .word   0x1234
61 
 
62 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
63 
        test_neg_clear
64 
        test_zero_clear
65 
        test_ovf_clear
66 
        test_carry_clear
67 
 
68 
        test_h_gr32 0xa5a51234 er0
69 
 
70 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
71 
        test_gr_a5a5 2
72 
        test_gr_a5a5 3
73 
        test_gr_a5a5 4
74 
        test_gr_a5a5 5
75 
        test_gr_a5a5 6
76 
        test_gr_a5a5 7
77 
 
78 
.if (sim_cpu == h8sx)
79 
mov_w_imm4_to_abs16:
80 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
81 
        set_ccr_zero
82 
 
83 
        ;; mov.w #xx:4, @aa:16
84 
        mov.w   #0xf:4, @word_dst:16    ; 4-bit imm to 16-bit address-direct
85 
;;;     .word   0x6bdf
86 
;;;     .word   @word_dst
87 
 
88 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
89 
        test_neg_clear
90 
        test_zero_clear
91 
        test_ovf_clear
92 
        test_carry_clear
93 
 
94 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
95 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
96 
        test_gr_a5a5 2          ; to examine the destination memory).
97 
        test_gr_a5a5 3
98 
        test_gr_a5a5 4
99 
        test_gr_a5a5 5
100 
        test_gr_a5a5 6
101 
        test_gr_a5a5 7
102 
 
103 
        ;; Now check the result of the move to memory.
104 
        cmp.w   #0xf, @word_dst
105 
        beq     .Lnext21
106 
        fail
107 
.Lnext21:
108 
        mov.w   #0, @word_dst    ; zero it again for the next use.
109 
 
110 
mov_w_imm4_to_abs32:
111 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
112 
        set_ccr_zero
113 
 
114 
        ;; mov.w #xx:4, @aa:32
115 
        mov.w   #0xf:4, @word_dst:32    ; 4-bit imm to 32-bit address-direct
116 
;;;     .word   0x6bff
117 
;;;     .long   @word_dst
118 
 
119 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
120 
        test_neg_clear
121 
        test_zero_clear
122 
        test_ovf_clear
123 
        test_carry_clear
124 
 
125 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
126 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
127 
        test_gr_a5a5 2          ; to examine the destination memory).
128 
        test_gr_a5a5 3
129 
        test_gr_a5a5 4
130 
        test_gr_a5a5 5
131 
        test_gr_a5a5 6
132 
        test_gr_a5a5 7
133 
 
134 
        ;; Now check the result of the move to memory.
135 
        cmp.w   #0xf, @word_dst
136 
        beq     .Lnext22
137 
        fail
138 
.Lnext22:
139 
        mov.w   #0, @word_dst    ; zero it again for the next use.
140 
 
141 
mov_w_imm8_to_indirect:
142 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
143 
        set_ccr_zero
144 
 
145 
        ;; mov.w #xx:8, @erd
146 
        mov.l   #word_dst, er1
147 
        mov.w   #0xa5:8, @er1   ; Register indirect operand
148 
;;;     .word   0x015d
149 
;;;     .word   0x01a5
150 
 
151 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
152 
        test_neg_clear
153 
        test_zero_clear
154 
        test_ovf_clear
155 
        test_carry_clear
156 
 
157 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
158 
        test_h_gr32     word_dst, er1
159 
        test_gr_a5a5 2
160 
        test_gr_a5a5 3
161 
        test_gr_a5a5 4
162 
        test_gr_a5a5 5
163 
        test_gr_a5a5 6
164 
        test_gr_a5a5 7
165 
 
166 
        ;; Now check the result of the move to memory.
167 
        cmp.w   #0xa5, @word_dst
168 
        beq     .Lnext1
169 
        fail
170 
.Lnext1:
171 
        mov.w   #0, @word_dst    ; zero it again for the next use.
172 
 
173 
mov_w_imm8_to_postinc:          ; post-increment from imm8 to mem
174 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
175 
        set_ccr_zero
176 
 
177 
        ;; mov.w #xx:8, @erd+
178 
        mov.l   #word_dst, er1
179 
        mov.w   #0xa5:8, @er1+  ; Imm8, register post-incr operands.
180 
;;;     .word   0x015d
181 
;;;     .word   0x81a5
182 
 
183 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
184 
        test_neg_clear
185 
        test_zero_clear
186 
        test_ovf_clear
187 
        test_carry_clear
188 
 
189 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
190 
        test_h_gr32     word_dst+2, er1
191 
        test_gr_a5a5 2
192 
        test_gr_a5a5 3
193 
        test_gr_a5a5 4
194 
        test_gr_a5a5 5
195 
        test_gr_a5a5 6
196 
        test_gr_a5a5 7
197 
 
198 
        ;; Now check the result of the move to memory.
199 
        cmp.w   #0xa5, @word_dst
200 
        beq     .Lnext2
201 
        fail
202 
.Lnext2:
203 
        mov.w   #0, @word_dst    ; zero it again for the next use.
204 
 
205 
mov_w_imm8_to_postdec:          ; post-decrement from imm8 to mem
206 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
207 
        set_ccr_zero
208 
 
209 
        ;; mov.w #xx:8, @erd-
210 
        mov.l   #word_dst, er1
211 
        mov.w   #0xa5:8, @er1-  ; Imm8, register post-decr operands.
212 
;;;     .word   0x015d
213 
;;;     .word   0xa1a5
214 
 
215 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
216 
        test_neg_clear
217 
        test_zero_clear
218 
        test_ovf_clear
219 
        test_carry_clear
220 
 
221 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
222 
        test_h_gr32     word_dst-2, er1
223 
        test_gr_a5a5 2
224 
        test_gr_a5a5 3
225 
        test_gr_a5a5 4
226 
        test_gr_a5a5 5
227 
        test_gr_a5a5 6
228 
        test_gr_a5a5 7
229 
 
230 
        ;; Now check the result of the move to memory.
231 
        cmp.w   #0xa5, @word_dst
232 
        beq     .Lnext3
233 
        fail
234 
.Lnext3:
235 
        mov.w   #0, @word_dst    ; zero it again for the next use.
236 
 
237 
mov_w_imm8_to_preinc:           ; pre-increment from register to mem
238 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
239 
        set_ccr_zero
240 
 
241 
        ;; mov.w #xx:8, @+erd
242 
        mov.l   #word_dst-2, er1
243 
        mov.w   #0xa5:8, @+er1  ; Imm8, register pre-incr operands
244 
;;;     .word   0x015d
245 
;;;     .word   0x91a5
246 
 
247 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
248 
        test_neg_clear
249 
        test_zero_clear
250 
        test_ovf_clear
251 
        test_carry_clear
252 
 
253 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
254 
        test_h_gr32     word_dst, er1
255 
        test_gr_a5a5 2
256 
        test_gr_a5a5 3
257 
        test_gr_a5a5 4
258 
        test_gr_a5a5 5
259 
        test_gr_a5a5 6
260 
        test_gr_a5a5 7
261 
 
262 
        ;; Now check the result of the move to memory.
263 
        cmp.w   #0xa5, @word_dst
264 
        beq     .Lnext4
265 
        fail
266 
.Lnext4:
267 
        mov.w   #0, @word_dst    ; zero it again for the next use.
268 
 
269 
mov_w_imm8_to_predec:           ; pre-decrement from register to mem
270 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
271 
        set_ccr_zero
272 
 
273 
        ;; mov.w #xx:8, @-erd
274 
        mov.l   #word_dst+2, er1
275 
        mov.w   #0xa5:8, @-er1  ; Imm8, register pre-decr operands
276 
;;;     .word   0x015d
277 
;;;     .word   0xb1a5
278 
 
279 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
280 
        test_neg_clear
281 
        test_zero_clear
282 
        test_ovf_clear
283 
        test_carry_clear
284 
 
285 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
286 
        test_h_gr32     word_dst, er1
287 
        test_gr_a5a5 2
288 
        test_gr_a5a5 3
289 
        test_gr_a5a5 4
290 
        test_gr_a5a5 5
291 
        test_gr_a5a5 6
292 
        test_gr_a5a5 7
293 
 
294 
        ;; Now check the result of the move to memory.
295 
        cmp.w   #0xa5, @word_dst
296 
        beq     .Lnext5
297 
        fail
298 
.Lnext5:
299 
        mov.w   #0, @word_dst    ; zero it again for the next use.
300 
 
301 
mov_w_imm8_to_disp2:
302 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
303 
        set_ccr_zero
304 
 
305 
        ;; mov.w #xx:8, @(dd:2, erd)
306 
        mov.l   #word_dst-6, er1
307 
        mov.w   #0xa5:8, @(6:2, er1)    ; Imm8, reg plus 2-bit disp. operand
308 
;;;     .word   0x015d
309 
;;;     .word   0x31a5
310 
 
311 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
312 
        test_neg_clear
313 
        test_zero_clear
314 
        test_ovf_clear
315 
        test_carry_clear
316 
 
317 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
318 
        test_h_gr32     word_dst-6, er1
319 
        test_gr_a5a5 2
320 
        test_gr_a5a5 3
321 
        test_gr_a5a5 4
322 
        test_gr_a5a5 5
323 
        test_gr_a5a5 6
324 
        test_gr_a5a5 7
325 
 
326 
        ;; Now check the result of the move to memory.
327 
        cmp.w   #0xa5, @word_dst
328 
        beq     .Lnext6
329 
        fail
330 
.Lnext6:
331 
        mov.w   #0, @word_dst    ; zero it again for the next use.
332 
 
333 
mov_w_imm8_to_disp16:
334 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
335 
        set_ccr_zero
336 
 
337 
        ;; mov.w #xx:8, @(dd:16, erd)
338 
        mov.l   #word_dst-4, er1
339 
        mov.w   #0xa5:8, @(4:16, er1)   ; Register plus 16-bit disp. operand
340 
;;;     .word   0x015d
341 
;;;     .word   0x6f90
342 
;;;     .word   0x0004
343 
 
344 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
345 
        test_neg_clear
346 
        test_zero_clear
347 
        test_ovf_clear
348 
        test_carry_clear
349 
 
350 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
351 
        test_h_gr32     word_dst-4, er1
352 
        test_gr_a5a5 2
353 
        test_gr_a5a5 3
354 
        test_gr_a5a5 4
355 
        test_gr_a5a5 5
356 
        test_gr_a5a5 6
357 
        test_gr_a5a5 7
358 
 
359 
        ;; Now check the result of the move to memory.
360 
        cmp.w   #0xa5, @word_dst
361 
        beq     .Lnext7
362 
        fail
363 
.Lnext7:
364 
        mov.w   #0, @word_dst    ; zero it again for the next use.
365 
 
366 
mov_w_imm8_to_disp32:
367 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
368 
        set_ccr_zero
369 
 
370 
        ;; mov.w #xx:8, @(dd:32, erd)
371 
        mov.l   #word_dst-8, er1
372 
        mov.w   #0xa5:8, @(8:32, er1)   ; Register plus 32-bit disp. operand
373 
;;;     .word   0x015d
374 
;;;     .word   0xc9a5
375 
;;;     .long   8
376 
 
377 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
378 
        test_neg_clear
379 
        test_zero_clear
380 
        test_ovf_clear
381 
        test_carry_clear
382 
 
383 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
384 
        test_h_gr32     word_dst-8, er1
385 
        test_gr_a5a5 2
386 
        test_gr_a5a5 3
387 
        test_gr_a5a5 4
388 
        test_gr_a5a5 5
389 
        test_gr_a5a5 6
390 
        test_gr_a5a5 7
391 
 
392 
        ;; Now check the result of the move to memory.
393 
        cmp.w   #0xa5, @word_dst
394 
        beq     .Lnext8
395 
        fail
396 
.Lnext8:
397 
        mov.w   #0, @word_dst    ; zero it again for the next use.
398 
 
399 
mov_w_imm8_to_abs16:
400 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
401 
        set_ccr_zero
402 
 
403 
        ;; mov.w #xx:8, @aa:16
404 
        mov.w   #0xa5:8, @word_dst:16   ; 16-bit address-direct operand
405 
;;;     .word   0x015d
406 
;;;     .word   0x40a5
407 
;;;     .word   @word_dst
408 
 
409 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
410 
        test_neg_clear
411 
        test_zero_clear
412 
        test_ovf_clear
413 
        test_carry_clear
414 
 
415 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
416 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
417 
        test_gr_a5a5 2          ; to examine the destination memory).
418 
        test_gr_a5a5 3
419 
        test_gr_a5a5 4
420 
        test_gr_a5a5 5
421 
        test_gr_a5a5 6
422 
        test_gr_a5a5 7
423 
 
424 
        ;; Now check the result of the move to memory.
425 
        cmp.w   #0xa5, @word_dst
426 
        beq     .Lnext9
427 
        fail
428 
.Lnext9:
429 
        mov.w   #0, @word_dst    ; zero it again for the next use.
430 
 
431 
mov_w_imm8_to_abs32:
432 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
433 
        set_ccr_zero
434 
 
435 
        ;; mov.w #xx:8, @aa:32
436 
        mov.w   #0xa5:8, @word_dst:32   ; 32-bit address-direct operand
437 
;;;     .word   0x015d
438 
;;;     .word   0x48a5
439 
;;;     .long   @word_dst
440 
 
441 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
442 
        test_neg_clear
443 
        test_zero_clear
444 
        test_ovf_clear
445 
        test_carry_clear
446 
 
447 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
448 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
449 
        test_gr_a5a5 2          ; to examine the destination memory).
450 
        test_gr_a5a5 3
451 
        test_gr_a5a5 4
452 
        test_gr_a5a5 5
453 
        test_gr_a5a5 6
454 
        test_gr_a5a5 7
455 
 
456 
        ;; Now check the result of the move to memory.
457 
        cmp.w   #0xa5, @word_dst
458 
        beq     .Lnext10
459 
        fail
460 
.Lnext10:
461 
        mov.w   #0, @word_dst    ; zero it again for the next use.
462 
 
463 
mov_w_imm16_to_indirect:
464 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
465 
        set_ccr_zero
466 
 
467 
        ;; mov.w #xx:16, @erd
468 
        mov.l   #word_dst, er1
469 
        mov.w   #0xdead:16, @er1        ; Register indirect operand
470 
;;;     .word   0x7974
471 
;;;     .word   0xdead
472 
;;;     .word   0x0100
473 
 
474 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
475 
        test_neg_set
476 
        test_zero_clear
477 
        test_ovf_clear
478 
        test_carry_clear
479 
 
480 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
481 
        test_h_gr32     word_dst, er1
482 
        test_gr_a5a5 2
483 
        test_gr_a5a5 3
484 
        test_gr_a5a5 4
485 
        test_gr_a5a5 5
486 
        test_gr_a5a5 6
487 
        test_gr_a5a5 7
488 
 
489 
        ;; Now check the result of the move to memory.
490 
        cmp.w   #0xdead, @word_dst
491 
        beq     .Lnext11
492 
        fail
493 
.Lnext11:
494 
        mov.w   #0, @word_dst    ; zero it again for the next use.
495 
 
496 
mov_w_imm16_to_postinc:         ; post-increment from imm16 to mem
497 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
498 
        set_ccr_zero
499 
 
500 
        ;; mov.w #xx:16, @erd+
501 
        mov.l   #word_dst, er1
502 
        mov.w   #0xdead:16, @er1+       ; Imm16, register post-incr operands.
503 
;;;     .word   0x7974
504 
;;;     .word   0xdead
505 
;;;     .word   0x8100
506 
 
507 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
508 
        test_neg_set
509 
        test_zero_clear
510 
        test_ovf_clear
511 
        test_carry_clear
512 
 
513 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
514 
        test_h_gr32     word_dst+2, er1
515 
        test_gr_a5a5 2
516 
        test_gr_a5a5 3
517 
        test_gr_a5a5 4
518 
        test_gr_a5a5 5
519 
        test_gr_a5a5 6
520 
        test_gr_a5a5 7
521 
 
522 
        ;; Now check the result of the move to memory.
523 
        cmp.w   #0xdead, @word_dst
524 
        beq     .Lnext12
525 
        fail
526 
.Lnext12:
527 
        mov.w   #0, @word_dst    ; zero it again for the next use.
528 
 
529 
mov_w_imm16_to_postdec:         ; post-decrement from imm16 to mem
530 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
531 
        set_ccr_zero
532 
 
533 
        ;; mov.w #xx:16, @erd-
534 
        mov.l   #word_dst, er1
535 
        mov.w   #0xdead:16, @er1-       ; Imm16, register post-decr operands.
536 
;;;     .word   0x7974
537 
;;;     .word   0xdead
538 
;;;     .word   0xa100
539 
 
540 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
541 
        test_neg_set
542 
        test_zero_clear
543 
        test_ovf_clear
544 
        test_carry_clear
545 
 
546 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
547 
        test_h_gr32     word_dst-2, er1
548 
        test_gr_a5a5 2
549 
        test_gr_a5a5 3
550 
        test_gr_a5a5 4
551 
        test_gr_a5a5 5
552 
        test_gr_a5a5 6
553 
        test_gr_a5a5 7
554 
 
555 
        ;; Now check the result of the move to memory.
556 
        cmp.w   #0xdead, @word_dst
557 
        beq     .Lnext13
558 
        fail
559 
.Lnext13:
560 
        mov.w   #0, @word_dst    ; zero it again for the next use.
561 
 
562 
mov_w_imm16_to_preinc:          ; pre-increment from register to mem
563 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
564 
        set_ccr_zero
565 
 
566 
        ;; mov.w #xx:16, @+erd
567 
        mov.l   #word_dst-2, er1
568 
        mov.w   #0xdead:16, @+er1       ; Imm16, register pre-incr operands
569 
;;;     .word   0x7974
570 
;;;     .word   0xdead
571 
;;;     .word   0x9100
572 
 
573 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
574 
        test_neg_set
575 
        test_zero_clear
576 
        test_ovf_clear
577 
        test_carry_clear
578 
 
579 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
580 
        test_h_gr32     word_dst, er1
581 
        test_gr_a5a5 2
582 
        test_gr_a5a5 3
583 
        test_gr_a5a5 4
584 
        test_gr_a5a5 5
585 
        test_gr_a5a5 6
586 
        test_gr_a5a5 7
587 
 
588 
        ;; Now check the result of the move to memory.
589 
        cmp.w   #0xdead, @word_dst
590 
        beq     .Lnext14
591 
        fail
592 
.Lnext14:
593 
        mov.w   #0, @word_dst    ; zero it again for the next use.
594 
 
595 
mov_w_imm16_to_predec:          ; pre-decrement from register to mem
596 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
597 
        set_ccr_zero
598 
 
599 
        ;; mov.w #xx:16, @-erd
600 
        mov.l   #word_dst+2, er1
601 
        mov.w   #0xdead:16, @-er1       ; Imm16, register pre-decr operands
602 
;;;     .word   0x7974
603 
;;;     .word   0xdead
604 
;;;     .word   0xb100
605 
 
606 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
607 
        test_neg_set
608 
        test_zero_clear
609 
        test_ovf_clear
610 
        test_carry_clear
611 
 
612 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
613 
        test_h_gr32     word_dst, er1
614 
        test_gr_a5a5 2
615 
        test_gr_a5a5 3
616 
        test_gr_a5a5 4
617 
        test_gr_a5a5 5
618 
        test_gr_a5a5 6
619 
        test_gr_a5a5 7
620 
 
621 
        ;; Now check the result of the move to memory.
622 
        cmp.w   #0xdead, @word_dst
623 
        beq     .Lnext15
624 
        fail
625 
.Lnext15:
626 
        mov.w   #0, @word_dst    ; zero it again for the next use.
627 
 
628 
mov_w_imm16_to_disp2:
629 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
630 
        set_ccr_zero
631 
 
632 
        ;; mov.w #xx:16, @(dd:2, erd)
633 
        mov.l   #word_dst-6, er1
634 
        mov.w   #0xdead:16, @(6:2, er1) ; Imm16, reg plus 2-bit disp. operand
635 
;;;     .word   0x7974
636 
;;;     .word   0xdead
637 
;;;     .word   0x3100
638 
 
639 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
640 
        test_neg_set
641 
        test_zero_clear
642 
        test_ovf_clear
643 
        test_carry_clear
644 
 
645 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
646 
        test_h_gr32     word_dst-6, er1
647 
        test_gr_a5a5 2
648 
        test_gr_a5a5 3
649 
        test_gr_a5a5 4
650 
        test_gr_a5a5 5
651 
        test_gr_a5a5 6
652 
        test_gr_a5a5 7
653 
 
654 
        ;; Now check the result of the move to memory.
655 
        cmp.w   #0xdead, @word_dst
656 
        beq     .Lnext16
657 
        fail
658 
.Lnext16:
659 
        mov.w   #0, @word_dst    ; zero it again for the next use.
660 
 
661 
mov_w_imm16_to_disp16:
662 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
663 
        set_ccr_zero
664 
 
665 
        ;; mov.w #xx:16, @(dd:16, erd)
666 
        mov.l   #word_dst-4, er1
667 
        mov.w   #0xdead:16, @(4:16, er1)        ; Register plus 16-bit disp. operand
668 
;;;     .word   0x7974
669 
;;;     .word   0xdead
670 
;;;     .word   0xc100
671 
;;;     .word   0x0004
672 
 
673 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
674 
        test_neg_set
675 
        test_zero_clear
676 
        test_ovf_clear
677 
        test_carry_clear
678 
 
679 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
680 
        test_h_gr32     word_dst-4, er1
681 
        test_gr_a5a5 2
682 
        test_gr_a5a5 3
683 
        test_gr_a5a5 4
684 
        test_gr_a5a5 5
685 
        test_gr_a5a5 6
686 
        test_gr_a5a5 7
687 
 
688 
        ;; Now check the result of the move to memory.
689 
        cmp.w   #0xdead, @word_dst
690 
        beq     .Lnext17
691 
        fail
692 
.Lnext17:
693 
        mov.w   #0, @word_dst    ; zero it again for the next use.
694 
 
695 
mov_w_imm16_to_disp32:
696 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
697 
        set_ccr_zero
698 
 
699 
        ;; mov.w #xx:16, @(dd:32, erd)
700 
        mov.l   #word_dst-8, er1
701 
        mov.w   #0xdead:16, @(8:32, er1)   ; Register plus 32-bit disp. operand
702 
;;;     .word   0x7974
703 
;;;     .word   0xdead
704 
;;;     .word   0xc900
705 
;;;     .long   8
706 
 
707 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
708 
        test_neg_set
709 
        test_zero_clear
710 
        test_ovf_clear
711 
        test_carry_clear
712 
 
713 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
714 
        test_h_gr32     word_dst-8, er1
715 
        test_gr_a5a5 2
716 
        test_gr_a5a5 3
717 
        test_gr_a5a5 4
718 
        test_gr_a5a5 5
719 
        test_gr_a5a5 6
720 
        test_gr_a5a5 7
721 
 
722 
        ;; Now check the result of the move to memory.
723 
        cmp.w   #0xdead, @word_dst
724 
        beq     .Lnext18
725 
        fail
726 
.Lnext18:
727 
        mov.w   #0, @word_dst    ; zero it again for the next use.
728 
 
729 
mov_w_imm16_to_abs16:
730 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
731 
        set_ccr_zero
732 
 
733 
        ;; mov.w #xx:16, @aa:16
734 
        mov.w   #0xdead:16, @word_dst:16        ; 16-bit address-direct operand
735 
;;;     .word   0x7974
736 
;;;     .word   0xdead
737 
;;;     .word   0x4000
738 
;;;     .word   @word_dst
739 
 
740 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
741 
        test_neg_set
742 
        test_zero_clear
743 
        test_ovf_clear
744 
        test_carry_clear
745 
 
746 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
747 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
748 
        test_gr_a5a5 2          ; to examine the destination memory).
749 
        test_gr_a5a5 3
750 
        test_gr_a5a5 4
751 
        test_gr_a5a5 5
752 
        test_gr_a5a5 6
753 
        test_gr_a5a5 7
754 
 
755 
        ;; Now check the result of the move to memory.
756 
        cmp.w   #0xdead, @word_dst
757 
        beq     .Lnext19
758 
        fail
759 
.Lnext19:
760 
        mov.w   #0, @word_dst    ; zero it again for the next use.
761 
 
762 
mov_w_imm16_to_abs32:
763 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
764 
        set_ccr_zero
765 
 
766 
        ;; mov.w #xx:16, @aa:32
767 
        mov.w   #0xdead:16, @word_dst:32        ; 32-bit address-direct operand
768 
;;;     .word   0x7974
769 
;;;     .word   0xdead
770 
;;;     .word   0x4800
771 
;;;     .long   @word_dst
772 
 
773 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
774 
        test_neg_set
775 
        test_zero_clear
776 
        test_ovf_clear
777 
        test_carry_clear
778 
 
779 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
780 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
781 
        test_gr_a5a5 2          ; to examine the destination memory).
782 
        test_gr_a5a5 3
783 
        test_gr_a5a5 4
784 
        test_gr_a5a5 5
785 
        test_gr_a5a5 6
786 
        test_gr_a5a5 7
787 
 
788 
        ;; Now check the result of the move to memory.
789 
        cmp.w   #0xdead, @word_dst
790 
        beq     .Lnext20
791 
        fail
792 
.Lnext20:
793 
        mov.w   #0, @word_dst    ; zero it again for the next use.
794 
.endif
795 
 
796 
        ;;
797 
        ;; Move word from register source
798 
        ;;
799 
 
800 
mov_w_reg16_to_reg16:
801 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
802 
        set_ccr_zero
803 
 
804 
        ;; mov.w ers, erd
805 
        mov.w   #0x1234, r1
806 
        mov.w   r1, r0          ; Register 16-bit operand
807 
;;;     .word   0x0d10
808 
 
809 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
810 
        test_neg_clear
811 
        test_zero_clear
812 
        test_ovf_clear
813 
        test_carry_clear
814 
        test_h_gr16 0x1234 r0
815 
        test_h_gr16 0x1234 r1   ; mov src unchanged
816 
.if (sim_cpu)
817 
        test_h_gr32 0xa5a51234 er0
818 
        test_h_gr32 0xa5a51234 er1      ; mov src unchanged
819 
.endif
820 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
821 
        test_gr_a5a5 3
822 
        test_gr_a5a5 4
823 
        test_gr_a5a5 5
824 
        test_gr_a5a5 6
825 
        test_gr_a5a5 7
826 
 
827 
 
828 
mov_w_reg16_to_indirect:
829 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
830 
        set_ccr_zero
831 
 
832 
        ;; mov.w ers, @erd
833 
        mov.l   #word_dst, er1
834 
        mov.w   r0, @er1        ; Register indirect operand
835 
;;;     .word   0x6990
836 
 
837 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
838 
        test_neg_set
839 
        test_zero_clear
840 
        test_ovf_clear
841 
        test_carry_clear
842 
 
843 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
844 
        test_h_gr32     word_dst, er1
845 
        test_gr_a5a5 2
846 
        test_gr_a5a5 3
847 
        test_gr_a5a5 4
848 
        test_gr_a5a5 5
849 
        test_gr_a5a5 6
850 
        test_gr_a5a5 7
851 
 
852 
        ;; Now check the result of the move to memory.
853 
        mov.w   #0, r0
854 
        mov.w   @word_dst, r0
855 
        cmp.w   r2, r0
856 
        beq     .Lnext44
857 
        fail
858 
.Lnext44:
859 
        mov.w   #0, r0
860 
        mov.w   r0, @word_dst   ; zero it again for the next use.
861 
 
862 
.if (sim_cpu == h8sx)
863 
mov_w_reg16_to_postinc:         ; post-increment from register to mem
864 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
865 
        set_ccr_zero
866 
 
867 
        ;; mov.w ers, @erd+
868 
        mov.l   #word_dst, er1
869 
        mov.w   r0, @er1+       ; Register post-incr operand
870 
;;;     .word   0x0153
871 
;;;     .word   0x6d90
872 
 
873 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
874 
        test_neg_set
875 
        test_zero_clear
876 
        test_ovf_clear
877 
        test_carry_clear
878 
 
879 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
880 
        test_h_gr32     word_dst+2, er1
881 
        test_gr_a5a5 2
882 
        test_gr_a5a5 3
883 
        test_gr_a5a5 4
884 
        test_gr_a5a5 5
885 
        test_gr_a5a5 6
886 
        test_gr_a5a5 7
887 
 
888 
        ;; Now check the result of the move to memory.
889 
        cmp.w   r2, @word_dst
890 
        beq     .Lnext49
891 
        fail
892 
.Lnext49:
893 
        mov.w   #0, @word_dst    ; zero it again for the next use.
894 
 
895 
mov_w_reg16_to_postdec:         ; post-decrement from register to mem
896 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
897 
        set_ccr_zero
898 
 
899 
        ;; mov.w ers, @erd-
900 
        mov.l   #word_dst, er1
901 
        mov.w   r0, @er1-       ; Register post-decr operand
902 
;;;     .word   0x0151
903 
;;;     .word   0x6d90
904 
 
905 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
906 
        test_neg_set
907 
        test_zero_clear
908 
        test_ovf_clear
909 
        test_carry_clear
910 
 
911 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
912 
        test_h_gr32     word_dst-2, er1
913 
        test_gr_a5a5 2
914 
        test_gr_a5a5 3
915 
        test_gr_a5a5 4
916 
        test_gr_a5a5 5
917 
        test_gr_a5a5 6
918 
        test_gr_a5a5 7
919 
 
920 
        ;; Now check the result of the move to memory.
921 
        cmp.w   r2, @word_dst
922 
        beq     .Lnext50
923 
        fail
924 
.Lnext50:
925 
        mov.w   #0, @word_dst    ; zero it again for the next use.
926 
 
927 
mov_w_reg16_to_preinc:          ; pre-increment from register to mem
928 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
929 
        set_ccr_zero
930 
 
931 
        ;; mov.w ers, @+erd
932 
        mov.l   #word_dst-2, er1
933 
        mov.w   r0, @+er1       ; Register pre-incr operand
934 
;;;     .word   0x0152
935 
;;;     .word   0x6d90
936 
 
937 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
938 
        test_neg_set
939 
        test_zero_clear
940 
        test_ovf_clear
941 
        test_carry_clear
942 
 
943 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
944 
        test_h_gr32     word_dst, er1
945 
        test_gr_a5a5 2
946 
        test_gr_a5a5 3
947 
        test_gr_a5a5 4
948 
        test_gr_a5a5 5
949 
        test_gr_a5a5 6
950 
        test_gr_a5a5 7
951 
 
952 
        ;; Now check the result of the move to memory.
953 
        cmp.w   r2, @word_dst
954 
        beq     .Lnext51
955 
        fail
956 
.Lnext51:
957 
        mov.w   #0, @word_dst    ; zero it again for the next use.
958 
.endif
959 
 
960 
mov_w_reg16_to_predec:          ; pre-decrement from register to mem
961 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
962 
        set_ccr_zero
963 
 
964 
        ;; mov.w ers, @-erd
965 
        mov.l   #word_dst+2, er1
966 
        mov.w   r0, @-er1       ; Register pre-decr operand
967 
;;;     .word   0x6d90
968 
 
969 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
970 
        test_neg_set
971 
        test_zero_clear
972 
        test_ovf_clear
973 
        test_carry_clear
974 
 
975 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
976 
        test_h_gr32     word_dst, er1
977 
        test_gr_a5a5 2
978 
        test_gr_a5a5 3
979 
        test_gr_a5a5 4
980 
        test_gr_a5a5 5
981 
        test_gr_a5a5 6
982 
        test_gr_a5a5 7
983 
 
984 
        ;; Now check the result of the move to memory.
985 
        mov.w   #0, r0
986 
        mov.w   @word_dst, r0
987 
        cmp.w   r2, r0
988 
        beq     .Lnext48
989 
        fail
990 
.Lnext48:
991 
        mov.w   #0, r0
992 
        mov.w   r0, @word_dst   ; zero it again for the next use.
993 
 
994 
.if (sim_cpu == h8sx)
995 
mov_w_reg16_to_disp2:
996 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
997 
        set_ccr_zero
998 
 
999 
        ;; mov.w ers, @(dd:2, erd)
1000 
        mov.l   #word_dst-6, er1
1001 
        mov.w   r0, @(6:2, er1) ; Register plus 2-bit disp. operand
1002 
;;;     .word   0x0153
1003 
;;;     .word   0x6990
1004 
 
1005 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1006 
        test_neg_set
1007 
        test_zero_clear
1008 
        test_ovf_clear
1009 
        test_carry_clear
1010 
 
1011 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1012 
        test_h_gr32     word_dst-6, er1
1013 
        test_gr_a5a5 2
1014 
        test_gr_a5a5 3
1015 
        test_gr_a5a5 4
1016 
        test_gr_a5a5 5
1017 
        test_gr_a5a5 6
1018 
        test_gr_a5a5 7
1019 
 
1020 
        ;; Now check the result of the move to memory.
1021 
        cmp.w   r2, @word_dst
1022 
        beq     .Lnext52
1023 
        fail
1024 
.Lnext52:
1025 
        mov.w   #0, @word_dst    ; zero it again for the next use.
1026 
.endif
1027 
 
1028 
mov_w_reg16_to_disp16:
1029 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1030 
        set_ccr_zero
1031 
 
1032 
        ;; mov.w ers, @(dd:16, erd)
1033 
        mov.l   #word_dst-4, er1
1034 
        mov.w   r0, @(4:16, er1)        ; Register plus 16-bit disp. operand
1035 
;;;     .word   0x6f90
1036 
;;;     .word   0x0004
1037 
 
1038 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1039 
        test_neg_set
1040 
        test_zero_clear
1041 
        test_ovf_clear
1042 
        test_carry_clear
1043 
 
1044 
        test_h_gr32     word_dst-4, er1
1045 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1046 
        test_gr_a5a5 2
1047 
        test_gr_a5a5 3
1048 
        test_gr_a5a5 4
1049 
        test_gr_a5a5 5
1050 
        test_gr_a5a5 6
1051 
        test_gr_a5a5 7
1052 
 
1053 
        ;; Now check the result of the move to memory.
1054 
        mov.w   #0, r0
1055 
        mov.w   @word_dst, r0
1056 
        cmp.w   r2, r0
1057 
        beq     .Lnext45
1058 
        fail
1059 
.Lnext45:
1060 
        mov.w   #0, r0
1061 
        mov.w   r0, @word_dst   ; zero it again for the next use.
1062 
 
1063 
mov_w_reg16_to_disp32:
1064 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1065 
        set_ccr_zero
1066 
 
1067 
        ;; mov.w ers, @(dd:32, erd)
1068 
        mov.l   #word_dst-8, er1
1069 
        mov.w   r0, @(8:32, er1)        ; Register plus 32-bit disp. operand
1070 
;;;     .word   0x7810
1071 
;;;     .word   0x6ba0
1072 
;;;     .long   8
1073 
 
1074 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1075 
        test_neg_set
1076 
        test_zero_clear
1077 
        test_ovf_clear
1078 
        test_carry_clear
1079 
 
1080 
        test_h_gr32     word_dst-8, er1
1081 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1082 
        test_gr_a5a5 2
1083 
        test_gr_a5a5 3
1084 
        test_gr_a5a5 4
1085 
        test_gr_a5a5 5
1086 
        test_gr_a5a5 6
1087 
        test_gr_a5a5 7
1088 
 
1089 
        ;; Now check the result of the move to memory.
1090 
        mov.w   #0, r0
1091 
        mov.w   @word_dst, r0
1092 
        cmp.w   r2, r0
1093 
        beq     .Lnext46
1094 
        fail
1095 
.Lnext46:
1096 
        mov.w   #0, r0
1097 
        mov.w   r0, @word_dst   ; zero it again for the next use.
1098 
 
1099 
mov_w_reg16_to_abs16:
1100 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1101 
        set_ccr_zero
1102 
 
1103 
        ;; mov.w ers, @aa:16
1104 
        mov.w   r0, @word_dst:16        ; 16-bit address-direct operand
1105 
;;;     .word   0x6b80
1106 
;;;     .word   @word_dst
1107 
 
1108 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1109 
        test_neg_set
1110 
        test_zero_clear
1111 
        test_ovf_clear
1112 
        test_carry_clear
1113 
 
1114 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
1115 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
1116 
        test_gr_a5a5 2          ; to examine the destination memory).
1117 
        test_gr_a5a5 3
1118 
        test_gr_a5a5 4
1119 
        test_gr_a5a5 5
1120 
        test_gr_a5a5 6
1121 
        test_gr_a5a5 7
1122 
 
1123 
        ;; Now check the result of the move to memory.
1124 
        mov.w   #0, r0
1125 
        mov.w   @word_dst, r0
1126 
        cmp.w   r0, r1
1127 
        beq     .Lnext41
1128 
        fail
1129 
.Lnext41:
1130 
        mov.w   #0, r0
1131 
        mov.w   r0, @word_dst   ; zero it again for the next use.
1132 
 
1133 
mov_w_reg16_to_abs32:
1134 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1135 
        set_ccr_zero
1136 
 
1137 
        ;; mov.w ers, @aa:32
1138 
        mov.w   r0, @word_dst:32        ; 32-bit address-direct operand
1139 
;;;     .word   0x6ba0
1140 
;;;     .long   @word_dst
1141 
 
1142 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1143 
        test_neg_set
1144 
        test_zero_clear
1145 
        test_ovf_clear
1146 
        test_carry_clear
1147 
 
1148 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
1149 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
1150 
        test_gr_a5a5 2          ; to examine the destination memory).
1151 
        test_gr_a5a5 3
1152 
        test_gr_a5a5 4
1153 
        test_gr_a5a5 5
1154 
        test_gr_a5a5 6
1155 
        test_gr_a5a5 7
1156 
 
1157 
        ;; Now check the result of the move to memory.
1158 
        mov.w   #0, r0
1159 
        mov.w   @word_dst, r0
1160 
        cmp.w   r0, r1
1161 
        beq     .Lnext42
1162 
        fail
1163 
.Lnext42:
1164 
        mov.w   #0, r0
1165 
        mov.w   r0, @word_dst   ; zero it again for the next use.
1166 
 
1167 
        ;;
1168 
        ;; Move word to register destination.
1169 
        ;;
1170 
 
1171 
mov_w_indirect_to_reg16:
1172 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1173 
        set_ccr_zero
1174 
 
1175 
        ;; mov.w @ers, rd
1176 
        mov.l   #word_src, er1
1177 
        mov.w   @er1, r0        ; Register indirect operand
1178 
;;;     .word   0x6910
1179 
 
1180 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1181 
        test_neg_clear
1182 
        test_zero_clear
1183 
        test_ovf_clear
1184 
        test_carry_clear
1185 
 
1186 
        test_h_gr32 0xa5a57777 er0
1187 
 
1188 
        test_h_gr32     word_src, er1
1189 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1190 
        test_gr_a5a5 3
1191 
        test_gr_a5a5 4
1192 
        test_gr_a5a5 5
1193 
        test_gr_a5a5 6
1194 
        test_gr_a5a5 7
1195 
 
1196 
mov_w_postinc_to_reg16:         ; post-increment from mem to register
1197 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1198 
        set_ccr_zero
1199 
 
1200 
        ;; mov.w @ers+, rd
1201 
 
1202 
        mov.l   #word_src, er1
1203 
        mov.w   @er1+, r0       ; Register post-incr operand
1204 
;;;     .word   0x6d10
1205 
 
1206 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1207 
        test_neg_clear
1208 
        test_zero_clear
1209 
        test_ovf_clear
1210 
        test_carry_clear
1211 
 
1212 
        test_h_gr32 0xa5a57777 er0
1213 
 
1214 
        test_h_gr32     word_src+2, er1
1215 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1216 
        test_gr_a5a5 3
1217 
        test_gr_a5a5 4
1218 
        test_gr_a5a5 5
1219 
        test_gr_a5a5 6
1220 
        test_gr_a5a5 7
1221 
 
1222 
.if (sim_cpu == h8sx)
1223 
mov_w_postdec_to_reg16:         ; post-decrement from mem to register
1224 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1225 
        set_ccr_zero
1226 
 
1227 
        ;; mov.w @ers-, rd
1228 
 
1229 
        mov.l   #word_src, er1
1230 
        mov.w   @er1-, r0       ; Register post-decr operand
1231 
;;;     .word   0x0152
1232 
;;;     .word   0x6d10
1233 
 
1234 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1235 
        test_neg_clear
1236 
        test_zero_clear
1237 
        test_ovf_clear
1238 
        test_carry_clear
1239 
 
1240 
        test_h_gr32 0xa5a57777 er0
1241 
 
1242 
        test_h_gr32     word_src-2, er1
1243 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1244 
        test_gr_a5a5 3
1245 
        test_gr_a5a5 4
1246 
        test_gr_a5a5 5
1247 
        test_gr_a5a5 6
1248 
        test_gr_a5a5 7
1249 
 
1250 
mov_w_preinc_to_reg16:          ; pre-increment from mem to register
1251 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1252 
        set_ccr_zero
1253 
 
1254 
        ;; mov.w @+ers, rd
1255 
 
1256 
        mov.l   #word_src-2, er1
1257 
        mov.w   @+er1, r0       ; Register pre-incr operand
1258 
;;;     .word   0x0151
1259 
;;;     .word   0x6d10
1260 
 
1261 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1262 
        test_neg_clear
1263 
        test_zero_clear
1264 
        test_ovf_clear
1265 
        test_carry_clear
1266 
 
1267 
        test_h_gr32 0xa5a57777 er0
1268 
 
1269 
        test_h_gr32     word_src, er1
1270 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1271 
        test_gr_a5a5 3
1272 
        test_gr_a5a5 4
1273 
        test_gr_a5a5 5
1274 
        test_gr_a5a5 6
1275 
        test_gr_a5a5 7
1276 
 
1277 
mov_w_predec_to_reg16:          ; pre-decrement from mem to register
1278 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1279 
        set_ccr_zero
1280 
 
1281 
        ;; mov.w @-ers, rd
1282 
 
1283 
        mov.l   #word_src+2, er1
1284 
        mov.w   @-er1, r0       ; Register pre-decr operand
1285 
;;;     .word   0x0153
1286 
;;;     .word   0x6d10
1287 
 
1288 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1289 
        test_neg_clear
1290 
        test_zero_clear
1291 
        test_ovf_clear
1292 
        test_carry_clear
1293 
 
1294 
        test_h_gr32 0xa5a57777 er0
1295 
 
1296 
        test_h_gr32     word_src, er1
1297 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1298 
        test_gr_a5a5 3
1299 
        test_gr_a5a5 4
1300 
        test_gr_a5a5 5
1301 
        test_gr_a5a5 6
1302 
        test_gr_a5a5 7
1303 
 
1304 
 
1305 
mov_w_disp2_to_reg16:
1306 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1307 
        set_ccr_zero
1308 
 
1309 
        ;; mov.w @(dd:2, ers), rd
1310 
        mov.l   #word_src-2, er1
1311 
        mov.w   @(2:2, er1), r0 ; Register plus 2-bit disp. operand
1312 
;;;     .word   0x0151
1313 
;;;     .word   0x6910
1314 
 
1315 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1316 
        test_neg_clear
1317 
        test_zero_clear
1318 
        test_ovf_clear
1319 
        test_carry_clear
1320 
 
1321 
        test_h_gr32 0xa5a57777 er0      ; mov result:   a5a5 | 7777
1322 
 
1323 
        test_h_gr32     word_src-2, er1
1324 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1325 
        test_gr_a5a5 3
1326 
        test_gr_a5a5 4
1327 
        test_gr_a5a5 5
1328 
        test_gr_a5a5 6
1329 
        test_gr_a5a5 7
1330 
.endif
1331 
 
1332 
mov_w_disp16_to_reg16:
1333 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1334 
        set_ccr_zero
1335 
 
1336 
        ;; mov.w @(dd:16, ers), rd
1337 
        mov.l   #word_src+0x1234, er1
1338 
        mov.w   @(-0x1234:16, er1), r0  ; Register plus 16-bit disp. operand
1339 
;;;     .word   0x6f10
1340 
;;;     .word   -0x1234
1341 
 
1342 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1343 
        test_neg_clear
1344 
        test_zero_clear
1345 
        test_ovf_clear
1346 
        test_carry_clear
1347 
 
1348 
        test_h_gr32 0xa5a57777 er0      ; mov result:   a5a5 | 7777
1349 
 
1350 
        test_h_gr32     word_src+0x1234, er1
1351 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1352 
        test_gr_a5a5 3
1353 
        test_gr_a5a5 4
1354 
        test_gr_a5a5 5
1355 
        test_gr_a5a5 6
1356 
        test_gr_a5a5 7
1357 
 
1358 
mov_w_disp32_to_reg16:
1359 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1360 
        set_ccr_zero
1361 
 
1362 
        ;; mov.w @(dd:32, ers), rd
1363 
        mov.l   #word_src+65536, er1
1364 
        mov.w   @(-65536:32, er1), r0   ; Register plus 32-bit disp. operand
1365 
;;;     .word   0x7810
1366 
;;;     .word   0x6b20
1367 
;;;     .long   -65536
1368 
 
1369 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1370 
        test_neg_clear
1371 
        test_zero_clear
1372 
        test_ovf_clear
1373 
        test_carry_clear
1374 
 
1375 
        test_h_gr32 0xa5a57777 er0      ; mov result:   a5a5 | 7777
1376 
 
1377 
        test_h_gr32     word_src+65536, er1
1378 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1379 
        test_gr_a5a5 3
1380 
        test_gr_a5a5 4
1381 
        test_gr_a5a5 5
1382 
        test_gr_a5a5 6
1383 
        test_gr_a5a5 7
1384 
 
1385 
mov_w_abs16_to_reg16:
1386 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1387 
        set_ccr_zero
1388 
 
1389 
        ;; mov.w @aa:16, rd
1390 
        mov.w   @word_src:16, r0        ; 16-bit address-direct operand
1391 
;;;     .word   0x6b00
1392 
;;;     .word   @word_src
1393 
 
1394 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1395 
        test_neg_clear
1396 
        test_zero_clear
1397 
        test_ovf_clear
1398 
        test_carry_clear
1399 
 
1400 
        test_h_gr32 0xa5a57777 er0
1401 
 
1402 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
1403 
        test_gr_a5a5 2
1404 
        test_gr_a5a5 3
1405 
        test_gr_a5a5 4
1406 
        test_gr_a5a5 5
1407 
        test_gr_a5a5 6
1408 
        test_gr_a5a5 7
1409 
 
1410 
mov_w_abs32_to_reg16:
1411 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1412 
        set_ccr_zero
1413 
 
1414 
        ;; mov.w @aa:32, rd
1415 
        mov.w   @word_src:32, r0        ; 32-bit address-direct operand
1416 
;;;     .word   0x6b20
1417 
;;;     .long   @word_src
1418 
 
1419 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1420 
        test_neg_clear
1421 
        test_zero_clear
1422 
        test_ovf_clear
1423 
        test_carry_clear
1424 
 
1425 
        test_h_gr32 0xa5a57777 er0
1426 
 
1427 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
1428 
        test_gr_a5a5 2
1429 
        test_gr_a5a5 3
1430 
        test_gr_a5a5 4
1431 
        test_gr_a5a5 5
1432 
        test_gr_a5a5 6
1433 
        test_gr_a5a5 7
1434 
 
1435 
.if (sim_cpu == h8sx)
1436 
 
1437 
        ;;
1438 
        ;; Move word from memory to memory
1439 
        ;;
1440 
 
1441 
mov_w_indirect_to_indirect:     ; reg indirect, memory to memory
1442 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1443 
        set_ccr_zero
1444 
 
1445 
        ;; mov.w @ers, @erd
1446 
 
1447 
        mov.l   #word_src, er1
1448 
        mov.l   #word_dst, er0
1449 
        mov.w   @er1, @er0
1450 
;;;     .word   0x0158
1451 
;;;     .word   0x0100
1452 
 
1453 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1454 
        test_neg_clear
1455 
        test_zero_clear
1456 
        test_ovf_clear
1457 
        test_carry_clear
1458 
 
1459 
        ;; Verify the affected registers.
1460 
 
1461 
        test_h_gr32  word_dst er0
1462 
        test_h_gr32  word_src er1
1463 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1464 
        test_gr_a5a5 3
1465 
        test_gr_a5a5 4
1466 
        test_gr_a5a5 5
1467 
        test_gr_a5a5 6
1468 
        test_gr_a5a5 7
1469 
 
1470 
        ;; Now check the result of the move to memory.
1471 
        cmp.w   @word_src, @word_dst
1472 
        beq     .Lnext55
1473 
        fail
1474 
.Lnext55:
1475 
        ;; Now clear the destination location, and verify that.
1476 
        mov.w   #0, @word_dst
1477 
        cmp.w   @word_src, @word_dst
1478 
        bne     .Lnext56
1479 
        fail
1480 
.Lnext56:                       ; OK, pass on.
1481 
 
1482 
mov_w_postinc_to_postinc:       ; reg post-increment, memory to memory
1483 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1484 
        set_ccr_zero
1485 
 
1486 
        ;; mov.w @ers+, @erd+
1487 
 
1488 
        mov.l   #word_src, er1
1489 
        mov.l   #word_dst, er0
1490 
        mov.w   @er1+, @er0+
1491 
;;;     .word   0x0158
1492 
;;;     .word   0x8180
1493 
 
1494 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1495 
        test_neg_clear
1496 
        test_zero_clear
1497 
        test_ovf_clear
1498 
        test_carry_clear
1499 
 
1500 
        ;; Verify the affected registers.
1501 
 
1502 
        test_h_gr32  word_dst+2 er0
1503 
        test_h_gr32  word_src+2 er1
1504 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1505 
        test_gr_a5a5 3
1506 
        test_gr_a5a5 4
1507 
        test_gr_a5a5 5
1508 
        test_gr_a5a5 6
1509 
        test_gr_a5a5 7
1510 
 
1511 
        ;; Now check the result of the move to memory.
1512 
        cmp.w   @word_src, @word_dst
1513 
        beq     .Lnext65
1514 
        fail
1515 
.Lnext65:
1516 
        ;; Now clear the destination location, and verify that.
1517 
        mov.w   #0, @word_dst
1518 
        cmp.w   @word_src, @word_dst
1519 
        bne     .Lnext66
1520 
        fail
1521 
.Lnext66:                       ; OK, pass on.
1522 
 
1523 
mov_w_postdec_to_postdec:       ; reg post-decrement, memory to memory
1524 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1525 
        set_ccr_zero
1526 
 
1527 
        ;; mov.w @ers-, @erd-
1528 
 
1529 
        mov.l   #word_src, er1
1530 
        mov.l   #word_dst, er0
1531 
        mov.w   @er1-, @er0-
1532 
;;;     .word   0x0158
1533 
;;;     .word   0xa1a0
1534 
 
1535 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1536 
        test_neg_clear
1537 
        test_zero_clear
1538 
        test_ovf_clear
1539 
        test_carry_clear
1540 
 
1541 
        ;; Verify the affected registers.
1542 
 
1543 
        test_h_gr32  word_dst-2 er0
1544 
        test_h_gr32  word_src-2 er1
1545 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1546 
        test_gr_a5a5 3
1547 
        test_gr_a5a5 4
1548 
        test_gr_a5a5 5
1549 
        test_gr_a5a5 6
1550 
        test_gr_a5a5 7
1551 
 
1552 
        ;; Now check the result of the move to memory.
1553 
        cmp.w   @word_src, @word_dst
1554 
        beq     .Lnext75
1555 
        fail
1556 
.Lnext75:
1557 
        ;; Now clear the destination location, and verify that.
1558 
        mov.w   #0, @word_dst
1559 
        cmp.w   @word_src, @word_dst
1560 
        bne     .Lnext76
1561 
        fail
1562 
.Lnext76:                       ; OK, pass on.
1563 
 
1564 
mov_w_preinc_to_preinc:         ; reg pre-increment, memory to memory
1565 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1566 
        set_ccr_zero
1567 
 
1568 
        ;; mov.w @+ers, @+erd
1569 
 
1570 
        mov.l   #word_src-2, er1
1571 
        mov.l   #word_dst-2, er0
1572 
        mov.w   @+er1, @+er0
1573 
;;;     .word   0x0158
1574 
;;;     .word   0x9190
1575 
 
1576 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1577 
        test_neg_clear
1578 
        test_zero_clear
1579 
        test_ovf_clear
1580 
        test_carry_clear
1581 
 
1582 
        ;; Verify the affected registers.
1583 
 
1584 
        test_h_gr32  word_dst er0
1585 
        test_h_gr32  word_src er1
1586 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1587 
        test_gr_a5a5 3
1588 
        test_gr_a5a5 4
1589 
        test_gr_a5a5 5
1590 
        test_gr_a5a5 6
1591 
        test_gr_a5a5 7
1592 
 
1593 
        ;; Now check the result of the move to memory.
1594 
        cmp.w   @word_src, @word_dst
1595 
        beq     .Lnext85
1596 
        fail
1597 
.Lnext85:
1598 
        ;; Now clear the destination location, and verify that.
1599 
        mov.w   #0, @word_dst
1600 
        cmp.w   @word_src, @word_dst
1601 
        bne     .Lnext86
1602 
        fail
1603 
.Lnext86:                               ; OK, pass on.
1604 
 
1605 
mov_w_predec_to_predec:         ; reg pre-decrement, memory to memory
1606 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1607 
        set_ccr_zero
1608 
 
1609 
        ;; mov.w @-ers, @-erd
1610 
 
1611 
        mov.l   #word_src+2, er1
1612 
        mov.l   #word_dst+2, er0
1613 
        mov.w   @-er1, @-er0
1614 
;;;     .word   0x0158
1615 
;;;     .word   0xb1b0
1616 
 
1617 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1618 
        test_neg_clear
1619 
        test_zero_clear
1620 
        test_ovf_clear
1621 
        test_carry_clear
1622 
 
1623 
        ;; Verify the affected registers.
1624 
 
1625 
        test_h_gr32  word_dst er0
1626 
        test_h_gr32  word_src er1
1627 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1628 
        test_gr_a5a5 3
1629 
        test_gr_a5a5 4
1630 
        test_gr_a5a5 5
1631 
        test_gr_a5a5 6
1632 
        test_gr_a5a5 7
1633 
 
1634 
        ;; Now check the result of the move to memory.
1635 
        cmp.w   @word_src, @word_dst
1636 
        beq     .Lnext95
1637 
        fail
1638 
.Lnext95:
1639 
        ;; Now clear the destination location, and verify that.
1640 
        mov.w   #0, @word_dst
1641 
        cmp.w   @word_src, @word_dst
1642 
        bne     .Lnext96
1643 
        fail
1644 
.Lnext96:                       ; OK, pass on.
1645 
 
1646 
mov_w_disp2_to_disp2:           ; reg 2-bit disp, memory to memory
1647 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1648 
        set_ccr_zero
1649 
 
1650 
        ;; mov.w @(dd:2, ers), @(dd:2, erd)
1651 
 
1652 
        mov.l   #word_src-2, er1
1653 
        mov.l   #word_dst-4, er0
1654 
        mov.w   @(2:2, er1), @(4:2, er0)
1655 
;;;     .word   0x0158
1656 
;;;     .word   0x1120
1657 
 
1658 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1659 
        test_neg_clear
1660 
        test_zero_clear
1661 
        test_ovf_clear
1662 
        test_carry_clear
1663 
 
1664 
        ;; Verify the affected registers.
1665 
 
1666 
        test_h_gr32  word_dst-4 er0
1667 
        test_h_gr32  word_src-2 er1
1668 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1669 
        test_gr_a5a5 3
1670 
        test_gr_a5a5 4
1671 
        test_gr_a5a5 5
1672 
        test_gr_a5a5 6
1673 
        test_gr_a5a5 7
1674 
 
1675 
        ;; Now check the result of the move to memory.
1676 
        cmp.w   @word_src, @word_dst
1677 
        beq     .Lnext105
1678 
        fail
1679 
.Lnext105:
1680 
        ;; Now clear the destination location, and verify that.
1681 
        mov.w   #0, @word_dst
1682 
        cmp.w   @word_src, @word_dst
1683 
        bne     .Lnext106
1684 
        fail
1685 
.Lnext106:                      ; OK, pass on.
1686 
 
1687 
mov_w_disp16_to_disp16:         ; reg 16-bit disp, memory to memory
1688 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1689 
        set_ccr_zero
1690 
 
1691 
        ;; mov.w @(dd:16, ers), @(dd:16, erd)
1692 
 
1693 
        mov.l   #word_src-1, er1
1694 
        mov.l   #word_dst-2, er0
1695 
        mov.w   @(1:16, er1), @(2:16, er0)
1696 
;;;     .word   0x0158
1697 
;;;     .word   0xc1c0
1698 
;;;     .word   0x0001
1699 
;;;     .word   0x0002
1700 
 
1701 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1702 
        test_neg_clear
1703 
        test_zero_clear
1704 
        test_ovf_clear
1705 
        test_carry_clear
1706 
 
1707 
        ;; Verify the affected registers.
1708 
 
1709 
        test_h_gr32  word_dst-2 er0
1710 
        test_h_gr32  word_src-1 er1
1711 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1712 
        test_gr_a5a5 3
1713 
        test_gr_a5a5 4
1714 
        test_gr_a5a5 5
1715 
        test_gr_a5a5 6
1716 
        test_gr_a5a5 7
1717 
 
1718 
        ;; Now check the result of the move to memory.
1719 
        cmp.w   @word_src, @word_dst
1720 
        beq     .Lnext115
1721 
        fail
1722 
.Lnext115:
1723 
        ;; Now clear the destination location, and verify that.
1724 
        mov.w   #0, @word_dst
1725 
        cmp.w   @word_src, @word_dst
1726 
        bne     .Lnext116
1727 
        fail
1728 
.Lnext116:                      ; OK, pass on.
1729 
 
1730 
mov_w_disp32_to_disp32:         ; reg 32-bit disp, memory to memory
1731 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1732 
        set_ccr_zero
1733 
 
1734 
        ;; mov.w @(dd:32, ers), @(dd:32, erd)
1735 
 
1736 
        mov.l   #word_src-1, er1
1737 
        mov.l   #word_dst-2, er0
1738 
        mov.w   @(1:32, er1), @(2:32, er0)
1739 
;;;     .word   0x0158
1740 
;;;     .word   0xc9c8
1741 
;;;     .long   1
1742 
;;;     .long   2
1743 
 
1744 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1745 
        test_neg_clear
1746 
        test_zero_clear
1747 
        test_ovf_clear
1748 
        test_carry_clear
1749 
 
1750 
        ;; Verify the affected registers.
1751 
 
1752 
        test_h_gr32  word_dst-2 er0
1753 
        test_h_gr32  word_src-1 er1
1754 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1755 
        test_gr_a5a5 3
1756 
        test_gr_a5a5 4
1757 
        test_gr_a5a5 5
1758 
        test_gr_a5a5 6
1759 
        test_gr_a5a5 7
1760 
 
1761 
        ;; Now check the result of the move to memory.
1762 
        cmp.w   @word_src, @word_dst
1763 
        beq     .Lnext125
1764 
        fail
1765 
.Lnext125:
1766 
        ;; Now clear the destination location, and verify that.
1767 
        mov.w   #0, @word_dst
1768 
        cmp.w   @word_src, @word_dst
1769 
        bne     .Lnext126
1770 
        fail
1771 
.Lnext126:                              ; OK, pass on.
1772 
 
1773 
mov_w_abs16_to_abs16:           ; 16-bit absolute addr, memory to memory
1774 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1775 
        set_ccr_zero
1776 
 
1777 
        ;; mov.w @aa:16, @aa:16
1778 
 
1779 
        mov.w   @word_src:16, @word_dst:16
1780 
;;;     .word   0x0158
1781 
;;;     .word   0x4040
1782 
;;;     .word   @word_src
1783 
;;;     .word   @word_dst
1784 
 
1785 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1786 
        test_neg_clear
1787 
        test_zero_clear
1788 
        test_ovf_clear
1789 
        test_carry_clear
1790 
 
1791 
 
1792 
        test_gr_a5a5 0           ; Make sure *NO* general registers are changed
1793 
        test_gr_a5a5 1
1794 
        test_gr_a5a5 2
1795 
        test_gr_a5a5 3
1796 
        test_gr_a5a5 4
1797 
        test_gr_a5a5 5
1798 
        test_gr_a5a5 6
1799 
        test_gr_a5a5 7
1800 
 
1801 
        ;; Now check the result of the move to memory.
1802 
        cmp.w   @word_src, @word_dst
1803 
        beq     .Lnext135
1804 
        fail
1805 
.Lnext135:
1806 
        ;; Now clear the destination location, and verify that.
1807 
        mov.w   #0, @word_dst
1808 
        cmp.w   @word_src, @word_dst
1809 
        bne     .Lnext136
1810 
        fail
1811 
.Lnext136:                              ; OK, pass on.
1812 
 
1813 
mov_w_abs32_to_abs32:           ; 32-bit absolute addr, memory to memory
1814 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1815 
        set_ccr_zero
1816 
 
1817 
        ;; mov.w @aa:32, @aa:32
1818 
 
1819 
        mov.w   @word_src:32, @word_dst:32
1820 
;;;     .word   0x0158
1821 
;;;     .word   0x4848
1822 
;;;     .long   @word_src
1823 
;;;     .long   @word_dst
1824 
 
1825 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1826 
        test_neg_clear
1827 
        test_zero_clear
1828 
        test_ovf_clear
1829 
        test_carry_clear
1830 
 
1831 
        test_gr_a5a5 0           ; Make sure *NO* general registers are changed
1832 
        test_gr_a5a5 1
1833 
        test_gr_a5a5 2
1834 
        test_gr_a5a5 3
1835 
        test_gr_a5a5 4
1836 
        test_gr_a5a5 5
1837 
        test_gr_a5a5 6
1838 
        test_gr_a5a5 7
1839 
 
1840 
        ;; Now check the result of the move to memory.
1841 
        cmp.w   @word_src, @word_dst
1842 
        beq     .Lnext145
1843 
        fail
1844 
.Lnext145:
1845 
        ;; Now clear the destination location, and verify that.
1846 
        mov.w   #0, @word_dst
1847 
        cmp.w   @word_src, @word_dst
1848 
        bne     .Lnext146
1849 
        fail
1850 
.Lnext146:                              ; OK, pass on.
1851 
 
1852 
 
1853 
.endif
1854 
 
1855 
        pass
1856 
 
1857 
        exit 0

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