URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [and.cgs] - Blame information for rev 827

Go to most recent revision | Details | Compare with Previous | View Log


# m32r testcase for and $dr,$sr
# mach(): m32r m32rx
 
        .include "testutils.inc"
 
        start
 
        .global and
and:
        mvi_h_gr r4, 3
        mvi_h_gr r5, 6
 
        and r4, r5
 
        test_h_gr r4, 2
 
        pass

Line No.	Rev	Author	Line
1	24	jeremybenn	`# m32r testcase for and $dr,$sr`
2			`# mach(): m32r m32rx`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global and`
9			`and:`
10			`mvi_h_gr r4, 3`
11			`mvi_h_gr r5, 6`
12
13			`and r4, r5`
14
15			`test_h_gr r4, 2`
16
17			`pass`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [and.cgs] - Blame information for rev 827