URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [cmpui.cgs] - Blame information for rev 827

Go to most recent revision | Details | Compare with Previous | View Log


# m32r testcase for cmpui $src2,#$simm16
# mach(): m32r m32rx
 
        .include "testutils.inc"
 
        start
 
        .global cmpui
cmpui:
        mvi_h_condbit 0
        mvi_h_gr r4, 1
        cmpui r4, #2
        bc ok
not_ok:
        fail
ok:
        mvi_h_condbit 1
        mvi_h_gr r4, -1
        cmpui r4, #2
        bc not_ok
 
        pass

Line No.	Rev	Author	Line
1	24	jeremybenn	`# m32r testcase for cmpui $src2,#$simm16`
2			`# mach(): m32r m32rx`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global cmpui`
9			`cmpui:`
10			`mvi_h_condbit 0`
11			`mvi_h_gr r4, 1`
12			`cmpui r4, #2`
13			`bc ok`
14			`not_ok:`
15			`fail`
16			`ok:`
17			`mvi_h_condbit 1`
18			`mvi_h_gr r4, -1`
19			`cmpui r4, #2`
20			`bc not_ok`
21
22			`pass`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [cmpui.cgs] - Blame information for rev 827