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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [rte.cgs] - Blame information for rev 840

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Line No. Rev Author Line
1 24 jeremybenn
# m32r testcase for rte
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# mach(): m32r m32rx
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        .include "testutils.inc"
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        start
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        .global rte
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rte:
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; Test 1: bbpsw = 0, bpsw = 1, psw = 0
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        ; bbsm = 0, bie = 0, bbcond = 0
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        mvi_h_gr r4, 0
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        mvtc r4, cr8
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        ; bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0
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        mvi_h_gr r4, 0xc100
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        mvtc r4, cr0
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        ; bbpc = 0
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        mvaddr_h_gr r4, 0
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        mvtc r4, bbpc
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        ; bpc = ret1
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        mvaddr_h_gr r4, ret1
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        mvtc r4, bpc
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        rte
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        fail
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ret1:
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        ; test bbsm = 0, bbie = 0, bbcond = 0
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        mvfc r4, cr8
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        test_h_gr r4, 0
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        ; test bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1
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        mvfc r4, cr0
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        test_h_gr r4, 0xc1
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        ; test bbpc = 0
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        mvfc r4, bbpc
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        test_h_gr r4, 0
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        ; test bpc = 0
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        mvfc r4, bpc
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        test_h_gr r4, 0
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; Test 2: bbpsw = 1, bpsw = 0, psw = 1
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        ; bbsm = 1, bie = 1, bbcond = 1
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        mvi_h_gr r4, 0xc1
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        mvtc r4, cr8
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        ; bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1
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        mvi_h_gr r4, 0xc1
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        mvtc r4, cr0
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        ; bbpc = 42
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        mvaddr_h_gr r4, 42
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        mvtc r4, bbpc
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        ; bpc = ret2 + 2
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        mvaddr_h_gr r4, ret2 + 2
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        mvtc r4, bpc
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        rte
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        fail
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ret2:
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        ; test bbsm = 1, bbie = 1, bbcond = 1
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        mvfc r4, cr8
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        test_h_gr r4, 0xc1
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        ; test bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0
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        mvfc r4, cr0
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        test_h_gr r4, 0xc100
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        ; test bbpc = 42
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        mvfc r4, bbpc
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        test_h_gr r4, 42
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        ; test bpc = 42
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        mvfc r4, bpc
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        test_h_gr r4, 42
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        pass

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