OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [gdb/] [features/] [rs6000/] [powerpc-altivec32.c] - Blame information for rev 853

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
/* THIS FILE IS GENERATED.  Original: powerpc-altivec32.xml */
2
 
3
#include "defs.h"
4
#include "target-descriptions.h"
5
 
6
struct target_desc *tdesc_powerpc_altivec32;
7
static void
8
initialize_tdesc_powerpc_altivec32 (void)
9
{
10
  struct target_desc *result = allocate_target_description ();
11
  struct tdesc_feature *feature;
12
  struct tdesc_type *field_type, *type;
13
 
14
  set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common"));
15
 
16
  feature = tdesc_create_feature (result, "org.gnu.gdb.power.core");
17
  tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32");
18
  tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32");
19
  tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32");
20
  tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32");
21
  tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32");
22
  tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32");
23
  tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32");
24
  tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32");
25
  tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32");
26
  tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32");
27
  tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32");
28
  tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32");
29
  tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32");
30
  tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32");
31
  tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32");
32
  tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32");
33
  tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32");
34
  tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32");
35
  tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32");
36
  tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32");
37
  tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32");
38
  tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32");
39
  tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32");
40
  tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32");
41
  tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32");
42
  tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32");
43
  tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32");
44
  tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32");
45
  tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32");
46
  tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32");
47
  tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32");
48
  tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32");
49
  tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr");
50
  tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32");
51
  tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32");
52
  tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr");
53
  tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32");
54
  tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32");
55
 
56
  feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu");
57
  tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double");
58
  tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double");
59
  tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double");
60
  tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double");
61
  tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double");
62
  tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double");
63
  tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double");
64
  tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double");
65
  tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double");
66
  tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double");
67
  tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double");
68
  tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double");
69
  tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double");
70
  tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double");
71
  tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double");
72
  tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double");
73
  tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double");
74
  tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double");
75
  tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double");
76
  tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double");
77
  tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double");
78
  tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double");
79
  tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double");
80
  tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double");
81
  tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double");
82
  tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double");
83
  tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double");
84
  tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double");
85
  tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double");
86
  tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double");
87
  tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double");
88
  tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double");
89
  tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int");
90
 
91
  feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec");
92
  field_type = tdesc_named_type (feature, "ieee_single");
93
  tdesc_create_vector (feature, "v4f", field_type, 4);
94
 
95
  field_type = tdesc_named_type (feature, "int32");
96
  tdesc_create_vector (feature, "v4i32", field_type, 4);
97
 
98
  field_type = tdesc_named_type (feature, "int16");
99
  tdesc_create_vector (feature, "v8i16", field_type, 8);
100
 
101
  field_type = tdesc_named_type (feature, "int8");
102
  tdesc_create_vector (feature, "v16i8", field_type, 16);
103
 
104
  type = tdesc_create_union (feature, "vec128");
105
  field_type = tdesc_named_type (feature, "uint128");
106
  tdesc_add_field (type, "uint128", field_type);
107
  field_type = tdesc_named_type (feature, "v4f");
108
  tdesc_add_field (type, "v4_float", field_type);
109
  field_type = tdesc_named_type (feature, "v4i32");
110
  tdesc_add_field (type, "v4_int32", field_type);
111
  field_type = tdesc_named_type (feature, "v8i16");
112
  tdesc_add_field (type, "v8_int16", field_type);
113
  field_type = tdesc_named_type (feature, "v16i8");
114
  tdesc_add_field (type, "v16_int8", field_type);
115
 
116
  tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128");
117
  tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128");
118
  tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128");
119
  tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128");
120
  tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128");
121
  tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128");
122
  tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128");
123
  tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128");
124
  tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128");
125
  tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128");
126
  tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128");
127
  tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128");
128
  tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128");
129
  tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128");
130
  tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128");
131
  tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128");
132
  tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128");
133
  tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128");
134
  tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128");
135
  tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128");
136
  tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128");
137
  tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128");
138
  tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128");
139
  tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128");
140
  tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128");
141
  tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128");
142
  tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128");
143
  tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128");
144
  tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128");
145
  tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128");
146
  tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128");
147
  tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128");
148
  tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int");
149
  tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int");
150
 
151
  tdesc_powerpc_altivec32 = result;
152
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.