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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [gdb/] [mn10300-tdep.c] - Blame information for rev 832

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1 227 jeremybenn
/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
2
 
3
   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4
   2007, 2008, 2009, 2010 Free Software Foundation, Inc.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
#include "defs.h"
22
#include "arch-utils.h"
23
#include "dis-asm.h"
24
#include "gdbtypes.h"
25
#include "regcache.h"
26
#include "gdb_string.h"
27
#include "gdb_assert.h"
28
#include "gdbcore.h"    /* for write_memory_unsigned_integer */
29
#include "value.h"
30
#include "gdbtypes.h"
31
#include "frame.h"
32
#include "frame-unwind.h"
33
#include "frame-base.h"
34
#include "symtab.h"
35
#include "dwarf2-frame.h"
36
#include "osabi.h"
37
#include "infcall.h"
38
#include "prologue-value.h"
39
#include "target.h"
40
 
41
#include "mn10300-tdep.h"
42
 
43
 
44
/* The am33-2 has 64 registers.  */
45
#define MN10300_MAX_NUM_REGS 64
46
 
47
/* This structure holds the results of a prologue analysis.  */
48
struct mn10300_prologue
49
{
50
  /* The architecture for which we generated this prologue info.  */
51
  struct gdbarch *gdbarch;
52
 
53
  /* The offset from the frame base to the stack pointer --- always
54
     zero or negative.
55
 
56
     Calling this a "size" is a bit misleading, but given that the
57
     stack grows downwards, using offsets for everything keeps one
58
     from going completely sign-crazy: you never change anything's
59
     sign for an ADD instruction; always change the second operand's
60
     sign for a SUB instruction; and everything takes care of
61
     itself.  */
62
  int frame_size;
63
 
64
  /* Non-zero if this function has initialized the frame pointer from
65
     the stack pointer, zero otherwise.  */
66
  int has_frame_ptr;
67
 
68
  /* If has_frame_ptr is non-zero, this is the offset from the frame
69
     base to where the frame pointer points.  This is always zero or
70
     negative.  */
71
  int frame_ptr_offset;
72
 
73
  /* The address of the first instruction at which the frame has been
74
     set up and the arguments are where the debug info says they are
75
     --- as best as we can tell.  */
76
  CORE_ADDR prologue_end;
77
 
78
  /* reg_offset[R] is the offset from the CFA at which register R is
79
     saved, or 1 if register R has not been saved.  (Real values are
80
     always zero or negative.)  */
81
  int reg_offset[MN10300_MAX_NUM_REGS];
82
};
83
 
84
 
85
/* Compute the alignment required by a type.  */
86
 
87
static int
88
mn10300_type_align (struct type *type)
89
{
90
  int i, align = 1;
91
 
92
  switch (TYPE_CODE (type))
93
    {
94
    case TYPE_CODE_INT:
95
    case TYPE_CODE_ENUM:
96
    case TYPE_CODE_SET:
97
    case TYPE_CODE_RANGE:
98
    case TYPE_CODE_CHAR:
99
    case TYPE_CODE_BOOL:
100
    case TYPE_CODE_FLT:
101
    case TYPE_CODE_PTR:
102
    case TYPE_CODE_REF:
103
      return TYPE_LENGTH (type);
104
 
105
    case TYPE_CODE_COMPLEX:
106
      return TYPE_LENGTH (type) / 2;
107
 
108
    case TYPE_CODE_STRUCT:
109
    case TYPE_CODE_UNION:
110
      for (i = 0; i < TYPE_NFIELDS (type); i++)
111
        {
112
          int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
113
          while (align < falign)
114
            align <<= 1;
115
        }
116
      return align;
117
 
118
    case TYPE_CODE_ARRAY:
119
      /* HACK!  Structures containing arrays, even small ones, are not
120
         elligible for returning in registers.  */
121
      return 256;
122
 
123
    case TYPE_CODE_TYPEDEF:
124
      return mn10300_type_align (check_typedef (type));
125
 
126
    default:
127
      internal_error (__FILE__, __LINE__, _("bad switch"));
128
    }
129
}
130
 
131
/* Should call_function allocate stack space for a struct return?  */
132
static int
133
mn10300_use_struct_convention (struct type *type)
134
{
135
  /* Structures bigger than a pair of words can't be returned in
136
     registers.  */
137
  if (TYPE_LENGTH (type) > 8)
138
    return 1;
139
 
140
  switch (TYPE_CODE (type))
141
    {
142
    case TYPE_CODE_STRUCT:
143
    case TYPE_CODE_UNION:
144
      /* Structures with a single field are handled as the field
145
         itself.  */
146
      if (TYPE_NFIELDS (type) == 1)
147
        return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
148
 
149
      /* Structures with word or double-word size are passed in memory, as
150
         long as they require at least word alignment.  */
151
      if (mn10300_type_align (type) >= 4)
152
        return 0;
153
 
154
      return 1;
155
 
156
      /* Arrays are addressable, so they're never returned in
157
         registers.  This condition can only hold when the array is
158
         the only field of a struct or union.  */
159
    case TYPE_CODE_ARRAY:
160
      return 1;
161
 
162
    case TYPE_CODE_TYPEDEF:
163
      return mn10300_use_struct_convention (check_typedef (type));
164
 
165
    default:
166
      return 0;
167
    }
168
}
169
 
170
static void
171
mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
172
                            struct regcache *regcache, const void *valbuf)
173
{
174
  int len = TYPE_LENGTH (type);
175
  int reg, regsz;
176
 
177
  if (TYPE_CODE (type) == TYPE_CODE_PTR)
178
    reg = 4;
179
  else
180
    reg = 0;
181
 
182
  regsz = register_size (gdbarch, reg);
183
 
184
  if (len <= regsz)
185
    regcache_raw_write_part (regcache, reg, 0, len, valbuf);
186
  else if (len <= 2 * regsz)
187
    {
188
      regcache_raw_write (regcache, reg, valbuf);
189
      gdb_assert (regsz == register_size (gdbarch, reg + 1));
190
      regcache_raw_write_part (regcache, reg+1, 0,
191
                               len - regsz, (char *) valbuf + regsz);
192
    }
193
  else
194
    internal_error (__FILE__, __LINE__,
195
                    _("Cannot store return value %d bytes long."), len);
196
}
197
 
198
static void
199
mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
200
                              struct regcache *regcache, void *valbuf)
201
{
202
  char buf[MAX_REGISTER_SIZE];
203
  int len = TYPE_LENGTH (type);
204
  int reg, regsz;
205
 
206
  if (TYPE_CODE (type) == TYPE_CODE_PTR)
207
    reg = 4;
208
  else
209
    reg = 0;
210
 
211
  regsz = register_size (gdbarch, reg);
212
  if (len <= regsz)
213
    {
214
      regcache_raw_read (regcache, reg, buf);
215
      memcpy (valbuf, buf, len);
216
    }
217
  else if (len <= 2 * regsz)
218
    {
219
      regcache_raw_read (regcache, reg, buf);
220
      memcpy (valbuf, buf, regsz);
221
      gdb_assert (regsz == register_size (gdbarch, reg + 1));
222
      regcache_raw_read (regcache, reg + 1, buf);
223
      memcpy ((char *) valbuf + regsz, buf, len - regsz);
224
    }
225
  else
226
    internal_error (__FILE__, __LINE__,
227
                    _("Cannot extract return value %d bytes long."), len);
228
}
229
 
230
/* Determine, for architecture GDBARCH, how a return value of TYPE
231
   should be returned.  If it is supposed to be returned in registers,
232
   and READBUF is non-zero, read the appropriate value from REGCACHE,
233
   and copy it into READBUF.  If WRITEBUF is non-zero, write the value
234
   from WRITEBUF into REGCACHE.  */
235
 
236
static enum return_value_convention
237
mn10300_return_value (struct gdbarch *gdbarch, struct type *func_type,
238
                      struct type *type, struct regcache *regcache,
239
                      gdb_byte *readbuf, const gdb_byte *writebuf)
240
{
241
  if (mn10300_use_struct_convention (type))
242
    return RETURN_VALUE_STRUCT_CONVENTION;
243
 
244
  if (readbuf)
245
    mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
246
  if (writebuf)
247
    mn10300_store_return_value (gdbarch, type, regcache, writebuf);
248
 
249
  return RETURN_VALUE_REGISTER_CONVENTION;
250
}
251
 
252
static char *
253
register_name (int reg, char **regs, long sizeof_regs)
254
{
255
  if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
256
    return NULL;
257
  else
258
    return regs[reg];
259
}
260
 
261
static const char *
262
mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
263
{
264
  static char *regs[] =
265
  { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
266
    "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
267
    "", "", "", "", "", "", "", "",
268
    "", "", "", "", "", "", "", "fp"
269
  };
270
  return register_name (reg, regs, sizeof regs);
271
}
272
 
273
 
274
static const char *
275
am33_register_name (struct gdbarch *gdbarch, int reg)
276
{
277
  static char *regs[] =
278
  { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
279
    "sp", "pc", "mdr", "psw", "lir", "lar", "",
280
    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
281
    "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
282
  };
283
  return register_name (reg, regs, sizeof regs);
284
}
285
 
286
static const char *
287
am33_2_register_name (struct gdbarch *gdbarch, int reg)
288
{
289
  static char *regs[] =
290
  {
291
    "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
292
    "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
293
    "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
294
    "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
295
    "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
296
    "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
297
    "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
298
    "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
299
  };
300
  return register_name (reg, regs, sizeof regs);
301
}
302
 
303
static struct type *
304
mn10300_register_type (struct gdbarch *gdbarch, int reg)
305
{
306
  return builtin_type (gdbarch)->builtin_int;
307
}
308
 
309
static CORE_ADDR
310
mn10300_read_pc (struct regcache *regcache)
311
{
312
  ULONGEST val;
313
  regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
314
  return val;
315
}
316
 
317
static void
318
mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
319
{
320
  regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
321
}
322
 
323
/* The breakpoint instruction must be the same size as the smallest
324
   instruction in the instruction set.
325
 
326
   The Matsushita mn10x00 processors have single byte instructions
327
   so we need a single byte breakpoint.  Matsushita hasn't defined
328
   one, so we defined it ourselves.  */
329
 
330
const static unsigned char *
331
mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
332
                            int *bp_size)
333
{
334
  static char breakpoint[] = {0xff};
335
  *bp_size = 1;
336
  return breakpoint;
337
}
338
 
339
/* Model the semantics of pushing a register onto the stack.  This
340
   is a helper function for mn10300_analyze_prologue, below.  */
341
static void
342
push_reg (pv_t *regs, struct pv_area *stack, int regnum)
343
{
344
  regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
345
  pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
346
}
347
 
348
/* Translate an "r" register number extracted from an instruction encoding
349
   into a GDB register number.  Adapted from a simulator function
350
   of the same name; see am33.igen.  */
351
static int
352
translate_rreg (int rreg)
353
{
354
 /* The higher register numbers actually correspond to the
355
     basic machine's address and data registers.  */
356
  if (rreg > 7 && rreg < 12)
357
    return E_A0_REGNUM + rreg - 8;
358
  else if (rreg > 11 && rreg < 16)
359
    return E_D0_REGNUM + rreg - 12;
360
  else
361
    return E_E0_REGNUM + rreg;
362
}
363
 
364
/* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
365
 
366
   If VALUE is a saved register, ADDR says it was saved at a constant
367
   offset from the frame base, and SIZE indicates that the whole
368
   register was saved, record its offset in RESULT_UNTYPED.  */
369
static void
370
check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
371
{
372
  struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped;
373
 
374
  if (value.kind == pvk_register
375
      && value.k == 0
376
      && pv_is_register (addr, E_SP_REGNUM)
377
      && size == register_size (result->gdbarch, value.reg))
378
    result->reg_offset[value.reg] = addr.k;
379
}
380
 
381
/* Analyze the prologue to determine where registers are saved,
382
   the end of the prologue, etc.  The result of this analysis is
383
   returned in RESULT.  See struct mn10300_prologue above for more
384
   information.  */
385
static void
386
mn10300_analyze_prologue (struct gdbarch *gdbarch,
387
                          CORE_ADDR start_pc, CORE_ADDR limit_pc,
388
                          struct mn10300_prologue *result)
389
{
390
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
391
  CORE_ADDR pc, next_pc;
392
  int rn;
393
  pv_t regs[MN10300_MAX_NUM_REGS];
394
  struct pv_area *stack;
395
  struct cleanup *back_to;
396
  CORE_ADDR after_last_frame_setup_insn = start_pc;
397
  int am33_mode = AM33_MODE (gdbarch);
398
 
399
  memset (result, 0, sizeof (*result));
400
  result->gdbarch = gdbarch;
401
 
402
  for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++)
403
    {
404
      regs[rn] = pv_register (rn, 0);
405
      result->reg_offset[rn] = 1;
406
    }
407
  stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
408
  back_to = make_cleanup_free_pv_area (stack);
409
 
410
 /* The typical call instruction will have saved the return address on the
411
    stack.  Space for the return address has already been preallocated in
412
    the caller's frame.  It's possible, such as when using -mrelax with gcc
413
    that other registers were saved as well.  If this happens, we really
414
    have no chance of deciphering the frame.  DWARF info can save the day
415
    when this happens.  */
416
  pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
417
 
418
  pc = start_pc;
419
  while (pc < limit_pc)
420
    {
421
      int status;
422
      gdb_byte instr[2];
423
 
424
      /* Instructions can be as small as one byte; however, we usually
425
         need at least two bytes to do the decoding, so fetch that many
426
         to begin with.  */
427
      status = target_read_memory (pc, instr, 2);
428
      if (status != 0)
429
        break;
430
 
431
      /* movm [regs], sp  */
432
      if (instr[0] == 0xcf)
433
        {
434
          gdb_byte save_mask;
435
 
436
          save_mask = instr[1];
437
 
438
          if ((save_mask & movm_exreg0_bit) && am33_mode)
439
            {
440
              push_reg (regs, stack, E_E2_REGNUM);
441
              push_reg (regs, stack, E_E3_REGNUM);
442
            }
443
          if ((save_mask & movm_exreg1_bit) && am33_mode)
444
            {
445
              push_reg (regs, stack, E_E4_REGNUM);
446
              push_reg (regs, stack, E_E5_REGNUM);
447
              push_reg (regs, stack, E_E6_REGNUM);
448
              push_reg (regs, stack, E_E7_REGNUM);
449
            }
450
          if ((save_mask & movm_exother_bit) && am33_mode)
451
            {
452
              push_reg (regs, stack, E_E0_REGNUM);
453
              push_reg (regs, stack, E_E1_REGNUM);
454
              push_reg (regs, stack, E_MDRQ_REGNUM);
455
              push_reg (regs, stack, E_MCRH_REGNUM);
456
              push_reg (regs, stack, E_MCRL_REGNUM);
457
              push_reg (regs, stack, E_MCVF_REGNUM);
458
            }
459
          if (save_mask & movm_d2_bit)
460
            push_reg (regs, stack, E_D2_REGNUM);
461
          if (save_mask & movm_d3_bit)
462
            push_reg (regs, stack, E_D3_REGNUM);
463
          if (save_mask & movm_a2_bit)
464
            push_reg (regs, stack, E_A2_REGNUM);
465
          if (save_mask & movm_a3_bit)
466
            push_reg (regs, stack, E_A3_REGNUM);
467
          if (save_mask & movm_other_bit)
468
            {
469
              push_reg (regs, stack, E_D0_REGNUM);
470
              push_reg (regs, stack, E_D1_REGNUM);
471
              push_reg (regs, stack, E_A0_REGNUM);
472
              push_reg (regs, stack, E_A1_REGNUM);
473
              push_reg (regs, stack, E_MDR_REGNUM);
474
              push_reg (regs, stack, E_LIR_REGNUM);
475
              push_reg (regs, stack, E_LAR_REGNUM);
476
              /* The `other' bit leaves a blank area of four bytes at
477
                 the beginning of its block of saved registers, making
478
                 it 32 bytes long in total.  */
479
              regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
480
            }
481
 
482
          pc += 2;
483
          after_last_frame_setup_insn = pc;
484
        }
485
      /* mov sp, aN */
486
      else if ((instr[0] & 0xfc) == 0x3c)
487
        {
488
          int aN = instr[0] & 0x03;
489
 
490
          regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM];
491
 
492
          pc += 1;
493
          if (aN == 3)
494
            after_last_frame_setup_insn = pc;
495
        }
496
      /* mov aM, aN */
497
      else if ((instr[0] & 0xf0) == 0x90
498
               && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
499
        {
500
          int aN = instr[0] & 0x03;
501
          int aM = (instr[0] & 0x0c) >> 2;
502
 
503
          regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM];
504
 
505
          pc += 1;
506
        }
507
      /* mov dM, dN */
508
      else if ((instr[0] & 0xf0) == 0x80
509
               && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
510
        {
511
          int dN = instr[0] & 0x03;
512
          int dM = (instr[0] & 0x0c) >> 2;
513
 
514
          regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM];
515
 
516
          pc += 1;
517
        }
518
      /* mov aM, dN */
519
      else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0)
520
        {
521
          int dN = instr[1] & 0x03;
522
          int aM = (instr[1] & 0x0c) >> 2;
523
 
524
          regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM];
525
 
526
          pc += 2;
527
        }
528
      /* mov dM, aN */
529
      else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0)
530
        {
531
          int aN = instr[1] & 0x03;
532
          int dM = (instr[1] & 0x0c) >> 2;
533
 
534
          regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM];
535
 
536
          pc += 2;
537
        }
538
      /* add imm8, SP */
539
      else if (instr[0] == 0xf8 && instr[1] == 0xfe)
540
        {
541
          gdb_byte buf[1];
542
          LONGEST imm8;
543
 
544
 
545
          status = target_read_memory (pc + 2, buf, 1);
546
          if (status != 0)
547
            break;
548
 
549
          imm8 = extract_signed_integer (buf, 1, byte_order);
550
          regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8);
551
 
552
          pc += 3;
553
          /* Stack pointer adjustments are frame related.  */
554
          after_last_frame_setup_insn = pc;
555
        }
556
      /* add imm16, SP */
557
      else if (instr[0] == 0xfa && instr[1] == 0xfe)
558
        {
559
          gdb_byte buf[2];
560
          LONGEST imm16;
561
 
562
          status = target_read_memory (pc + 2, buf, 2);
563
          if (status != 0)
564
            break;
565
 
566
          imm16 = extract_signed_integer (buf, 2, byte_order);
567
          regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16);
568
 
569
          pc += 4;
570
          /* Stack pointer adjustments are frame related.  */
571
          after_last_frame_setup_insn = pc;
572
        }
573
      /* add imm32, SP */
574
      else if (instr[0] == 0xfc && instr[1] == 0xfe)
575
        {
576
          gdb_byte buf[4];
577
          LONGEST imm32;
578
 
579
          status = target_read_memory (pc + 2, buf, 4);
580
          if (status != 0)
581
            break;
582
 
583
 
584
          imm32 = extract_signed_integer (buf, 4, byte_order);
585
          regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32);
586
 
587
          pc += 6;
588
          /* Stack pointer adjustments are frame related.  */
589
          after_last_frame_setup_insn = pc;
590
        }
591
      /* add imm8, aN  */
592
      else if ((instr[0] & 0xfc) == 0x20)
593
        {
594
          int aN;
595
          LONGEST imm8;
596
 
597
          aN = instr[0] & 0x03;
598
          imm8 = extract_signed_integer (&instr[1], 1, byte_order);
599
 
600
          regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
601
                                                    imm8);
602
 
603
          pc += 2;
604
        }
605
      /* add imm16, aN  */
606
      else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0)
607
        {
608
          int aN;
609
          LONGEST imm16;
610
          gdb_byte buf[2];
611
 
612
          aN = instr[1] & 0x03;
613
 
614
          status = target_read_memory (pc + 2, buf, 2);
615
          if (status != 0)
616
            break;
617
 
618
 
619
          imm16 = extract_signed_integer (buf, 2, byte_order);
620
 
621
          regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
622
                                                    imm16);
623
 
624
          pc += 4;
625
        }
626
      /* add imm32, aN  */
627
      else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0)
628
        {
629
          int aN;
630
          LONGEST imm32;
631
          gdb_byte buf[4];
632
 
633
          aN = instr[1] & 0x03;
634
 
635
          status = target_read_memory (pc + 2, buf, 4);
636
          if (status != 0)
637
            break;
638
 
639
          imm32 = extract_signed_integer (buf, 2, byte_order);
640
 
641
          regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
642
                                                    imm32);
643
          pc += 6;
644
        }
645
      /* fmov fsM, (rN) */
646
      else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30)
647
        {
648
          int fsM, sM, Y, rN;
649
          gdb_byte buf[1];
650
 
651
          Y = (instr[1] & 0x02) >> 1;
652
 
653
          status = target_read_memory (pc + 2, buf, 1);
654
          if (status != 0)
655
            break;
656
 
657
          sM = (buf[0] & 0xf0) >> 4;
658
          rN = buf[0] & 0x0f;
659
          fsM = (Y << 4) | sM;
660
 
661
          pv_area_store (stack, regs[translate_rreg (rN)], 4,
662
                         regs[E_FS0_REGNUM + fsM]);
663
 
664
          pc += 3;
665
        }
666
      /* fmov fsM, (sp) */
667
      else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34)
668
        {
669
          int fsM, sM, Y;
670
          gdb_byte buf[1];
671
 
672
          Y = (instr[1] & 0x02) >> 1;
673
 
674
          status = target_read_memory (pc + 2, buf, 1);
675
          if (status != 0)
676
            break;
677
 
678
          sM = (buf[0] & 0xf0) >> 4;
679
          fsM = (Y << 4) | sM;
680
 
681
          pv_area_store (stack, regs[E_SP_REGNUM], 4,
682
                         regs[E_FS0_REGNUM + fsM]);
683
 
684
          pc += 3;
685
        }
686
      /* fmov fsM, (rN, rI) */
687
      else if (instr[0] == 0xfb && instr[1] == 0x37)
688
        {
689
          int fsM, sM, Z, rN, rI;
690
          gdb_byte buf[2];
691
 
692
 
693
          status = target_read_memory (pc + 2, buf, 2);
694
          if (status != 0)
695
            break;
696
 
697
          rI = (buf[0] & 0xf0) >> 4;
698
          rN = buf[0] & 0x0f;
699
          sM = (buf[1] & 0xf0) >> 4;
700
          Z = (buf[1] & 0x02) >> 1;
701
          fsM = (Z << 4) | sM;
702
 
703
          pv_area_store (stack,
704
                         pv_add (regs[translate_rreg (rN)],
705
                                 regs[translate_rreg (rI)]),
706
                         4, regs[E_FS0_REGNUM + fsM]);
707
 
708
          pc += 4;
709
        }
710
      /* fmov fsM, (d8, rN) */
711
      else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30)
712
        {
713
          int fsM, sM, Y, rN;
714
          LONGEST d8;
715
          gdb_byte buf[2];
716
 
717
          Y = (instr[1] & 0x02) >> 1;
718
 
719
          status = target_read_memory (pc + 2, buf, 2);
720
          if (status != 0)
721
            break;
722
 
723
          sM = (buf[0] & 0xf0) >> 4;
724
          rN = buf[0] & 0x0f;
725
          fsM = (Y << 4) | sM;
726
          d8 = extract_signed_integer (&buf[1], 1, byte_order);
727
 
728
          pv_area_store (stack,
729
                         pv_add_constant (regs[translate_rreg (rN)], d8),
730
                         4, regs[E_FS0_REGNUM + fsM]);
731
 
732
          pc += 4;
733
        }
734
      /* fmov fsM, (d24, rN) */
735
      else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30)
736
        {
737
          int fsM, sM, Y, rN;
738
          LONGEST d24;
739
          gdb_byte buf[4];
740
 
741
          Y = (instr[1] & 0x02) >> 1;
742
 
743
          status = target_read_memory (pc + 2, buf, 4);
744
          if (status != 0)
745
            break;
746
 
747
          sM = (buf[0] & 0xf0) >> 4;
748
          rN = buf[0] & 0x0f;
749
          fsM = (Y << 4) | sM;
750
          d24 = extract_signed_integer (&buf[1], 3, byte_order);
751
 
752
          pv_area_store (stack,
753
                         pv_add_constant (regs[translate_rreg (rN)], d24),
754
                         4, regs[E_FS0_REGNUM + fsM]);
755
 
756
          pc += 6;
757
        }
758
      /* fmov fsM, (d32, rN) */
759
      else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30)
760
        {
761
          int fsM, sM, Y, rN;
762
          LONGEST d32;
763
          gdb_byte buf[5];
764
 
765
          Y = (instr[1] & 0x02) >> 1;
766
 
767
          status = target_read_memory (pc + 2, buf, 5);
768
          if (status != 0)
769
            break;
770
 
771
          sM = (buf[0] & 0xf0) >> 4;
772
          rN = buf[0] & 0x0f;
773
          fsM = (Y << 4) | sM;
774
          d32 = extract_signed_integer (&buf[1], 4, byte_order);
775
 
776
          pv_area_store (stack,
777
                         pv_add_constant (regs[translate_rreg (rN)], d32),
778
                         4, regs[E_FS0_REGNUM + fsM]);
779
 
780
          pc += 7;
781
        }
782
      /* fmov fsM, (d8, SP) */
783
      else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34)
784
        {
785
          int fsM, sM, Y;
786
          LONGEST d8;
787
          gdb_byte buf[2];
788
 
789
          Y = (instr[1] & 0x02) >> 1;
790
 
791
          status = target_read_memory (pc + 2, buf, 2);
792
          if (status != 0)
793
            break;
794
 
795
          sM = (buf[0] & 0xf0) >> 4;
796
          fsM = (Y << 4) | sM;
797
          d8 = extract_signed_integer (&buf[1], 1, byte_order);
798
 
799
          pv_area_store (stack,
800
                         pv_add_constant (regs[E_SP_REGNUM], d8),
801
                         4, regs[E_FS0_REGNUM + fsM]);
802
 
803
          pc += 4;
804
        }
805
      /* fmov fsM, (d24, SP) */
806
      else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34)
807
        {
808
          int fsM, sM, Y;
809
          LONGEST d24;
810
          gdb_byte buf[4];
811
 
812
          Y = (instr[1] & 0x02) >> 1;
813
 
814
          status = target_read_memory (pc + 2, buf, 4);
815
          if (status != 0)
816
            break;
817
 
818
          sM = (buf[0] & 0xf0) >> 4;
819
          fsM = (Y << 4) | sM;
820
          d24 = extract_signed_integer (&buf[1], 3, byte_order);
821
 
822
          pv_area_store (stack,
823
                         pv_add_constant (regs[E_SP_REGNUM], d24),
824
                         4, regs[E_FS0_REGNUM + fsM]);
825
 
826
          pc += 6;
827
        }
828
      /* fmov fsM, (d32, SP) */
829
      else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34)
830
        {
831
          int fsM, sM, Y;
832
          LONGEST d32;
833
          gdb_byte buf[5];
834
 
835
          Y = (instr[1] & 0x02) >> 1;
836
 
837
          status = target_read_memory (pc + 2, buf, 5);
838
          if (status != 0)
839
            break;
840
 
841
          sM = (buf[0] & 0xf0) >> 4;
842
          fsM = (Y << 4) | sM;
843
          d32 = extract_signed_integer (&buf[1], 4, byte_order);
844
 
845
          pv_area_store (stack,
846
                         pv_add_constant (regs[E_SP_REGNUM], d32),
847
                         4, regs[E_FS0_REGNUM + fsM]);
848
 
849
          pc += 7;
850
        }
851
      /* fmov fsM, (rN+) */
852
      else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31)
853
        {
854
          int fsM, sM, Y, rN, rN_regnum;
855
          gdb_byte buf[1];
856
 
857
          Y = (instr[1] & 0x02) >> 1;
858
 
859
          status = target_read_memory (pc + 2, buf, 1);
860
          if (status != 0)
861
            break;
862
 
863
          sM = (buf[0] & 0xf0) >> 4;
864
          rN = buf[0] & 0x0f;
865
          fsM = (Y << 4) | sM;
866
 
867
          rN_regnum = translate_rreg (rN);
868
 
869
          pv_area_store (stack, regs[rN_regnum], 4,
870
                         regs[E_FS0_REGNUM + fsM]);
871
          regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
872
 
873
          pc += 3;
874
        }
875
      /* fmov fsM, (rN+, imm8) */
876
      else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31)
877
        {
878
          int fsM, sM, Y, rN, rN_regnum;
879
          LONGEST imm8;
880
          gdb_byte buf[2];
881
 
882
          Y = (instr[1] & 0x02) >> 1;
883
 
884
          status = target_read_memory (pc + 2, buf, 2);
885
          if (status != 0)
886
            break;
887
 
888
          sM = (buf[0] & 0xf0) >> 4;
889
          rN = buf[0] & 0x0f;
890
          fsM = (Y << 4) | sM;
891
          imm8 = extract_signed_integer (&buf[1], 1, byte_order);
892
 
893
          rN_regnum = translate_rreg (rN);
894
 
895
          pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
896
          regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
897
 
898
          pc += 4;
899
        }
900
      /* fmov fsM, (rN+, imm24) */
901
      else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31)
902
        {
903
          int fsM, sM, Y, rN, rN_regnum;
904
          LONGEST imm24;
905
          gdb_byte buf[4];
906
 
907
          Y = (instr[1] & 0x02) >> 1;
908
 
909
          status = target_read_memory (pc + 2, buf, 4);
910
          if (status != 0)
911
            break;
912
 
913
          sM = (buf[0] & 0xf0) >> 4;
914
          rN = buf[0] & 0x0f;
915
          fsM = (Y << 4) | sM;
916
          imm24 = extract_signed_integer (&buf[1], 3, byte_order);
917
 
918
          rN_regnum = translate_rreg (rN);
919
 
920
          pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
921
          regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
922
 
923
          pc += 6;
924
        }
925
      /* fmov fsM, (rN+, imm32) */
926
      else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31)
927
        {
928
          int fsM, sM, Y, rN, rN_regnum;
929
          LONGEST imm32;
930
          gdb_byte buf[5];
931
 
932
          Y = (instr[1] & 0x02) >> 1;
933
 
934
          status = target_read_memory (pc + 2, buf, 5);
935
          if (status != 0)
936
            break;
937
 
938
          sM = (buf[0] & 0xf0) >> 4;
939
          rN = buf[0] & 0x0f;
940
          fsM = (Y << 4) | sM;
941
          imm32 = extract_signed_integer (&buf[1], 4, byte_order);
942
 
943
          rN_regnum = translate_rreg (rN);
944
 
945
          pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
946
          regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
947
 
948
          pc += 7;
949
        }
950
      /* mov imm8, aN */
951
      else if ((instr[0] & 0xf0) == 0x90)
952
        {
953
          int aN = instr[0] & 0x03;
954
          LONGEST imm8;
955
 
956
          imm8 = extract_signed_integer (&instr[1], 1, byte_order);
957
 
958
          regs[E_A0_REGNUM + aN] = pv_constant (imm8);
959
          pc += 2;
960
        }
961
      /* mov imm16, aN */
962
      else if ((instr[0] & 0xfc) == 0x24)
963
        {
964
          int aN = instr[0] & 0x03;
965
          gdb_byte buf[2];
966
          LONGEST imm16;
967
 
968
          status = target_read_memory (pc + 1, buf, 2);
969
          if (status != 0)
970
            break;
971
 
972
          imm16 = extract_signed_integer (buf, 2, byte_order);
973
          regs[E_A0_REGNUM + aN] = pv_constant (imm16);
974
          pc += 3;
975
        }
976
      /* mov imm32, aN */
977
      else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
978
        {
979
          int aN = instr[1] & 0x03;
980
          gdb_byte buf[4];
981
          LONGEST imm32;
982
 
983
          status = target_read_memory (pc + 2, buf, 4);
984
          if (status != 0)
985
            break;
986
 
987
          imm32 = extract_signed_integer (buf, 4, byte_order);
988
          regs[E_A0_REGNUM + aN] = pv_constant (imm32);
989
          pc += 6;
990
        }
991
      /* mov imm8, dN */
992
      else if ((instr[0] & 0xf0) == 0x80)
993
        {
994
          int dN = instr[0] & 0x03;
995
          LONGEST imm8;
996
 
997
          imm8 = extract_signed_integer (&instr[1], 1, byte_order);
998
 
999
          regs[E_D0_REGNUM + dN] = pv_constant (imm8);
1000
          pc += 2;
1001
        }
1002
      /* mov imm16, dN */
1003
      else if ((instr[0] & 0xfc) == 0x2c)
1004
        {
1005
          int dN = instr[0] & 0x03;
1006
          gdb_byte buf[2];
1007
          LONGEST imm16;
1008
 
1009
          status = target_read_memory (pc + 1, buf, 2);
1010
          if (status != 0)
1011
            break;
1012
 
1013
          imm16 = extract_signed_integer (buf, 2, byte_order);
1014
          regs[E_D0_REGNUM + dN] = pv_constant (imm16);
1015
          pc += 3;
1016
        }
1017
      /* mov imm32, dN */
1018
      else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
1019
        {
1020
          int dN = instr[1] & 0x03;
1021
          gdb_byte buf[4];
1022
          LONGEST imm32;
1023
 
1024
          status = target_read_memory (pc + 2, buf, 4);
1025
          if (status != 0)
1026
            break;
1027
 
1028
          imm32 = extract_signed_integer (buf, 4, byte_order);
1029
          regs[E_D0_REGNUM + dN] = pv_constant (imm32);
1030
          pc += 6;
1031
        }
1032
      else
1033
        {
1034
          /* We've hit some instruction that we don't recognize.  Hopefully,
1035
             we have enough to do prologue analysis.  */
1036
          break;
1037
        }
1038
    }
1039
 
1040
  /* Is the frame size (offset, really) a known constant?  */
1041
  if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM))
1042
    result->frame_size = regs[E_SP_REGNUM].k;
1043
 
1044
  /* Was the frame pointer initialized?  */
1045
  if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM))
1046
    {
1047
      result->has_frame_ptr = 1;
1048
      result->frame_ptr_offset = regs[E_A3_REGNUM].k;
1049
    }
1050
 
1051
  /* Record where all the registers were saved.  */
1052
  pv_area_scan (stack, check_for_saved, (void *) result);
1053
 
1054
  result->prologue_end = after_last_frame_setup_insn;
1055
 
1056
  do_cleanups (back_to);
1057
}
1058
 
1059
/* Function: skip_prologue
1060
   Return the address of the first inst past the prologue of the function.  */
1061
 
1062
static CORE_ADDR
1063
mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1064
{
1065
  char *name;
1066
  CORE_ADDR func_addr, func_end;
1067
  struct mn10300_prologue p;
1068
 
1069
  /* Try to find the extent of the function that contains PC.  */
1070
  if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
1071
    return pc;
1072
 
1073
  mn10300_analyze_prologue (gdbarch, pc, func_end, &p);
1074
  return p.prologue_end;
1075
}
1076
 
1077
/* Wrapper for mn10300_analyze_prologue: find the function start;
1078
   use the current frame PC as the limit, then
1079
   invoke mn10300_analyze_prologue and return its result.  */
1080
static struct mn10300_prologue *
1081
mn10300_analyze_frame_prologue (struct frame_info *this_frame,
1082
                           void **this_prologue_cache)
1083
{
1084
  if (!*this_prologue_cache)
1085
    {
1086
      CORE_ADDR func_start, stop_addr;
1087
 
1088
      *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue);
1089
 
1090
      func_start = get_frame_func (this_frame);
1091
      stop_addr = get_frame_pc (this_frame);
1092
 
1093
      /* If we couldn't find any function containing the PC, then
1094
         just initialize the prologue cache, but don't do anything.  */
1095
      if (!func_start)
1096
        stop_addr = func_start;
1097
 
1098
      mn10300_analyze_prologue (get_frame_arch (this_frame),
1099
                                func_start, stop_addr, *this_prologue_cache);
1100
    }
1101
 
1102
  return *this_prologue_cache;
1103
}
1104
 
1105
/* Given the next frame and a prologue cache, return this frame's
1106
   base.  */
1107
static CORE_ADDR
1108
mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
1109
{
1110
  struct mn10300_prologue *p
1111
    = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1112
 
1113
  /* In functions that use alloca, the distance between the stack
1114
     pointer and the frame base varies dynamically, so we can't use
1115
     the SP plus static information like prologue analysis to find the
1116
     frame base.  However, such functions must have a frame pointer,
1117
     to be able to restore the SP on exit.  So whenever we do have a
1118
     frame pointer, use that to find the base.  */
1119
  if (p->has_frame_ptr)
1120
    {
1121
      CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM);
1122
      return fp - p->frame_ptr_offset;
1123
    }
1124
  else
1125
    {
1126
      CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1127
      return sp - p->frame_size;
1128
    }
1129
}
1130
 
1131
/* Here is a dummy implementation.  */
1132
static struct frame_id
1133
mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1134
{
1135
  CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1136
  CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
1137
  return frame_id_build (sp, pc);
1138
}
1139
 
1140
static void
1141
mn10300_frame_this_id (struct frame_info *this_frame,
1142
                       void **this_prologue_cache,
1143
                       struct frame_id *this_id)
1144
{
1145
  *this_id = frame_id_build (mn10300_frame_base (this_frame, this_prologue_cache),
1146
                             get_frame_func (this_frame));
1147
 
1148
}
1149
 
1150
static struct value *
1151
mn10300_frame_prev_register (struct frame_info *this_frame,
1152
                             void **this_prologue_cache, int regnum)
1153
{
1154
  struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1155
  struct mn10300_prologue *p
1156
    = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1157
  CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
1158
  int reg_size = register_size (get_frame_arch (this_frame), regnum);
1159
 
1160
  if (regnum == E_SP_REGNUM)
1161
    return frame_unwind_got_constant (this_frame, regnum, frame_base);
1162
 
1163
  /* If prologue analysis says we saved this register somewhere,
1164
     return a description of the stack slot holding it.  */
1165
  if (p->reg_offset[regnum] != 1)
1166
    return frame_unwind_got_memory (this_frame, regnum,
1167
                                    frame_base + p->reg_offset[regnum]);
1168
 
1169
  /* Otherwise, presume we haven't changed the value of this
1170
     register, and get it from the next frame.  */
1171
  return frame_unwind_got_register (this_frame, regnum, regnum);
1172
}
1173
 
1174
static const struct frame_unwind mn10300_frame_unwind = {
1175
  NORMAL_FRAME,
1176
  mn10300_frame_this_id,
1177
  mn10300_frame_prev_register,
1178
  NULL,
1179
  default_frame_sniffer
1180
};
1181
 
1182
static CORE_ADDR
1183
mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
1184
{
1185
  ULONGEST pc;
1186
 
1187
  pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM);
1188
  return pc;
1189
}
1190
 
1191
static CORE_ADDR
1192
mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1193
{
1194
  ULONGEST sp;
1195
 
1196
  sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM);
1197
  return sp;
1198
}
1199
 
1200
static void
1201
mn10300_frame_unwind_init (struct gdbarch *gdbarch)
1202
{
1203
  dwarf2_append_unwinders (gdbarch);
1204
  frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
1205
  set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id);
1206
  set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
1207
  set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
1208
}
1209
 
1210
/* Function: push_dummy_call
1211
 *
1212
 * Set up machine state for a target call, including
1213
 * function arguments, stack, return address, etc.
1214
 *
1215
 */
1216
 
1217
static CORE_ADDR
1218
mn10300_push_dummy_call (struct gdbarch *gdbarch,
1219
                         struct value *target_func,
1220
                         struct regcache *regcache,
1221
                         CORE_ADDR bp_addr,
1222
                         int nargs, struct value **args,
1223
                         CORE_ADDR sp,
1224
                         int struct_return,
1225
                         CORE_ADDR struct_addr)
1226
{
1227
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1228
  const int push_size = register_size (gdbarch, E_PC_REGNUM);
1229
  int regs_used;
1230
  int len, arg_len;
1231
  int stack_offset = 0;
1232
  int argnum;
1233
  char *val, valbuf[MAX_REGISTER_SIZE];
1234
 
1235
  /* This should be a nop, but align the stack just in case something
1236
     went wrong.  Stacks are four byte aligned on the mn10300.  */
1237
  sp &= ~3;
1238
 
1239
  /* Now make space on the stack for the args.
1240
 
1241
     XXX This doesn't appear to handle pass-by-invisible reference
1242
     arguments.  */
1243
  regs_used = struct_return ? 1 : 0;
1244
  for (len = 0, argnum = 0; argnum < nargs; argnum++)
1245
    {
1246
      arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
1247
      while (regs_used < 2 && arg_len > 0)
1248
        {
1249
          regs_used++;
1250
          arg_len -= push_size;
1251
        }
1252
      len += arg_len;
1253
    }
1254
 
1255
  /* Allocate stack space.  */
1256
  sp -= len;
1257
 
1258
  if (struct_return)
1259
    {
1260
      regs_used = 1;
1261
      regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
1262
    }
1263
  else
1264
    regs_used = 0;
1265
 
1266
  /* Push all arguments onto the stack. */
1267
  for (argnum = 0; argnum < nargs; argnum++)
1268
    {
1269
      /* FIXME what about structs?  Unions?  */
1270
      if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
1271
          && TYPE_LENGTH (value_type (*args)) > 8)
1272
        {
1273
          /* Change to pointer-to-type.  */
1274
          arg_len = push_size;
1275
          store_unsigned_integer (valbuf, push_size, byte_order,
1276
                                  value_address (*args));
1277
          val = &valbuf[0];
1278
        }
1279
      else
1280
        {
1281
          arg_len = TYPE_LENGTH (value_type (*args));
1282
          val = (char *) value_contents (*args);
1283
        }
1284
 
1285
      while (regs_used < 2 && arg_len > 0)
1286
        {
1287
          regcache_cooked_write_unsigned (regcache, regs_used,
1288
                  extract_unsigned_integer (val, push_size, byte_order));
1289
          val += push_size;
1290
          arg_len -= push_size;
1291
          regs_used++;
1292
        }
1293
 
1294
      while (arg_len > 0)
1295
        {
1296
          write_memory (sp + stack_offset, val, push_size);
1297
          arg_len -= push_size;
1298
          val += push_size;
1299
          stack_offset += push_size;
1300
        }
1301
 
1302
      args++;
1303
    }
1304
 
1305
  /* Make space for the flushback area.  */
1306
  sp -= 8;
1307
 
1308
  /* Push the return address that contains the magic breakpoint.  */
1309
  sp -= 4;
1310
  write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr);
1311
 
1312
  /* The CPU also writes the return address always into the
1313
     MDR register on "call".  */
1314
  regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
1315
 
1316
  /* Update $sp.  */
1317
  regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
1318
 
1319
  /* On the mn10300, it's possible to move some of the stack adjustment
1320
     and saving of the caller-save registers out of the prologue and
1321
     into the call sites.  (When using gcc, this optimization can
1322
     occur when using the -mrelax switch.) If this occurs, the dwarf2
1323
     info will reflect this fact.  We can test to see if this is the
1324
     case by creating a new frame using the current stack pointer and
1325
     the address of the function that we're about to call.  We then
1326
     unwind SP and see if it's different than the SP of our newly
1327
     created frame.  If the SP values are the same, the caller is not
1328
     expected to allocate any additional stack.  On the other hand, if
1329
     the SP values are different, the difference determines the
1330
     additional stack that must be allocated.
1331
 
1332
     Note that we don't update the return value though because that's
1333
     the value of the stack just after pushing the arguments, but prior
1334
     to performing the call.  This value is needed in order to
1335
     construct the frame ID of the dummy call.   */
1336
  {
1337
    CORE_ADDR func_addr = find_function_addr (target_func, NULL);
1338
    CORE_ADDR unwound_sp
1339
      = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
1340
    if (sp != unwound_sp)
1341
      regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
1342
                                      sp - (unwound_sp - sp));
1343
  }
1344
 
1345
  return sp;
1346
}
1347
 
1348
/* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1349
   mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1350
   register number.  Why don't Dwarf2 and GDB use the same numbering?
1351
   Who knows?  But since people have object files lying around with
1352
   the existing Dwarf2 numbering, and other people have written stubs
1353
   to work with the existing GDB, neither of them can change.  So we
1354
   just have to cope.  */
1355
static int
1356
mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
1357
{
1358
  /* This table is supposed to be shaped like the gdbarch_register_name
1359
     initializer in gcc/config/mn10300/mn10300.h.  Registers which
1360
     appear in GCC's numbering, but have no counterpart in GDB's
1361
     world, are marked with a -1.  */
1362
  static int dwarf2_to_gdb[] = {
1363
    0,  1,  2,  3,  4,  5,  6,  7, -1, 8,
1364
    15, 16, 17, 18, 19, 20, 21, 22,
1365
    32, 33, 34, 35, 36, 37, 38, 39,
1366
    40, 41, 42, 43, 44, 45, 46, 47,
1367
    48, 49, 50, 51, 52, 53, 54, 55,
1368
    56, 57, 58, 59, 60, 61, 62, 63,
1369
    9, 11
1370
  };
1371
 
1372
  if (dwarf2 < 0
1373
      || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
1374
    {
1375
      warning (_("Bogus register number in debug info: %d"), dwarf2);
1376
      return -1;
1377
    }
1378
 
1379
  return dwarf2_to_gdb[dwarf2];
1380
}
1381
 
1382
static struct gdbarch *
1383
mn10300_gdbarch_init (struct gdbarch_info info,
1384
                      struct gdbarch_list *arches)
1385
{
1386
  struct gdbarch *gdbarch;
1387
  struct gdbarch_tdep *tdep;
1388
  int num_regs;
1389
 
1390
  arches = gdbarch_list_lookup_by_info (arches, &info);
1391
  if (arches != NULL)
1392
    return arches->gdbarch;
1393
 
1394
  tdep = xmalloc (sizeof (struct gdbarch_tdep));
1395
  gdbarch = gdbarch_alloc (&info, tdep);
1396
 
1397
  switch (info.bfd_arch_info->mach)
1398
    {
1399
    case 0:
1400
    case bfd_mach_mn10300:
1401
      set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
1402
      tdep->am33_mode = 0;
1403
      num_regs = 32;
1404
      break;
1405
    case bfd_mach_am33:
1406
      set_gdbarch_register_name (gdbarch, am33_register_name);
1407
      tdep->am33_mode = 1;
1408
      num_regs = 32;
1409
      break;
1410
    case bfd_mach_am33_2:
1411
      set_gdbarch_register_name (gdbarch, am33_2_register_name);
1412
      tdep->am33_mode = 2;
1413
      num_regs = 64;
1414
      set_gdbarch_fp0_regnum (gdbarch, 32);
1415
      break;
1416
    default:
1417
      internal_error (__FILE__, __LINE__,
1418
                      _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1419
      break;
1420
    }
1421
 
1422
  /* By default, chars are unsigned.  */
1423
  set_gdbarch_char_signed (gdbarch, 0);
1424
 
1425
  /* Registers.  */
1426
  set_gdbarch_num_regs (gdbarch, num_regs);
1427
  set_gdbarch_register_type (gdbarch, mn10300_register_type);
1428
  set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
1429
  set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
1430
  set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
1431
  set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1432
  set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1433
  set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
1434
 
1435
  /* Stack unwinding.  */
1436
  set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1437
  /* Breakpoints.  */
1438
  set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
1439
  /* decr_pc_after_break? */
1440
  /* Disassembly.  */
1441
  set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
1442
 
1443
  /* Stage 2 */
1444
  set_gdbarch_return_value (gdbarch, mn10300_return_value);
1445
 
1446
  /* Stage 3 -- get target calls working.  */
1447
  set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
1448
  /* set_gdbarch_return_value (store, extract) */
1449
 
1450
 
1451
  mn10300_frame_unwind_init (gdbarch);
1452
 
1453
  /* Hook in ABI-specific overrides, if they have been registered.  */
1454
  gdbarch_init_osabi (info, gdbarch);
1455
 
1456
  return gdbarch;
1457
}
1458
 
1459
/* Dump out the mn10300 specific architecture information. */
1460
 
1461
static void
1462
mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
1463
{
1464
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1465
  fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
1466
                      tdep->am33_mode);
1467
}
1468
 
1469
/* Provide a prototype to silence -Wmissing-prototypes.  */
1470
extern initialize_file_ftype _initialize_mn10300_tdep;
1471
 
1472
void
1473
_initialize_mn10300_tdep (void)
1474
{
1475
  gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);
1476
}
1477
 

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