OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [include/] [gdb/] [sim-lm32.h] - Blame information for rev 825

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
/* This file defines the interface between the LM32 simulator and GDB.
2
   Contributed by Jon Beniston <jon@beniston.com>
3
 
4
   Copyright (C) 2009, 2010 Free Software Foundation, Inc.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
#ifndef SIM_LM32_H
22
#define SIM_LM32_H
23
 
24
#ifdef __cplusplus
25
extern "C" { // }
26
#endif
27
 
28
enum sim_lm32_regs
29
{
30
  SIM_LM32_R0_REGNUM,
31
  SIM_LM32_R1_REGNUM,
32
  SIM_LM32_R2_REGNUM,
33
  SIM_LM32_R3_REGNUM,
34
  SIM_LM32_R4_REGNUM,
35
  SIM_LM32_R5_REGNUM,
36
  SIM_LM32_R6_REGNUM,
37
  SIM_LM32_R7_REGNUM,
38
  SIM_LM32_R8_REGNUM,
39
  SIM_LM32_R9_REGNUM,
40
  SIM_LM32_R10_REGNUM,
41
  SIM_LM32_R11_REGNUM,
42
  SIM_LM32_R12_REGNUM,
43
  SIM_LM32_R13_REGNUM,
44
  SIM_LM32_R14_REGNUM,
45
  SIM_LM32_R15_REGNUM,
46
  SIM_LM32_R16_REGNUM,
47
  SIM_LM32_R17_REGNUM,
48
  SIM_LM32_R18_REGNUM,
49
  SIM_LM32_R19_REGNUM,
50
  SIM_LM32_R20_REGNUM,
51
  SIM_LM32_R21_REGNUM,
52
  SIM_LM32_R22_REGNUM,
53
  SIM_LM32_R23_REGNUM,
54
  SIM_LM32_R24_REGNUM,
55
  SIM_LM32_R25_REGNUM,
56
  SIM_LM32_GP_REGNUM,
57
  SIM_LM32_FP_REGNUM,
58
  SIM_LM32_SP_REGNUM,
59
  SIM_LM32_RA_REGNUM,
60
  SIM_LM32_BA_REGNUM,
61
  SIM_LM32_EA_REGNUM,
62
  SIM_LM32_PC_REGNUM,
63
  SIM_LM32_EID_REGNUM,
64
  SIM_LM32_EBA_REGNUM,
65
  SIM_LM32_DEBA_REGNUM,
66
  SIM_LM32_IE_REGNUM,
67
  SIM_LM32_IM_REGNUM,
68
  SIM_LM32_IP_REGNUM,
69
  SIM_LM32_NUM_REGS
70
};
71
 
72
#ifdef __cplusplus
73
}
74
#endif
75
 
76
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.