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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [include/] [opcode/] [ChangeLog] - Blame information for rev 833

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Line No. Rev Author Line
1 227 jeremybenn
2010-02-08  Philipp Tomsich  
2
 
3
        * opcode/ppc.h (PPC_OPCODE_TITAN): Define.
4
 
5
2010-01-14  H.J. Lu  
6
 
7
        * ia64.h (ia64_find_opcode): Remove argument name.
8
        (ia64_find_next_opcode): Likewise.
9
        (ia64_dis_opcode): Likewise.
10
        (ia64_free_opcode): Likewise.
11
        (ia64_find_dependency): Likewise.
12
 
13
2009-11-22  Doug Evans  
14
 
15
        * cgen.h: Include bfd_stdint.h.
16
        (CGEN_INSN_LGSINT, CGEN_INSN_LGUINT): New types.
17
 
18
2009-11-18  Paul Brook  
19
 
20
        * arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
21
 
22
2009-11-17  Paul Brook  
23
        Daniel Jacobowitz  
24
 
25
        * arm.h (ARM_EXT_V6_DSP): Define.
26
        (ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
27
        (ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.
28
 
29
2009-11-04  DJ Delorie  
30
 
31
        * rx.h (rx_decode_opcode) (mvtipl): Add.
32
        (mvtcp, mvfcp, opecp): Remove.
33
 
34
2009-11-02  Paul Brook  
35
 
36
        * arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
37
        FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
38
        (FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
39
        FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
40
        FPU_ARCH_NEON_VFP_V4): Define.
41
 
42
2009-10-23  Doug Evans  
43
 
44
        * cgen-bitset.h: Delete, moved to ../cgen/bitset.h.
45
        * cgen.h: Update.  Improve multi-inclusion macro name.
46
 
47
2009-10-02  Peter Bergner  
48
 
49
        * ppc.h (PPC_OPCODE_476): Define.
50
 
51
2009-10-01  Peter Bergner  
52
 
53
        * ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
54
 
55
2009-09-29  DJ Delorie  
56
 
57
        * rx.h: New file.
58
 
59
2009-09-22  Peter Bergner  
60
 
61
        * ppc.h (ppc_cpu_t): Typedef to uint64_t.
62
 
63
2009-09-21  Ben Elliston  
64
 
65
        * ppc.h (PPC_OPCODE_PPCA2): New.
66
 
67
2009-09-05  Martin Thuresson  
68
 
69
        * ia64.h (struct ia64_operand): Renamed member class to op_class.
70
 
71
2009-08-29  Martin Thuresson  
72
 
73
        * tic30.h (template): Rename type template to
74
        insn_template. Updated code to use new name.
75
        * tic54x.h (template): Rename type template to
76
        insn_template.
77
 
78
2009-08-20  Nick Hudson  
79
 
80
        * hppa.h (pa_opcodes): Add a pa10 bb without FLAG_STRICT.
81
 
82
2009-06-11  Anthony Green  
83
 
84
        * moxie.h (MOXIE_F3_PCREL): Define.
85
        (moxie_form3_opc_info): Grow.
86
 
87
2009-06-06  Anthony Green  
88
 
89
        * moxie.h (MOXIE_F1_M): Define.
90
 
91
2009-04-15  Anthony Green  
92
 
93
        * moxie.h: Created.
94
 
95
2009-04-06  DJ Delorie  
96
 
97
        * h8300.h: Add relaxation attributes to MOVA opcodes.
98
 
99
2009-03-10  Alan Modra  
100
 
101
        * ppc.h (ppc_parse_cpu): Declare.
102
 
103
2009-03-02  Qinwei  
104
 
105
        * score-inst.h (score_insn_type, score_data_type): Add Ra_I9_I5
106
        and _IMM11 for mbitclr and mbitset.
107
        * score-datadep.h: Update dependency information.
108
 
109
2009-02-26  Peter Bergner  
110
 
111
        * ppc.h (PPC_OPCODE_POWER7): New.
112
 
113
2009-02-06  Doug Evans  
114
 
115
        * i386.h: Add comment regarding sse* insns and prefixes.
116
 
117
2009-02-03  Sandip Matte  
118
 
119
        * mips.h (INSN_XLR): Define.
120
        (INSN_CHIP_MASK): Update.
121
        (CPU_XLR): Define.
122
        (OPCODE_IS_MEMBER): Update.
123
        (M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
124
 
125
2009-01-28  Doug Evans  
126
 
127
        * opcode/i386.h: Add multiple inclusion protection.
128
        (EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
129
        (EDI_REG_NUM): New macros.
130
        (MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
131
        (SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros.
132
        (REX_PREFIX_P): New macro.
133
 
134
2009-01-09  Peter Bergner  
135
 
136
        * ppc.h (struct powerpc_opcode): New field "deprecated".
137
        (PPC_OPCODE_NOPOWER4): Delete.
138
 
139
2008-11-28  Joshua Kinard  
140
 
141
        * mips.h: Define CPU_R14000, CPU_R16000.
142
        (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
143
 
144
2008-11-18  Catherine Moore  
145
 
146
        * arm.h (FPU_NEON_FP16): New.
147
        (FPU_ARCH_NEON_FP16): New.
148
 
149
2008-11-06  Chao-ying Fu  
150
 
151
        * mips.h: Doucument '1' for 5-bit sync type.
152
 
153
2008-08-28  H.J. Lu  
154
 
155
        * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB.  Update
156
        IA64_RS_CR.
157
 
158
2008-08-01  Peter Bergner  
159
 
160
        * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
161
 
162
2008-07-30  Michael J. Eager  
163
 
164
        * ppc.h (PPC_OPCODE_405): Define.
165
        (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
166
 
167
2008-06-13  Peter Bergner  
168
 
169
        * ppc.h (ppc_cpu_t): New typedef.
170
        (struct powerpc_opcode ): Use it.
171
        (struct powerpc_operand ): Likewise.
172
        (struct powerpc_macro ): Likewise.
173
 
174
2008-06-12  Adam Nemet  
175
 
176
        * mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
177
        Update comment before MIPS16 field descriptors to mention MIPS16.
178
        (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
179
        BBIT.
180
        (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
181
        New bit masks and shift counts for cins and exts.
182
 
183
        * mips.h: Document new field descriptors +Q.
184
        (OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
185
 
186
2008-04-28  Adam Nemet  
187
 
188
        * mips.h (INSN_MACRO): Move it up to the the pinfo macros.
189
        (INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
190
 
191
2008-04-14  Edmar Wienskoski  
192
 
193
        * ppc.h: (PPC_OPCODE_E500MC): New.
194
 
195
2008-04-03  H.J. Lu  
196
 
197
        * i386.h (MAX_OPERANDS): Set to 5.
198
        (MAX_MNEM_SIZE): Changed to 20.
199
 
200
2008-03-28  Eric B. Weddington  
201
 
202
        * avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
203
 
204
2008-03-09  Paul Brook  
205
 
206
        * arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
207
 
208
2008-03-04  Paul Brook  
209
 
210
        * arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
211
        (ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
212
        (ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
213
 
214
2008-02-27  Denis Vlasenko  
215
            Nick Clifton  
216
 
217
        PR 3134
218
        * h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
219
        with a 32-bit displacement but without the top bit of the 4th byte
220
        set.
221
 
222
2008-02-18  M R Swami Reddy 
223
 
224
        * cr16.h (cr16_num_optab): Declared.
225
 
226
2008-02-14  Hakan Ardo  
227
 
228
        PR gas/2626
229
        * avr.h (AVR_ISA_2xxe): Define.
230
 
231
2008-02-04  Adam Nemet  
232
 
233
        * mips.h: Update copyright.
234
        (INSN_CHIP_MASK): New macro.
235
        (INSN_OCTEON): New macro.
236
        (CPU_OCTEON): New macro.
237
        (OPCODE_IS_MEMBER): Handle Octeon instructions.
238
 
239
2008-01-23  Eric B. Weddington  
240
 
241
        * avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
242
 
243
2008-01-03  Eric B. Weddington  
244
 
245
        * avr.h (AVR_ISA_USB162): Add new opcode set.
246
        (AVR_ISA_AVR3): Likewise.
247
 
248
2007-11-29  Mark Shinwell  
249
 
250
        * mips.h (INSN_LOONGSON_2E): New.
251
        (INSN_LOONGSON_2F): New.
252
        (CPU_LOONGSON_2E): New.
253
        (CPU_LOONGSON_2F): New.
254
        (OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
255
 
256
2007-11-29  Mark Shinwell  
257
 
258
        * mips.h (INSN_ISA*): Redefine certain values as an
259
        enumeration.  Update comments.
260
        (mips_isa_table): New.
261
        (ISA_MIPS*): Redefine to match enumeration.
262
        (OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
263
        values.
264
 
265
2007-08-08  Ben Elliston  
266
 
267
        * ppc.h (PPC_OPCODE_PPCPS): New.
268
 
269
2007-07-03  Nathan Sidwell  
270
 
271
        * m68k.h: Document j K & E.
272
 
273
2007-06-29  M R Swami Reddy  
274
 
275
        * cr16.h: New file for CR16 target.
276
 
277
2007-05-02  Alan Modra  
278
 
279
        * ppc.h (PPC_OPERAND_PLUS1): Update comment.
280
 
281
2007-04-23  Nathan Sidwell  
282
 
283
        * m68k.h (mcfisa_c): New.
284
        (mcfusp, mcf_mask): Adjust.
285
 
286
2007-04-20  Alan Modra  
287
 
288
        * ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
289
        (num_powerpc_operands): Declare.
290
        (PPC_OPERAND_SIGNED et al): Redefine as hex.
291
        (PPC_OPERAND_PLUS1): Define.
292
 
293
2007-03-21  H.J. Lu  
294
 
295
        * i386.h (REX_MODE64): Renamed to ...
296
        (REX_W): This.
297
        (REX_EXTX): Renamed to ...
298
        (REX_R): This.
299
        (REX_EXTY): Renamed to ...
300
        (REX_X): This.
301
        (REX_EXTZ): Renamed to ...
302
        (REX_B): This.
303
 
304
2007-03-15  H.J. Lu  
305
 
306
        * i386.h: Add entries from config/tc-i386.h and move tables
307
        to opcodes/i386-opc.h.
308
 
309
2007-03-13  H.J. Lu  
310
 
311
        * i386.h (FloatDR): Removed.
312
        (i386_optab): Use FloatD and FloatD|FloatR instead of FloatDR.
313
 
314
2007-03-01  Alan Modra  
315
 
316
        * spu-insns.h: Add soma double-float insns.
317
 
318
2007-02-20  Thiemo Seufer  
319
            Chao-Ying Fu  
320
 
321
        * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
322
        (INSN_DSPR2): Add flag for DSP R2 instructions.
323
        (M_BALIGN): New macro.
324
 
325
2007-02-14  Alan Modra  
326
 
327
        * i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
328
        and Seg3ShortFrom with Shortform.
329
 
330
2007-02-11  H.J. Lu  
331
 
332
        PR gas/4027
333
        * i386.h (i386_optab): Put the real "test" before the pseudo
334
        one.
335
 
336
2007-01-08  Kazu Hirata  
337
 
338
        * m68k.h (m68010up): OR fido_a.
339
 
340
2006-12-25  Kazu Hirata  
341
 
342
        * m68k.h (fido_a): New.
343
 
344
2006-12-24  Kazu Hirata  
345
 
346
        * m68k.h (mcfmac, mcfemac, cfloat, mcfhwdiv, mcfisa_a,
347
        mcfisa_aa, mcfisa_b, mcfusp, mcf_mask): Double the defined
348
        values.
349
 
350
2006-11-08  H.J. Lu  
351
 
352
        * i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
353
 
354
2006-10-31  Mei Ligang  
355
 
356
        * score-inst.h (enum score_insn_type): Add Insn_internal.
357
 
358
2006-10-25  Trevor Smigiel  
359
            Yukishige Shibata  
360
            Nobuhisa Fujinami  
361
            Takeaki Fukuoka  
362
            Alan Modra  
363
 
364
        * spu-insns.h: New file.
365
        * spu.h: New file.
366
 
367
2006-10-24  Andrew Pinski  
368
 
369
        * ppc.h (PPC_OPCODE_CELL): Define.
370
 
371
2006-10-23  Dwarakanath Rajagopal  
372
 
373
        * i386.h :  Modify opcode to support for the change in POPCNT opcode
374
        in amdfam10 architecture.
375
 
376
2006-09-28  H.J. Lu  
377
 
378
        * i386.h: Replace CpuMNI with CpuSSSE3.
379
 
380
2006-09-26  Mark Shinwell  
381
            Joseph Myers  
382
            Ian Lance Taylor  
383
            Ben Elliston  
384
 
385
        * arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
386
 
387
2006-09-17  Mei Ligang  
388
 
389
        * score-datadep.h: New file.
390
        * score-inst.h: New file.
391
 
392
2006-07-14  H.J. Lu  
393
 
394
        * i386.h (i386_optab): Remove InvMem from maskmovq, movhlps,
395
        movlhps, movmskps, pextrw, pmovmskb, movmskpd, maskmovdqu,
396
        movdq2q and movq2dq.
397
 
398
2006-07-10 Dwarakanath Rajagopal        
399
           Michael Meissner             
400
 
401
        * i386.h: Add amdfam10 new instructions (SSE4a and ABM instructions).
402
 
403
2006-06-12  H.J. Lu  
404
 
405
        * i386.h (i386_optab): Add "nop" with memory reference.
406
 
407
2006-06-12  H.J. Lu  
408
 
409
        * i386.h (i386_optab): Update comment for 64bit NOP.
410
 
411
2006-06-06  Ben Elliston  
412
            Anton Blanchard  
413
 
414
        * ppc.h (PPC_OPCODE_POWER6): Define.
415
        Adjust whitespace.
416
 
417
2006-06-05  Thiemo Seufer  
418
 
419
        * mips.h: Improve description of MT flags.
420
 
421
2006-05-25  Richard Sandiford  
422
 
423
        * m68k.h (mcf_mask): Define.
424
 
425
2006-05-05  Thiemo Seufer  
426
            David Ung  
427
 
428
        * mips.h (enum): Add macro M_CACHE_AB.
429
 
430
2006-05-04  Thiemo Seufer  
431
            Nigel Stephens  
432
            David Ung  
433
 
434
        * mips.h: Add INSN_SMARTMIPS define.
435
 
436
2006-04-30  Thiemo Seufer  
437
            David Ung  
438
 
439
        * mips.h: Defines udi bits and masks.  Add description of
440
        characters which may appear in the args field of udi
441
        instructions.
442
 
443
2006-04-26  Thiemo Seufer  
444
 
445
        * mips.h: Improve comments describing the bitfield instruction
446
        fields.
447
 
448
2006-04-26  Julian Brown  
449
 
450
        * arm.h (FPU_VFP_EXT_V3): Define constant.
451
        (FPU_NEON_EXT_V1): Likewise.
452
        (FPU_VFP_HARD): Update.
453
        (FPU_VFP_V3): Define macro.
454
        (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
455
 
456
2006-04-07  Joerg Wunsch  
457
 
458
        * avr.h (AVR_ISA_PWMx): New.
459
 
460
2006-03-28  Nathan Sidwell  
461
 
462
        * m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008, cpu_m68010,
463
        cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060, cpu_m68851,
464
        cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
465
        cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
466
        cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
467
 
468
2006-03-10  Paul Brook  
469
 
470
        * arm.h (ARM_AEXT_V7_ARM): Include v6ZK extensions.
471
 
472
2006-03-04  John David Anglin  
473
 
474
        * hppa.h (pa_opcodes): Reorder bb opcodes so that pa10 opcodes come
475
        first.  Correct mask of bb "B" opcode.
476
 
477
2006-02-27  H.J. Lu 
478
 
479
        * i386.h (i386_optab): Support Intel Merom New Instructions.
480
 
481
2006-02-24  Paul Brook  
482
 
483
        * arm.h: Add V7 feature bits.
484
 
485
2006-02-23  H.J. Lu  
486
 
487
        * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.
488
 
489
2006-01-31  Paul Brook  
490
        Richard Earnshaw 
491
 
492
        * arm.h: Use ARM_CPU_FEATURE.
493
        (ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
494
        (arm_feature_set): Change to a structure.
495
        (ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
496
        ARM_FEATURE): New macros.
497
 
498
2005-12-07  Hans-Peter Nilsson  
499
 
500
        * cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)
501
        (MOVE_PC_INCR_OPCODE_PREFIX, MOVE_PC_INCR_OPCODE_SUFFIX): New macros.
502
        (ADD_PC_INCR_OPCODE): Don't define.
503
 
504
2005-12-06  H.J. Lu  
505
 
506
        PR gas/1874
507
        * i386.h (i386_optab): Add 64bit support for monitor and mwait.
508
 
509
2005-11-14  David Ung  
510
 
511
        * mips.h: Assign 'm'/'M' codes to MIPS16e save/restore
512
        instructions.  Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
513
        save/restore encoding of the args field.
514
 
515
2005-10-28  Dave Brolley  
516
 
517
        Contribute the following changes:
518
        2005-02-16  Dave Brolley  
519
 
520
        * cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
521
        cgen_isa_mask_* to cgen_bitset_*.
522
        * cgen.h: Likewise.
523
 
524
        2003-10-21  Richard Sandiford  
525
 
526
        * cgen.h (CGEN_BITSET_ATTR_VALUE): Fix definition.
527
        (CGEN_ATTR_ENTRY): Change "value" to type "unsigned".
528
        (CGEN_CPU_TABLE): Make isas a ponter.
529
 
530
        2003-09-29  Dave Brolley  
531
 
532
        * cgen.h (CGEN_ATTR_VALUE_BITSET_TYPE): New typedef.
533
        (CGEN_ATTR_VALUE_ENUM_TYPE): Ditto.
534
        (CGEN_ATTR_VALUE_TYPE): Use these new typedefs.
535
 
536
        2002-12-13  Dave Brolley  
537
 
538
        * cgen.h (symcat.h): #include it.
539
        (cgen-bitset.h): #include it.
540
        (CGEN_ATTR_VALUE_TYPE): Now a union.
541
        (CGEN_ATTR_VALUE): Reference macros generated in opcodes/-desc.h.
542
        (CGEN_ATTR_ENTRY): 'value' now unsigned.
543
        (cgen_cpu_desc): 'isas' now (CGEN_ISA_MASK*).
544
        * cgen-bitset.h: New file.
545
 
546
2005-09-30  Catherine Moore  
547
 
548
        * bfin.h: New file.
549
 
550
2005-10-24  Jan Beulich  
551
 
552
        * ia64.h (enum ia64_opnd): Move memory operand out of set of
553
        indirect operands.
554
 
555
2005-10-16  John David Anglin  
556
 
557
        * hppa.h (pa_opcodes): Add two fcmp opcodes.  Reorder ftest opcodes.
558
        Add FLAG_STRICT to pa10 ftest opcode.
559
 
560
2005-10-12  John David Anglin  
561
 
562
        * hppa.h (pa_opcodes): Remove lha entries.
563
 
564
2005-10-08  John David Anglin  
565
 
566
        * hppa.h (FLAG_STRICT): Revise comment.
567
        (pa_opcode): Revise ordering rules.  Add/move strict pa10 variants
568
        before corresponding pa11 opcodes.  Add strict pa10 register-immediate
569
        entries for "fdc".
570
 
571
2005-09-30  Catherine Moore  
572
 
573
        * bfin.h: New file.
574
 
575
2005-09-24  John David Anglin  
576
 
577
        * hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.
578
 
579
2005-09-06  Chao-ying Fu  
580
 
581
        * mips.h (OP_SH_MT_U, OP_MASK_MT_U, OP_SH_MT_H, OP_MASK_MT_H,
582
        OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New
583
        define.
584
        Document !, $, *, &, g, +t, +T operand formats for MT instructions.
585
        (INSN_ASE_MASK): Update to include INSN_MT.
586
        (INSN_MT): New define for MT ASE.
587
 
588
2005-08-25  Chao-ying Fu  
589
 
590
        * mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,
591
        OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7,
592
        OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4,
593
        OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP,
594
        OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define.
595
        Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP
596
        instructions.
597
        (INSN_DSP): New define for DSP ASE.
598
 
599
2005-08-18  Alan Modra  
600
 
601
        * a29k.h: Delete.
602
 
603
2005-08-15  Daniel Jacobowitz  
604
 
605
        * ppc.h (PPC_OPCODE_E300): Define.
606
 
607
2005-08-12 Martin Schwidefsky  
608
 
609
        * s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109.
610
 
611
2005-07-28  John David Anglin  
612
 
613
        PR gas/336
614
        * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
615
        and pitlb.
616
 
617
2005-07-27  Jan Beulich  
618
 
619
        * i386.h (i386_optab): Add comment to movd. Use LongMem for all
620
        movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers.
621
        Add movq-s as 64-bit variants of movd-s.
622
 
623
2005-07-18  John David Anglin  
624
 
625
        * hppa.h: Fix punctuation in comment.
626
 
627
        * hppa.h (pa_opcode):  Add rules for opcode ordering.  Check first for
628
        implicit space-register addressing.  Set space-register bits on opcodes
629
        using implicit space-register addressing.  Add various missing pa20
630
        long-immediate opcodes.  Remove various opcodes using implicit 3-bit
631
        space-register addressing.  Use "fE" instead of "fe" in various
632
        fstw opcodes.
633
 
634
2005-07-18  Jan Beulich  
635
 
636
        * i386.h (i386_optab): Operands of aam and aad are unsigned.
637
 
638
2007-07-15  H.J. Lu 
639
 
640
        * i386.h (i386_optab): Support Intel VMX Instructions.
641
 
642
2005-07-10  John David Anglin  
643
 
644
        * hppa.h (pa_opcode): Don't set FLAG_STRICT in pa10 loads and stores.
645
 
646
2005-07-05  Jan Beulich  
647
 
648
        * i386.h (i386_optab): Add new insns.
649
 
650
2005-07-01  Nick Clifton  
651
 
652
        * sparc.h: Add typedefs to structure declarations.
653
 
654
2005-06-20  H.J. Lu  
655
 
656
        PR 1013
657
        * i386.h (i386_optab): Update comments for 64bit addressing on
658
        mov. Allow 64bit addressing for mov and movq.
659
 
660
2005-06-11  John David Anglin  
661
 
662
        * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,
663
        respectively, in various floating-point load and store patterns.
664
 
665
2005-05-23  John David Anglin  
666
 
667
        * hppa.h (FLAG_STRICT): Correct comment.
668
        (pa_opcodes): Update load and store entries to allow both PA 1.X and
669
        PA 2.0 mneumonics when equivalent.  Entries with cache control
670
        completers now require PA 1.1.  Adjust whitespace.
671
 
672
2005-05-19  Anton Blanchard  
673
 
674
        * ppc.h (PPC_OPCODE_POWER5): Define.
675
 
676
2005-05-10  Nick Clifton  
677
 
678
        * Update the address and phone number of the FSF organization in
679
        the GPL notices in the following files:
680
        a29k.h, alpha.h, arc.h, arm.h, avr.h, cgen.h, convex.h, cris.h,
681
        crx.h, d10v.h, d30v.h, dlx.h, h8300.h, hppa.h, i370.h, i386.h,
682
        i860.h, i960.h, m68hc11.h, m68k.h, m88k.h, maxq.h, mips.h, mmix.h,
683
        mn10200.h, mn10300.h, msp430.h, np1.h, ns32k.h, or32.h, pdp11.h,
684
        pj.h, pn.h, ppc.h, pyr.h, s390.h, sparc.h, tic30.h, tic4x.h,
685
        tic54x.h, tic80.h, v850.h, vax.h
686
 
687
2005-05-09  Jan Beulich  
688
 
689
        * i386.h (i386_optab): Add ht and hnt.
690
 
691
2005-04-18  Mark Kettenis  
692
 
693
        * i386.h: Insert hyphens into selected VIA PadLock extensions.
694
        Add xcrypt-ctr.  Provide aliases without hyphens.
695
 
696
2005-04-13  H.J. Lu  
697
 
698
        Moved from ../ChangeLog
699
 
700
        2005-04-12  Paul Brook  
701
        * m88k.h: Rename psr macros to avoid conflicts.
702
 
703
        2005-03-12  Zack Weinberg  
704
        * arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
705
        Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
706
        and ARM_ARCH_V6ZKT2.
707
 
708
        2004-11-29  Tomer Levi  
709
        * crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
710
        Remove redundant instruction types.
711
        (struct argument): X_op - new field.
712
        (struct cst4_entry): Remove.
713
        (no_op_insn): Declare.
714
 
715
        2004-11-05  Tomer Levi  
716
        * crx.h (enum argtype): Rename types, remove unused types.
717
 
718
        2004-10-27  Tomer Levi  
719
        * crx.h (enum reg): Rearrange registers, remove 'ccfg' and `'pc'.
720
        (enum reg_type): Remove CRX_PC_REGTYPE, CRX_MTPR_REGTYPE.
721
        (enum operand_type): Rearrange operands, edit comments.
722
        replace us with ui for unsigned immediate.
723
        replace d with disps/dispu/dispe for signed/unsigned/escaped
724
        displacements (respectively).
725
        replace rbase_ridx_scl2_dispu with rindex_disps for register index.
726
        (instruction type): Add NO_TYPE_INS.
727
        (instruction flags): Add USER_REG, CST4MAP, NO_SP, NO_RPTR.
728
        (operand_entry): New field - 'flags'.
729
        (operand flags): New.
730
 
731
        2004-10-21  Tomer Levi  
732
        * crx.h (operand_type): Remove redundant types i3, i4,
733
        i5, i8, i12.
734
        Add new unsigned immediate types us3, us4, us5, us16.
735
 
736
2005-04-12  Mark Kettenis  
737
 
738
        * i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
739
        adjust them accordingly.
740
 
741
2005-04-01  Jan Beulich  
742
 
743
        * i386.h (i386_optab): Add rdtscp.
744
 
745
2005-03-29  H.J. Lu  
746
 
747
        * i386.h (i386_optab): Don't allow the `l' suffix for moving
748
        between memory and segment register. Allow movq for moving between
749
        general-purpose register and segment register.
750
 
751
2005-02-09  Jan Beulich  
752
 
753
        PR gas/707
754
        * i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and
755
        FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and
756
        fnstsw.
757
 
758
2006-02-07  Nathan Sidwell  
759
 
760
        * m68k.h (m68008, m68ec030, m68882): Remove.
761
        (m68k_mask): New.
762
        (cpu_m68k, cpu_cf): New.
763
        (mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
764
        mcf5470, mcf5480): Rename to cpu_. Add m680x0 variants.
765
 
766
2005-01-25  Alexandre Oliva  
767
 
768
        2004-11-10  Alexandre Oliva  
769
        * cgen.h (enum cgen_parse_operand_type): Add
770
        CGEN_PARSE_OPERAND_SYMBOLIC.
771
 
772
2005-01-21  Fred Fish  
773
 
774
        * mips.h: Change INSN_ALIAS to INSN2_ALIAS.
775
        Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
776
        Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
777
 
778
2005-01-19  Fred Fish  
779
 
780
        * mips.h (struct mips_opcode): Add new pinfo2 member.
781
        (INSN_ALIAS): New define for opcode table entries that are
782
        specific instances of another entry, such as 'move' for an 'or'
783
        with a zero operand.
784
        (INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
785
        (INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
786
 
787
2004-12-09  Ian Lance Taylor  
788
 
789
        * mips.h (CPU_RM9000): Define.
790
        (OPCODE_IS_MEMBER): Handle CPU_RM9000.
791
 
792
2004-11-25 Jan Beulich  
793
 
794
        * i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
795
        to/from test registers are illegal in 64-bit mode. Add missing
796
        NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
797
        (previously one had to explicitly encode a rex64 prefix). Re-enable
798
        lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
799
        support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
800
 
801
2004-11-23 Jan Beulich  
802
 
803
        * i386.h (i386_optab): paddq and psubq, even in their MMX form, are
804
        available only with SSE2. Change the MMX additions introduced by SSE
805
        and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
806
        instructions by their now designated identifier (since combining i686
807
        and 3DNow! does not really imply 3DNow!A).
808
 
809
2004-11-19  Alan Modra  
810
 
811
        * msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
812
        struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
813
 
814
2004-11-08  Inderpreet Singh   
815
            Vineet Sharma      
816
 
817
        * maxq.h: New file: Disassembly information for the maxq port.
818
 
819
2004-11-05  H.J. Lu  
820
 
821
        * i386.h (i386_optab): Put back "movzb".
822
 
823
2004-11-04  Hans-Peter Nilsson  
824
 
825
        * cris.h (enum cris_insn_version_usage): Tweak formatting and
826
        comments.  Remove member cris_ver_sim.  Add members
827
        cris_ver_sim_v0_10, cris_ver_v0_10, cris_ver_v3_10,
828
        cris_ver_v8_10, cris_ver_v10, cris_ver_v10p.
829
        (struct cris_support_reg, struct cris_cond15): New types.
830
        (cris_conds15): Declare.
831
        (JUMP_PC_INCR_OPCODE_V32, BA_DWORD_OPCODE, NOP_OPCODE_COMMON)
832
        (NOP_OPCODE_ZBITS_COMMON, LAPC_DWORD_OPCODE, LAPC_DWORD_Z_BITS)
833
        (NOP_OPCODE_V32, NOP_Z_BITS_V32): New macros.
834
        (NOP_Z_BITS): Define in terms of NOP_OPCODE.
835
        (cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
836
        SIZE_FIELD_UNSIGNED.
837
 
838
2004-11-04 Jan Beulich  
839
 
840
        * i386.h (sldx_Suf): Remove.
841
        (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
842
        (q_FP): Define, implying no REX64.
843
        (x_FP, sl_FP): Imply FloatMF.
844
        (i386_optab): Split reg and mem forms of moving from segment registers
845
        so that the memory forms can ignore the 16-/32-bit operand size
846
        distinction. Adjust a few others for Intel mode. Remove *FP uses from
847
        all non-floating-point instructions. Unite 32- and 64-bit forms of
848
        movsx, movzx, and movd. Adjust floating point operations for the above
849
        changes to the *FP macros. Add DefaultSize to floating point control
850
        insns operating on larger memory ranges. Remove left over comments
851
        hinting at certain insns being Intel-syntax ones where the ones
852
        actually meant are already gone.
853
 
854
2004-10-07  Tomer Levi  
855
 
856
        * crx.h: Add COPS_REG_INS - Coprocessor Special register
857
        instruction type.
858
 
859
2004-09-30  Paul Brook  
860
 
861
        * arm.h (ARM_EXT_V6K, ARM_EXT_V6Z): Define.
862
        (ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6ZK): Define.
863
 
864
2004-09-11  Theodore A. Roth  
865
 
866
        * avr.h: Add support for
867
        atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
868
 
869
2004-09-09  Segher Boessenkool  
870
 
871
        * ppc.h (PPC_OPERAND_OPTIONAL): Fix comment.
872
 
873
2004-08-24  Dmitry Diky  
874
 
875
        * msp430.h (msp430_opc): Add new instructions.
876
        (msp430_rcodes): Declare new instructions.
877
        (msp430_hcodes): Likewise..
878
 
879
2004-08-13  Nick Clifton  
880
 
881
        PR/301
882
        * h8300.h (O_JSR): Do not allow VECIND addressing for non-SX
883
        processors.
884
 
885
2004-08-30  Michal Ludvig  
886
 
887
        * i386.h (i386_optab): Added montmul/xsha1/xsha256 insns.
888
 
889
2004-07-22  H.J. Lu  
890
 
891
        * i386.h (i386_optab): Allow cs/ds in 64bit for branch hints.
892
 
893
2004-07-21  Jan Beulich  
894
 
895
        * i386.h: Adjust instruction descriptions to better match the
896
        specification.
897
 
898
2004-07-16  Richard Earnshaw  
899
 
900
        * arm.h: Remove all old content.  Replace with architecture defines
901
        from gas/config/tc-arm.c.
902
 
903
2004-07-09  Andreas Schwab  
904
 
905
        * m68k.h: Fix comment.
906
 
907
2004-07-07  Tomer Levi  
908
 
909
        * crx.h: New file.
910
 
911
2004-06-24  Alan Modra  
912
 
913
        * i386.h (i386_optab): Remove fildd, fistpd and fisttpd.
914
 
915
2004-05-24  Peter Barada  
916
 
917
        * m68k.h: Add 'size' to m68k_opcode.
918
 
919
2004-05-05  Peter Barada  
920
 
921
        * m68k.h: Switch from ColdFire chip name to core variant.
922
 
923
2004-04-22  Peter Barada  
924
 
925
        * m68k.h: Add mcfmac/mcfemac definitions.  Update operand
926
        descriptions for new EMAC cases.
927
        Remove ColdFire macmw/macml/msacmw/msacmw hacks and properly
928
        handle Motorola MAC syntax.
929
        Allow disassembly of ColdFire V4e object files.
930
 
931
2004-03-16  Alan Modra  
932
 
933
        * ppc.h (PPC_OPERAND_GPR_0): Define.  Bump other operand defines.
934
 
935
2004-03-12  Jakub Jelinek  
936
 
937
        * i386.h (i386_optab): Remove CpuNo64 from sysenter and sysexit.
938
 
939
2004-03-12  Michal Ludvig  
940
 
941
        * i386.h (i386_optab): Added xstore as an alias for xstorerng.
942
 
943
2004-03-12  Michal Ludvig  
944
 
945
        * i386.h (i386_optab): Added xstore/xcrypt insns.
946
 
947
2004-02-09  Anil Paranjpe  
948
 
949
        * h8300.h (32bit ldc/stc): Add relaxing support.
950
 
951
2004-01-12  Anil Paranjpe  
952
 
953
        * h8300.h (BITOP): Pass MEMRELAX flag.
954
 
955
2004-01-09  Anil Paranjpe  
956
 
957
        * h8300.h (BITOP): Dissallow operations on @aa:16 and @aa:32
958
        except for the H8S.
959
 
960
For older changes see ChangeLog-9103
961
 
962
Local Variables:
963
mode: change-log
964
left-margin: 8
965
fill-column: 74
966
version-control: never
967
End:

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