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jeremybenn |
/* Print GOULD PN (PowerNode) instructions for GDB, the GNU debugger.
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Copyright 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
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This file is part of GDB.
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GDB is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 1, or (at your option)
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any later version.
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GDB is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GDB; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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struct gld_opcode
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{
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char *name;
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unsigned long opcode;
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unsigned long mask;
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char *args;
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int length;
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};
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/* We store four bytes of opcode for all opcodes because that
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is the most any of them need. The actual length of an instruction
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is always at least 2 bytes, and at most four. The length of the
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instruction is based on the opcode.
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The mask component is a mask saying which bits must match
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particular opcode in order for an instruction to be an instance
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of that opcode.
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The args component is a string containing characters
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that are used to format the arguments to the instruction. */
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/* Kinds of operands:
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r Register in first field
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R Register in second field
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b Base register in first field
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B Base register in second field
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v Vector register in first field
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V Vector register in first field
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A Optional address register (base register)
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X Optional index register
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I Immediate data (16bits signed)
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O Offset field (16bits signed)
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h Offset field (15bits signed)
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d Offset field (14bits signed)
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S Shift count field
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any other characters are printed as is...
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*/
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/* The assembler requires that this array be sorted as follows:
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all instances of the same mnemonic must be consecutive.
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All instances of the same mnemonic with the same number of operands
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must be consecutive.
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*/
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struct gld_opcode gld_opcodes[] =
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{
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{ "abm", 0xa0080000, 0xfc080000, "f,xOA,X", 4 },
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{ "abr", 0x18080000, 0xfc0c0000, "r,f", 2 },
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{ "aci", 0xfc770000, 0xfc7f8000, "r,I", 4 },
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{ "adfd", 0xe0080002, 0xfc080002, "r,xOA,X", 4 },
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{ "adfw", 0xe0080000, 0xfc080000, "r,xOA,X", 4 },
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{ "adi", 0xc8010000, 0xfc7f0000, "r,I", 4 },
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{ "admb", 0xb8080000, 0xfc080000, "r,xOA,X", 4 },
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{ "admd", 0xb8000002, 0xfc080002, "r,xOA,X", 4 },
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{ "admh", 0xb8000001, 0xfc080001, "r,xOA,X", 4 },
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{ "admw", 0xb8000000, 0xfc080000, "r,xOA,X", 4 },
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{ "adr", 0x38000000, 0xfc0f0000, "r,R", 2 },
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{ "adrfd", 0x38090000, 0xfc0f0000, "r,R", 2 },
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{ "adrfw", 0x38010000, 0xfc0f0000, "r,R", 2 },
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{ "adrm", 0x38080000, 0xfc0f0000, "r,R", 2 },
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{ "ai", 0xfc030000, 0xfc07ffff, "I", 4 },
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{ "anmb", 0x84080000, 0xfc080000, "r,xOA,X", 4 },
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{ "anmd", 0x84000002, 0xfc080002, "r,xOA,X", 4 },
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{ "anmh", 0x84000001, 0xfc080001, "r,xOA,X", 4 },
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{ "anmw", 0x84000000, 0xfc080000, "r,xOA,X", 4 },
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{ "anr", 0x04000000, 0xfc0f0000, "r,R", 2 },
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{ "armb", 0xe8080000, 0xfc080000, "r,xOA,X", 4 },
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{ "armd", 0xe8000002, 0xfc080002, "r,xOA,X", 4 },
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{ "armh", 0xe8000001, 0xfc080001, "r,xOA,X", 4 },
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{ "armw", 0xe8000000, 0xfc080000, "r,xOA,X", 4 },
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{ "bcf", 0xf0000000, 0xfc080000, "I,xOA,X", 4 },
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{ "bct", 0xec000000, 0xfc080000, "I,xOA,X", 4 },
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{ "bei", 0x00060000, 0xffff0000, "", 2 },
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{ "bft", 0xf0000000, 0xff880000, "xOA,X", 4 },
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{ "bib", 0xf4000000, 0xfc780000, "r,xOA", 4 },
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{ "bid", 0xf4600000, 0xfc780000, "r,xOA", 4 },
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{ "bih", 0xf4200000, 0xfc780000, "r,xOA", 4 },
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{ "biw", 0xf4400000, 0xfc780000, "r,xOA", 4 },
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{ "bl", 0xf8800000, 0xff880000, "xOA,X", 4 },
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{ "bsub", 0x5c080000, 0xff8f0000, "", 2 },
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{ "bsubm", 0x28080000, 0xfc080000, "", 4 },
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{ "bu", 0xec000000, 0xff880000, "xOA,X", 4 },
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{ "call", 0x28080000, 0xfc0f0000, "", 2 },
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{ "callm", 0x5c080000, 0xff880000, "", 4 },
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{ "camb", 0x90080000, 0xfc080000, "r,xOA,X", 4 },
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{ "camd", 0x90000002, 0xfc080002, "r,xOA,X", 4 },
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{ "camh", 0x90000001, 0xfc080001, "r,xOA,X", 4 },
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{ "camw", 0x90000000, 0xfc080000, "r.xOA,X", 4 },
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{ "car", 0x10000000, 0xfc0f0000, "r,R", 2 },
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{ "cd", 0xfc060000, 0xfc070000, "r,f", 4 },
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{ "cea", 0x000f0000, 0xffff0000, "", 2 },
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{ "ci", 0xc8050000, 0xfc7f0000, "r,I", 4 },
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{ "cmc", 0x040a0000, 0xfc7f0000, "r", 2 },
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{ "cmmb", 0x94080000, 0xfc080000, "r,xOA,X", 4 },
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{ "cmmd", 0x94000002, 0xfc080002, "r,xOA,X", 4 },
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{ "cmmh", 0x94000001, 0xfc080001, "r,xOA,X", 4 },
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{ "cmmw", 0x94000000, 0xfc080000, "r,xOA,X", 4 },
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{ "cmr", 0x14000000, 0xfc0f0000, "r,R", 2 },
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{ "daci", 0xfc7f0000, 0xfc7f8000, "r,I", 4 },
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{ "dae", 0x000e0000, 0xffff0000, "", 2 },
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{ "dai", 0xfc040000, 0xfc07ffff, "I", 4 },
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{ "dci", 0xfc6f0000, 0xfc7f8000, "r,I", 4 },
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{ "di", 0xfc010000, 0xfc07ffff, "I", 4 },
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{ "dvfd", 0xe4000002, 0xfc080002, "r,xOA,X", 4 },
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{ "dvfw", 0xe4000000, 0xfc080000, "r,xOA,X", 4 },
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{ "dvi", 0xc8040000, 0xfc7f0000, "r,I", 4 },
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{ "dvmb", 0xc4080000, 0xfc080000, "r,xOA,X", 4 },
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{ "dvmh", 0xc4000001, 0xfc080001, "r,xOA,X", 4 },
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{ "dvmw", 0xc4000000, 0xfc080000, "r,xOA,X", 4 },
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{ "dvr", 0x380a0000, 0xfc0f0000, "r,R", 2 },
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{ "dvrfd", 0x380c0000, 0xfc0f0000, "r,R", 4 },
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{ "dvrfw", 0x38040000, 0xfc0f0000, "r,xOA,X", 4 },
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{ "eae", 0x00080000, 0xffff0000, "", 2 },
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{ "eci", 0xfc670000, 0xfc7f8080, "r,I", 4 },
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{ "ecwcs", 0xfc4f0000, 0xfc7f8000, "", 4 },
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{ "ei", 0xfc000000, 0xfc07ffff, "I", 4 },
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{ "eomb", 0x8c080000, 0xfc080000, "r,xOA,X", 4 },
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{ "eomd", 0x8c000002, 0xfc080002, "r,xOA,X", 4 },
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{ "eomh", 0x8c000001, 0xfc080001, "r,xOA,X", 4 },
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{ "eomw", 0x8c000000, 0xfc080000, "r,xOA,X", 4 },
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{ "eor", 0x0c000000, 0xfc0f0000, "r,R", 2 },
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{ "eorm", 0x0c080000, 0xfc0f0000, "r,R", 2 },
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{ "es", 0x00040000, 0xfc7f0000, "r", 2 },
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{ "exm", 0xa8000000, 0xff880000, "xOA,X", 4 },
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{ "exr", 0xc8070000, 0xfc7f0000, "r", 2 },
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{ "exrr", 0xc8070002, 0xfc7f0002, "r", 2 },
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{ "fixd", 0x380d0000, 0xfc0f0000, "r,R", 2 },
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{ "fixw", 0x38050000, 0xfc0f0000, "r,R", 2 },
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148 |
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{ "fltd", 0x380f0000, 0xfc0f0000, "r,R", 2 },
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149 |
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{ "fltw", 0x38070000, 0xfc0f0000, "r,R", 2 },
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150 |
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{ "grio", 0xfc3f0000, 0xfc7f8000, "r,I", 4 },
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151 |
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{ "halt", 0x00000000, 0xffff0000, "", 2 },
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152 |
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{ "hio", 0xfc370000, 0xfc7f8000, "r,I", 4 },
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153 |
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{ "jwcs", 0xfa080000, 0xff880000, "xOA,X", 4 },
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154 |
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{ "la", 0x50000000, 0xfc000000, "r,xOA,X", 4 },
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{ "labr", 0x58080000, 0xfc080000, "b,xOA,X", 4 },
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156 |
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{ "lb", 0xac080000, 0xfc080000, "r,xOA,X", 4 },
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157 |
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{ "lcs", 0x00030000, 0xfc7f0000, "r", 2 },
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158 |
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{ "ld", 0xac000002, 0xfc080002, "r,xOA,X", 4 },
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159 |
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{ "lear", 0x80000000, 0xfc080000, "r,xOA,X", 4 },
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160 |
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{ "lf", 0xcc000000, 0xfc080000, "r,xOA,X", 4 },
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161 |
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{ "lfbr", 0xcc080000, 0xfc080000, "b,xOA,X", 4 },
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162 |
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{ "lh", 0xac000001, 0xfc080001, "r,xOA,X", 4 },
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163 |
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{ "li", 0xc8000000, 0xfc7f0000, "r,I", 4 },
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164 |
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{ "lmap", 0x2c070000, 0xfc7f0000, "r", 2 },
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165 |
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{ "lmb", 0xb0080000, 0xfc080000, "r,xOA,X", 4 },
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166 |
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{ "lmd", 0xb0000002, 0xfc080002, "r,xOA,X", 4 },
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167 |
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{ "lmh", 0xb0000001, 0xfc080001, "r,xOA,X", 4 },
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168 |
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{ "lmw", 0xb0000000, 0xfc080000, "r,xOA,X", 4 },
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169 |
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{ "lnb", 0xb4080000, 0xfc080000, "r,xOA,X", 4 },
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170 |
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{ "lnd", 0xb4000002, 0xfc080002, "r,xOA,X", 4 },
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171 |
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{ "lnh", 0xb4000001, 0xfc080001, "r,xOA,X", 4 },
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172 |
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{ "lnw", 0xb4000000, 0xfc080000, "r,xOA,X", 4 },
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173 |
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{ "lpsd", 0xf9800000, 0xff880000, "r,xOA,X", 4 },
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174 |
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{ "lpsdcm", 0xfa800000, 0xff880000, "r,xOA,X", 4 },
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175 |
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{ "lw", 0xac000000, 0xfc080000, "r,xOA,X", 4 },
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176 |
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{ "lwbr", 0x5c000000, 0xfc080000, "b,xOA,X", 4 },
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177 |
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{ "mpfd", 0xe4080002, 0xfc080002, "r,xOA,X", 4 },
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178 |
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{ "mpfw", 0xe4080000, 0xfc080000, "r,xOA,X", 4 },
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179 |
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{ "mpi", 0xc8030000, 0xfc7f0000, "r,I", 4 },
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180 |
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{ "mpmb", 0xc0080000, 0xfc080000, "r,xOA,X", 4 },
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181 |
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{ "mpmh", 0xc0000001, 0xfc080001, "r,xOA,X", 4 },
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182 |
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{ "mpmw", 0xc0000000, 0xfc080000, "r,xOA,X", 4 },
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183 |
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{ "mpr", 0x38020000, 0xfc0f0000, "r,R", 2 },
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184 |
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{ "mprfd", 0x380e0000, 0xfc0f0000, "r,R", 2 },
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185 |
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{ "mprfw", 0x38060000, 0xfc0f0000, "r,R", 2 },
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186 |
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{ "nop", 0x00020000, 0xffff0000, "", 2 },
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187 |
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{ "ormb", 0x88080000, 0xfc080000, "r,xOA,X", 4 },
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188 |
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{ "ormd", 0x88000002, 0xfc080002, "r,xOA,X", 4 },
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189 |
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{ "ormh", 0x88000001, 0xfc080001, "r,xOA,X", 4 },
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190 |
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{ "ormw", 0x88000000, 0xfc080000, "r,xOA,X", 4 },
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191 |
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{ "orr", 0x08000000, 0xfc0f0000, "r,R", 2 },
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192 |
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{ "orrm", 0x08080000, 0xfc0f0000, "r,R", 2 },
|
193 |
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{ "rdsts", 0x00090000, 0xfc7f0000, "r", 2 },
|
194 |
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{ "return", 0x280e0000, 0xfc7f0000, "", 2 },
|
195 |
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{ "ri", 0xfc020000, 0xfc07ffff, "I", 4 },
|
196 |
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{ "rnd", 0x00050000, 0xfc7f0000, "r", 2 },
|
197 |
|
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{ "rpswt", 0x040b0000, 0xfc7f0000, "r", 2 },
|
198 |
|
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{ "rschnl", 0xfc2f0000, 0xfc7f8000, "r,I", 4 },
|
199 |
|
|
{ "rsctl", 0xfc470000, 0xfc7f8000, "r,I", 4 },
|
200 |
|
|
{ "rwcs", 0x000b0000, 0xfc0f0000, "r,R", 2 },
|
201 |
|
|
{ "sacz", 0x10080000, 0xfc0f0000, "r,R", 2 },
|
202 |
|
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{ "sbm", 0x98080000, 0xfc080000, "f,xOA,X", 4 },
|
203 |
|
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{ "sbr", 0x18000000, 0xfc0c0000, "r,f", 4 },
|
204 |
|
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{ "sea", 0x000d0000, 0xffff0000, "", 2 },
|
205 |
|
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{ "setcpu", 0x2c090000, 0xfc7f0000, "r", 2 },
|
206 |
|
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{ "sio", 0xfc170000, 0xfc7f8000, "r,I", 4 },
|
207 |
|
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{ "sipu", 0x000a0000, 0xffff0000, "", 2 },
|
208 |
|
|
{ "sla", 0x1c400000, 0xfc600000, "r,S", 2 },
|
209 |
|
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{ "slad", 0x20400000, 0xfc600000, "r,S", 2 },
|
210 |
|
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{ "slc", 0x24400000, 0xfc600000, "r,S", 2 },
|
211 |
|
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{ "sll", 0x1c600000, 0xfc600000, "r,S", 2 },
|
212 |
|
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{ "slld", 0x20600000, 0xfc600000, "r,S", 2 },
|
213 |
|
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{ "smc", 0x04070000, 0xfc070000, "", 2 },
|
214 |
|
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{ "sra", 0x1c000000, 0xfc600000, "r,S", 2 },
|
215 |
|
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{ "srad", 0x20000000, 0xfc600000, "r,S", 2 },
|
216 |
|
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{ "src", 0x24000000, 0xfc600000, "r,S", 2 },
|
217 |
|
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{ "srl", 0x1c200000, 0xfc600000, "r,S", 2 },
|
218 |
|
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{ "srld", 0x20200000, 0xfc600000, "r,S", 2 },
|
219 |
|
|
{ "stb", 0xd4080000, 0xfc080000, "r,xOA,X", 4 },
|
220 |
|
|
{ "std", 0xd4000002, 0xfc080002, "r,xOA,X", 4 },
|
221 |
|
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{ "stf", 0xdc000000, 0xfc080000, "r,xOA,X", 4 },
|
222 |
|
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{ "stfbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 },
|
223 |
|
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{ "sth", 0xd4000001, 0xfc080001, "r,xOA,X", 4 },
|
224 |
|
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{ "stmb", 0xd8080000, 0xfc080000, "r,xOA,X", 4 },
|
225 |
|
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{ "stmd", 0xd8000002, 0xfc080002, "r,xOA,X", 4 },
|
226 |
|
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{ "stmh", 0xd8000001, 0xfc080001, "r,xOA,X", 4 },
|
227 |
|
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{ "stmw", 0xd8000000, 0xfc080000, "r,xOA,X", 4 },
|
228 |
|
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{ "stpio", 0xfc270000, 0xfc7f8000, "r,I", 4 },
|
229 |
|
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{ "stw", 0xd4000000, 0xfc080000, "r,xOA,X", 4 },
|
230 |
|
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{ "stwbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 },
|
231 |
|
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{ "suabr", 0x58000000, 0xfc080000, "b,xOA,X", 4 },
|
232 |
|
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{ "sufd", 0xe0000002, 0xfc080002, "r,xOA,X", 4 },
|
233 |
|
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{ "sufw", 0xe0000000, 0xfc080000, "r,xOA,X", 4 },
|
234 |
|
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{ "sui", 0xc8020000, 0xfc7f0000, "r,I", 4 },
|
235 |
|
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{ "sumb", 0xbc080000, 0xfc080000, "r,xOA,X", 4 },
|
236 |
|
|
{ "sumd", 0xbc000002, 0xfc080002, "r,xOA,X", 4 },
|
237 |
|
|
{ "sumh", 0xbc000001, 0xfc080001, "r,xOA,X", 4 },
|
238 |
|
|
{ "sumw", 0xbc000000, 0xfc080000, "r,xOA,X", 4 },
|
239 |
|
|
{ "sur", 0x3c000000, 0xfc0f0000, "r,R", 2 },
|
240 |
|
|
{ "surfd", 0x380b0000, 0xfc0f0000, "r,xOA,X", 4 },
|
241 |
|
|
{ "surfw", 0x38030000, 0xfc0f0000, "r,R", 2 },
|
242 |
|
|
{ "surm", 0x3c080000, 0xfc0f0000, "r,R", 2 },
|
243 |
|
|
{ "svc", 0xc8060000, 0xffff0000, "", 4 },
|
244 |
|
|
{ "tbm", 0xa4080000, 0xfc080000, "f,xOA,X", 4 },
|
245 |
|
|
{ "tbr", 0x180c0000, 0xfc0c0000, "r,f", 2 },
|
246 |
|
|
{ "tbrr", 0x2c020000, 0xfc0f0000, "r,B", 2 },
|
247 |
|
|
{ "tccr", 0x28040000, 0xfc7f0000, "", 2 },
|
248 |
|
|
{ "td", 0xfc050000, 0xfc070000, "r,f", 4 },
|
249 |
|
|
{ "tio", 0xfc1f0000, 0xfc7f8000, "r,I", 4 },
|
250 |
|
|
{ "tmapr", 0x2c0a0000, 0xfc0f0000, "r,R", 2 },
|
251 |
|
|
{ "tpcbr", 0x280c0000, 0xfc7f0000, "r", 2 },
|
252 |
|
|
{ "trbr", 0x2c010000, 0xfc0f0000, "b,R", 2 },
|
253 |
|
|
{ "trc", 0x2c030000, 0xfc0f0000, "r,R", 2 },
|
254 |
|
|
{ "trcc", 0x28050000, 0xfc7f0000, "", 2 },
|
255 |
|
|
{ "trcm", 0x2c0b0000, 0xfc0f0000, "r,R", 2 },
|
256 |
|
|
{ "trn", 0x2c040000, 0xfc0f0000, "r,R", 2 },
|
257 |
|
|
{ "trnm", 0x2c0c0000, 0xfc0f0000, "r,R", 2 },
|
258 |
|
|
{ "trr", 0x2c000000, 0xfc0f0000, "r,R", 2 },
|
259 |
|
|
{ "trrm", 0x2c080000, 0xfc0f0000, "r,R", 2 },
|
260 |
|
|
{ "trsc", 0x2c0e0000, 0xfc0f0000, "r,R", 2 },
|
261 |
|
|
{ "trsw", 0x28000000, 0xfc7f0000, "r", 2 },
|
262 |
|
|
{ "tscr", 0x2c0f0000, 0xfc0f0000, "r,R", 2 },
|
263 |
|
|
{ "uei", 0x00070000, 0xffff0000, "", 2 },
|
264 |
|
|
{ "wait", 0x00010000, 0xffff0000, "", 2 },
|
265 |
|
|
{ "wcwcs", 0xfc5f0000, 0xfc7f8000, "", 4 },
|
266 |
|
|
{ "wwcs", 0x000c0000, 0xfc0f0000, "r,R", 2 },
|
267 |
|
|
{ "xcbr", 0x28020000, 0xfc0f0000, "b,B", 2 },
|
268 |
|
|
{ "xcr", 0x2c050000, 0xfc0f0000, "r,R", 2 },
|
269 |
|
|
{ "xcrm", 0x2c0d0000, 0xfc0f0000, "r,R", 2 },
|
270 |
|
|
{ "zbm", 0x9c080000, 0xfc080000, "f,xOA,X", 4 },
|
271 |
|
|
{ "zbr", 0x18040000, 0xfc0c0000, "r,f", 2 },
|
272 |
|
|
{ "zmb", 0xf8080000, 0xfc080000, "r,xOA,X", 4 },
|
273 |
|
|
{ "zmd", 0xf8000002, 0xfc080002, "r,xOA,X", 4 },
|
274 |
|
|
{ "zmh", 0xf8000001, 0xfc080001, "r,xOA,X", 4 },
|
275 |
|
|
{ "zmw", 0xf8000000, 0xfc080000, "r,xOA,X", 4 },
|
276 |
|
|
{ "zr", 0x0c000000, 0xfc0f0000, "r", 2 },
|
277 |
|
|
};
|
278 |
|
|
|
279 |
|
|
int numopcodes = sizeof(gld_opcodes) / sizeof(gld_opcodes[0]);
|
280 |
|
|
|
281 |
|
|
struct gld_opcode *endop = gld_opcodes + sizeof(gld_opcodes) /
|
282 |
|
|
sizeof(gld_opcodes[0]);
|