OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [include/] [xtensa-config.h] - Blame information for rev 842

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
/* Xtensa configuration settings.
2
   Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
3
   Free Software Foundation, Inc.
4
   Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 2, or (at your option)
9
   any later version.
10
 
11
   This program is distributed in the hope that it will be useful, but
12
   WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
   General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
19
 
20
#ifndef XTENSA_CONFIG_H
21
#define XTENSA_CONFIG_H
22
 
23
/* The macros defined here match those with the same names in the Xtensa
24
   compile-time HAL (Hardware Abstraction Layer).  Please refer to the
25
   Xtensa System Software Reference Manual for documentation of these
26
   macros.  */
27
 
28
#undef XCHAL_HAVE_BE
29
#define XCHAL_HAVE_BE                   1
30
 
31
#undef XCHAL_HAVE_DENSITY
32
#define XCHAL_HAVE_DENSITY              1
33
 
34
#undef XCHAL_HAVE_CONST16
35
#define XCHAL_HAVE_CONST16              0
36
 
37
#undef XCHAL_HAVE_ABS
38
#define XCHAL_HAVE_ABS                  1
39
 
40
#undef XCHAL_HAVE_ADDX
41
#define XCHAL_HAVE_ADDX                 1
42
 
43
#undef XCHAL_HAVE_L32R
44
#define XCHAL_HAVE_L32R                 1
45
 
46
#undef XSHAL_USE_ABSOLUTE_LITERALS
47
#define XSHAL_USE_ABSOLUTE_LITERALS     0
48
 
49
#undef XCHAL_HAVE_MAC16
50
#define XCHAL_HAVE_MAC16                0
51
 
52
#undef XCHAL_HAVE_MUL16
53
#define XCHAL_HAVE_MUL16                1
54
 
55
#undef XCHAL_HAVE_MUL32
56
#define XCHAL_HAVE_MUL32                1
57
 
58
#undef XCHAL_HAVE_MUL32_HIGH
59
#define XCHAL_HAVE_MUL32_HIGH           0
60
 
61
#undef XCHAL_HAVE_DIV32
62
#define XCHAL_HAVE_DIV32                1
63
 
64
#undef XCHAL_HAVE_NSA
65
#define XCHAL_HAVE_NSA                  1
66
 
67
#undef XCHAL_HAVE_MINMAX
68
#define XCHAL_HAVE_MINMAX               1
69
 
70
#undef XCHAL_HAVE_SEXT
71
#define XCHAL_HAVE_SEXT                 1
72
 
73
#undef XCHAL_HAVE_LOOPS
74
#define XCHAL_HAVE_LOOPS                1
75
 
76
#undef XCHAL_HAVE_THREADPTR
77
#define XCHAL_HAVE_THREADPTR            1
78
 
79
#undef XCHAL_HAVE_RELEASE_SYNC
80
#define XCHAL_HAVE_RELEASE_SYNC         1
81
 
82
#undef XCHAL_HAVE_S32C1I
83
#define XCHAL_HAVE_S32C1I               1
84
 
85
#undef XCHAL_HAVE_BOOLEANS
86
#define XCHAL_HAVE_BOOLEANS             0
87
 
88
#undef XCHAL_HAVE_FP
89
#define XCHAL_HAVE_FP                   0
90
 
91
#undef XCHAL_HAVE_FP_DIV
92
#define XCHAL_HAVE_FP_DIV               0
93
 
94
#undef XCHAL_HAVE_FP_RECIP
95
#define XCHAL_HAVE_FP_RECIP             0
96
 
97
#undef XCHAL_HAVE_FP_SQRT
98
#define XCHAL_HAVE_FP_SQRT              0
99
 
100
#undef XCHAL_HAVE_FP_RSQRT
101
#define XCHAL_HAVE_FP_RSQRT             0
102
 
103
#undef XCHAL_HAVE_WINDOWED
104
#define XCHAL_HAVE_WINDOWED             1
105
 
106
#undef XCHAL_NUM_AREGS
107
#define XCHAL_NUM_AREGS                 32
108
 
109
#undef XCHAL_HAVE_WIDE_BRANCHES
110
#define XCHAL_HAVE_WIDE_BRANCHES        0
111
 
112
#undef XCHAL_HAVE_PREDICTED_BRANCHES
113
#define XCHAL_HAVE_PREDICTED_BRANCHES   0
114
 
115
 
116
#undef XCHAL_ICACHE_SIZE
117
#define XCHAL_ICACHE_SIZE               16384
118
 
119
#undef XCHAL_DCACHE_SIZE
120
#define XCHAL_DCACHE_SIZE               16384
121
 
122
#undef XCHAL_ICACHE_LINESIZE
123
#define XCHAL_ICACHE_LINESIZE           32
124
 
125
#undef XCHAL_DCACHE_LINESIZE
126
#define XCHAL_DCACHE_LINESIZE           32
127
 
128
#undef XCHAL_ICACHE_LINEWIDTH
129
#define XCHAL_ICACHE_LINEWIDTH          5
130
 
131
#undef XCHAL_DCACHE_LINEWIDTH
132
#define XCHAL_DCACHE_LINEWIDTH          5
133
 
134
#undef XCHAL_DCACHE_IS_WRITEBACK
135
#define XCHAL_DCACHE_IS_WRITEBACK       1
136
 
137
 
138
#undef XCHAL_HAVE_MMU
139
#define XCHAL_HAVE_MMU                  1
140
 
141
#undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
142
#define XCHAL_MMU_MIN_PTE_PAGE_SIZE     12
143
 
144
 
145
#undef XCHAL_HAVE_DEBUG
146
#define XCHAL_HAVE_DEBUG                1
147
 
148
#undef XCHAL_NUM_IBREAK
149
#define XCHAL_NUM_IBREAK                2
150
 
151
#undef XCHAL_NUM_DBREAK
152
#define XCHAL_NUM_DBREAK                2
153
 
154
#undef XCHAL_DEBUGLEVEL
155
#define XCHAL_DEBUGLEVEL                6
156
 
157
 
158
#undef XCHAL_MAX_INSTRUCTION_SIZE
159
#define XCHAL_MAX_INSTRUCTION_SIZE      3
160
 
161
#undef XCHAL_INST_FETCH_WIDTH
162
#define XCHAL_INST_FETCH_WIDTH          4
163
 
164
 
165
#undef XSHAL_ABI
166
#undef XTHAL_ABI_WINDOWED
167
#undef XTHAL_ABI_CALL0
168
#define XSHAL_ABI                       XTHAL_ABI_WINDOWED
169
#define XTHAL_ABI_WINDOWED              0
170
#define XTHAL_ABI_CALL0                 1
171
 
172
#endif /* !XTENSA_CONFIG_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.