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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [frv/] [cpu.c] - Blame information for rev 828

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Line No. Rev Author Line
1 227 jeremybenn
/* Misc. support for CPU family frvbf.
2
 
3
THIS FILE IS MACHINE GENERATED WITH CGEN.
4
 
5
Copyright 1996-2010 Free Software Foundation, Inc.
6
 
7
This file is part of the GNU simulators.
8
 
9
   This file is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
 
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License along
20
   with this program; if not, write to the Free Software Foundation, Inc.,
21
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22
 
23
*/
24
 
25
#define WANT_CPU frvbf
26
#define WANT_CPU_FRVBF
27
 
28
#include "sim-main.h"
29
#include "cgen-ops.h"
30
 
31
/* Get the value of h-reloc-ann.  */
32
 
33
BI
34
frvbf_h_reloc_ann_get (SIM_CPU *current_cpu)
35
{
36
  return CPU (h_reloc_ann);
37
}
38
 
39
/* Set a value for h-reloc-ann.  */
40
 
41
void
42
frvbf_h_reloc_ann_set (SIM_CPU *current_cpu, BI newval)
43
{
44
  CPU (h_reloc_ann) = newval;
45
}
46
 
47
/* Get the value of h-pc.  */
48
 
49
USI
50
frvbf_h_pc_get (SIM_CPU *current_cpu)
51
{
52
  return CPU (h_pc);
53
}
54
 
55
/* Set a value for h-pc.  */
56
 
57
void
58
frvbf_h_pc_set (SIM_CPU *current_cpu, USI newval)
59
{
60
  CPU (h_pc) = newval;
61
}
62
 
63
/* Get the value of h-psr_imple.  */
64
 
65
UQI
66
frvbf_h_psr_imple_get (SIM_CPU *current_cpu)
67
{
68
  return CPU (h_psr_imple);
69
}
70
 
71
/* Set a value for h-psr_imple.  */
72
 
73
void
74
frvbf_h_psr_imple_set (SIM_CPU *current_cpu, UQI newval)
75
{
76
  CPU (h_psr_imple) = newval;
77
}
78
 
79
/* Get the value of h-psr_ver.  */
80
 
81
UQI
82
frvbf_h_psr_ver_get (SIM_CPU *current_cpu)
83
{
84
  return CPU (h_psr_ver);
85
}
86
 
87
/* Set a value for h-psr_ver.  */
88
 
89
void
90
frvbf_h_psr_ver_set (SIM_CPU *current_cpu, UQI newval)
91
{
92
  CPU (h_psr_ver) = newval;
93
}
94
 
95
/* Get the value of h-psr_ice.  */
96
 
97
BI
98
frvbf_h_psr_ice_get (SIM_CPU *current_cpu)
99
{
100
  return CPU (h_psr_ice);
101
}
102
 
103
/* Set a value for h-psr_ice.  */
104
 
105
void
106
frvbf_h_psr_ice_set (SIM_CPU *current_cpu, BI newval)
107
{
108
  CPU (h_psr_ice) = newval;
109
}
110
 
111
/* Get the value of h-psr_nem.  */
112
 
113
BI
114
frvbf_h_psr_nem_get (SIM_CPU *current_cpu)
115
{
116
  return CPU (h_psr_nem);
117
}
118
 
119
/* Set a value for h-psr_nem.  */
120
 
121
void
122
frvbf_h_psr_nem_set (SIM_CPU *current_cpu, BI newval)
123
{
124
  CPU (h_psr_nem) = newval;
125
}
126
 
127
/* Get the value of h-psr_cm.  */
128
 
129
BI
130
frvbf_h_psr_cm_get (SIM_CPU *current_cpu)
131
{
132
  return CPU (h_psr_cm);
133
}
134
 
135
/* Set a value for h-psr_cm.  */
136
 
137
void
138
frvbf_h_psr_cm_set (SIM_CPU *current_cpu, BI newval)
139
{
140
  CPU (h_psr_cm) = newval;
141
}
142
 
143
/* Get the value of h-psr_be.  */
144
 
145
BI
146
frvbf_h_psr_be_get (SIM_CPU *current_cpu)
147
{
148
  return CPU (h_psr_be);
149
}
150
 
151
/* Set a value for h-psr_be.  */
152
 
153
void
154
frvbf_h_psr_be_set (SIM_CPU *current_cpu, BI newval)
155
{
156
  CPU (h_psr_be) = newval;
157
}
158
 
159
/* Get the value of h-psr_esr.  */
160
 
161
BI
162
frvbf_h_psr_esr_get (SIM_CPU *current_cpu)
163
{
164
  return CPU (h_psr_esr);
165
}
166
 
167
/* Set a value for h-psr_esr.  */
168
 
169
void
170
frvbf_h_psr_esr_set (SIM_CPU *current_cpu, BI newval)
171
{
172
  CPU (h_psr_esr) = newval;
173
}
174
 
175
/* Get the value of h-psr_ef.  */
176
 
177
BI
178
frvbf_h_psr_ef_get (SIM_CPU *current_cpu)
179
{
180
  return CPU (h_psr_ef);
181
}
182
 
183
/* Set a value for h-psr_ef.  */
184
 
185
void
186
frvbf_h_psr_ef_set (SIM_CPU *current_cpu, BI newval)
187
{
188
  CPU (h_psr_ef) = newval;
189
}
190
 
191
/* Get the value of h-psr_em.  */
192
 
193
BI
194
frvbf_h_psr_em_get (SIM_CPU *current_cpu)
195
{
196
  return CPU (h_psr_em);
197
}
198
 
199
/* Set a value for h-psr_em.  */
200
 
201
void
202
frvbf_h_psr_em_set (SIM_CPU *current_cpu, BI newval)
203
{
204
  CPU (h_psr_em) = newval;
205
}
206
 
207
/* Get the value of h-psr_pil.  */
208
 
209
UQI
210
frvbf_h_psr_pil_get (SIM_CPU *current_cpu)
211
{
212
  return CPU (h_psr_pil);
213
}
214
 
215
/* Set a value for h-psr_pil.  */
216
 
217
void
218
frvbf_h_psr_pil_set (SIM_CPU *current_cpu, UQI newval)
219
{
220
  CPU (h_psr_pil) = newval;
221
}
222
 
223
/* Get the value of h-psr_ps.  */
224
 
225
BI
226
frvbf_h_psr_ps_get (SIM_CPU *current_cpu)
227
{
228
  return CPU (h_psr_ps);
229
}
230
 
231
/* Set a value for h-psr_ps.  */
232
 
233
void
234
frvbf_h_psr_ps_set (SIM_CPU *current_cpu, BI newval)
235
{
236
  CPU (h_psr_ps) = newval;
237
}
238
 
239
/* Get the value of h-psr_et.  */
240
 
241
BI
242
frvbf_h_psr_et_get (SIM_CPU *current_cpu)
243
{
244
  return CPU (h_psr_et);
245
}
246
 
247
/* Set a value for h-psr_et.  */
248
 
249
void
250
frvbf_h_psr_et_set (SIM_CPU *current_cpu, BI newval)
251
{
252
  CPU (h_psr_et) = newval;
253
}
254
 
255
/* Get the value of h-psr_s.  */
256
 
257
BI
258
frvbf_h_psr_s_get (SIM_CPU *current_cpu)
259
{
260
  return CPU (h_psr_s);
261
}
262
 
263
/* Set a value for h-psr_s.  */
264
 
265
void
266
frvbf_h_psr_s_set (SIM_CPU *current_cpu, BI newval)
267
{
268
  SET_H_PSR_S (newval);
269
}
270
 
271
/* Get the value of h-tbr_tba.  */
272
 
273
USI
274
frvbf_h_tbr_tba_get (SIM_CPU *current_cpu)
275
{
276
  return CPU (h_tbr_tba);
277
}
278
 
279
/* Set a value for h-tbr_tba.  */
280
 
281
void
282
frvbf_h_tbr_tba_set (SIM_CPU *current_cpu, USI newval)
283
{
284
  CPU (h_tbr_tba) = newval;
285
}
286
 
287
/* Get the value of h-tbr_tt.  */
288
 
289
UQI
290
frvbf_h_tbr_tt_get (SIM_CPU *current_cpu)
291
{
292
  return CPU (h_tbr_tt);
293
}
294
 
295
/* Set a value for h-tbr_tt.  */
296
 
297
void
298
frvbf_h_tbr_tt_set (SIM_CPU *current_cpu, UQI newval)
299
{
300
  CPU (h_tbr_tt) = newval;
301
}
302
 
303
/* Get the value of h-bpsr_bs.  */
304
 
305
BI
306
frvbf_h_bpsr_bs_get (SIM_CPU *current_cpu)
307
{
308
  return CPU (h_bpsr_bs);
309
}
310
 
311
/* Set a value for h-bpsr_bs.  */
312
 
313
void
314
frvbf_h_bpsr_bs_set (SIM_CPU *current_cpu, BI newval)
315
{
316
  CPU (h_bpsr_bs) = newval;
317
}
318
 
319
/* Get the value of h-bpsr_bet.  */
320
 
321
BI
322
frvbf_h_bpsr_bet_get (SIM_CPU *current_cpu)
323
{
324
  return CPU (h_bpsr_bet);
325
}
326
 
327
/* Set a value for h-bpsr_bet.  */
328
 
329
void
330
frvbf_h_bpsr_bet_set (SIM_CPU *current_cpu, BI newval)
331
{
332
  CPU (h_bpsr_bet) = newval;
333
}
334
 
335
/* Get the value of h-gr.  */
336
 
337
USI
338
frvbf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
339
{
340
  return GET_H_GR (regno);
341
}
342
 
343
/* Set a value for h-gr.  */
344
 
345
void
346
frvbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
347
{
348
  SET_H_GR (regno, newval);
349
}
350
 
351
/* Get the value of h-gr_double.  */
352
 
353
DI
354
frvbf_h_gr_double_get (SIM_CPU *current_cpu, UINT regno)
355
{
356
  return GET_H_GR_DOUBLE (regno);
357
}
358
 
359
/* Set a value for h-gr_double.  */
360
 
361
void
362
frvbf_h_gr_double_set (SIM_CPU *current_cpu, UINT regno, DI newval)
363
{
364
  SET_H_GR_DOUBLE (regno, newval);
365
}
366
 
367
/* Get the value of h-gr_hi.  */
368
 
369
UHI
370
frvbf_h_gr_hi_get (SIM_CPU *current_cpu, UINT regno)
371
{
372
  return GET_H_GR_HI (regno);
373
}
374
 
375
/* Set a value for h-gr_hi.  */
376
 
377
void
378
frvbf_h_gr_hi_set (SIM_CPU *current_cpu, UINT regno, UHI newval)
379
{
380
  SET_H_GR_HI (regno, newval);
381
}
382
 
383
/* Get the value of h-gr_lo.  */
384
 
385
UHI
386
frvbf_h_gr_lo_get (SIM_CPU *current_cpu, UINT regno)
387
{
388
  return GET_H_GR_LO (regno);
389
}
390
 
391
/* Set a value for h-gr_lo.  */
392
 
393
void
394
frvbf_h_gr_lo_set (SIM_CPU *current_cpu, UINT regno, UHI newval)
395
{
396
  SET_H_GR_LO (regno, newval);
397
}
398
 
399
/* Get the value of h-fr.  */
400
 
401
SF
402
frvbf_h_fr_get (SIM_CPU *current_cpu, UINT regno)
403
{
404
  return GET_H_FR (regno);
405
}
406
 
407
/* Set a value for h-fr.  */
408
 
409
void
410
frvbf_h_fr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
411
{
412
  SET_H_FR (regno, newval);
413
}
414
 
415
/* Get the value of h-fr_double.  */
416
 
417
DF
418
frvbf_h_fr_double_get (SIM_CPU *current_cpu, UINT regno)
419
{
420
  return GET_H_FR_DOUBLE (regno);
421
}
422
 
423
/* Set a value for h-fr_double.  */
424
 
425
void
426
frvbf_h_fr_double_set (SIM_CPU *current_cpu, UINT regno, DF newval)
427
{
428
  SET_H_FR_DOUBLE (regno, newval);
429
}
430
 
431
/* Get the value of h-fr_int.  */
432
 
433
USI
434
frvbf_h_fr_int_get (SIM_CPU *current_cpu, UINT regno)
435
{
436
  return GET_H_FR_INT (regno);
437
}
438
 
439
/* Set a value for h-fr_int.  */
440
 
441
void
442
frvbf_h_fr_int_set (SIM_CPU *current_cpu, UINT regno, USI newval)
443
{
444
  SET_H_FR_INT (regno, newval);
445
}
446
 
447
/* Get the value of h-fr_hi.  */
448
 
449
UHI
450
frvbf_h_fr_hi_get (SIM_CPU *current_cpu, UINT regno)
451
{
452
  return GET_H_FR_HI (regno);
453
}
454
 
455
/* Set a value for h-fr_hi.  */
456
 
457
void
458
frvbf_h_fr_hi_set (SIM_CPU *current_cpu, UINT regno, UHI newval)
459
{
460
  SET_H_FR_HI (regno, newval);
461
}
462
 
463
/* Get the value of h-fr_lo.  */
464
 
465
UHI
466
frvbf_h_fr_lo_get (SIM_CPU *current_cpu, UINT regno)
467
{
468
  return GET_H_FR_LO (regno);
469
}
470
 
471
/* Set a value for h-fr_lo.  */
472
 
473
void
474
frvbf_h_fr_lo_set (SIM_CPU *current_cpu, UINT regno, UHI newval)
475
{
476
  SET_H_FR_LO (regno, newval);
477
}
478
 
479
/* Get the value of h-fr_0.  */
480
 
481
UHI
482
frvbf_h_fr_0_get (SIM_CPU *current_cpu, UINT regno)
483
{
484
  return GET_H_FR_0 (regno);
485
}
486
 
487
/* Set a value for h-fr_0.  */
488
 
489
void
490
frvbf_h_fr_0_set (SIM_CPU *current_cpu, UINT regno, UHI newval)
491
{
492
  SET_H_FR_0 (regno, newval);
493
}
494
 
495
/* Get the value of h-fr_1.  */
496
 
497
UHI
498
frvbf_h_fr_1_get (SIM_CPU *current_cpu, UINT regno)
499
{
500
  return GET_H_FR_1 (regno);
501
}
502
 
503
/* Set a value for h-fr_1.  */
504
 
505
void
506
frvbf_h_fr_1_set (SIM_CPU *current_cpu, UINT regno, UHI newval)
507
{
508
  SET_H_FR_1 (regno, newval);
509
}
510
 
511
/* Get the value of h-fr_2.  */
512
 
513
UHI
514
frvbf_h_fr_2_get (SIM_CPU *current_cpu, UINT regno)
515
{
516
  return GET_H_FR_2 (regno);
517
}
518
 
519
/* Set a value for h-fr_2.  */
520
 
521
void
522
frvbf_h_fr_2_set (SIM_CPU *current_cpu, UINT regno, UHI newval)
523
{
524
  SET_H_FR_2 (regno, newval);
525
}
526
 
527
/* Get the value of h-fr_3.  */
528
 
529
UHI
530
frvbf_h_fr_3_get (SIM_CPU *current_cpu, UINT regno)
531
{
532
  return GET_H_FR_3 (regno);
533
}
534
 
535
/* Set a value for h-fr_3.  */
536
 
537
void
538
frvbf_h_fr_3_set (SIM_CPU *current_cpu, UINT regno, UHI newval)
539
{
540
  SET_H_FR_3 (regno, newval);
541
}
542
 
543
/* Get the value of h-cpr.  */
544
 
545
SI
546
frvbf_h_cpr_get (SIM_CPU *current_cpu, UINT regno)
547
{
548
  return CPU (h_cpr[regno]);
549
}
550
 
551
/* Set a value for h-cpr.  */
552
 
553
void
554
frvbf_h_cpr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
555
{
556
  CPU (h_cpr[regno]) = newval;
557
}
558
 
559
/* Get the value of h-cpr_double.  */
560
 
561
DI
562
frvbf_h_cpr_double_get (SIM_CPU *current_cpu, UINT regno)
563
{
564
  return GET_H_CPR_DOUBLE (regno);
565
}
566
 
567
/* Set a value for h-cpr_double.  */
568
 
569
void
570
frvbf_h_cpr_double_set (SIM_CPU *current_cpu, UINT regno, DI newval)
571
{
572
  SET_H_CPR_DOUBLE (regno, newval);
573
}
574
 
575
/* Get the value of h-spr.  */
576
 
577
USI
578
frvbf_h_spr_get (SIM_CPU *current_cpu, UINT regno)
579
{
580
  return GET_H_SPR (regno);
581
}
582
 
583
/* Set a value for h-spr.  */
584
 
585
void
586
frvbf_h_spr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
587
{
588
  SET_H_SPR (regno, newval);
589
}
590
 
591
/* Get the value of h-accg.  */
592
 
593
USI
594
frvbf_h_accg_get (SIM_CPU *current_cpu, UINT regno)
595
{
596
  return GET_H_ACCG (regno);
597
}
598
 
599
/* Set a value for h-accg.  */
600
 
601
void
602
frvbf_h_accg_set (SIM_CPU *current_cpu, UINT regno, USI newval)
603
{
604
  SET_H_ACCG (regno, newval);
605
}
606
 
607
/* Get the value of h-acc40S.  */
608
 
609
DI
610
frvbf_h_acc40S_get (SIM_CPU *current_cpu, UINT regno)
611
{
612
  return GET_H_ACC40S (regno);
613
}
614
 
615
/* Set a value for h-acc40S.  */
616
 
617
void
618
frvbf_h_acc40S_set (SIM_CPU *current_cpu, UINT regno, DI newval)
619
{
620
  SET_H_ACC40S (regno, newval);
621
}
622
 
623
/* Get the value of h-acc40U.  */
624
 
625
UDI
626
frvbf_h_acc40U_get (SIM_CPU *current_cpu, UINT regno)
627
{
628
  return GET_H_ACC40U (regno);
629
}
630
 
631
/* Set a value for h-acc40U.  */
632
 
633
void
634
frvbf_h_acc40U_set (SIM_CPU *current_cpu, UINT regno, UDI newval)
635
{
636
  SET_H_ACC40U (regno, newval);
637
}
638
 
639
/* Get the value of h-iacc0.  */
640
 
641
DI
642
frvbf_h_iacc0_get (SIM_CPU *current_cpu, UINT regno)
643
{
644
  return GET_H_IACC0 (regno);
645
}
646
 
647
/* Set a value for h-iacc0.  */
648
 
649
void
650
frvbf_h_iacc0_set (SIM_CPU *current_cpu, UINT regno, DI newval)
651
{
652
  SET_H_IACC0 (regno, newval);
653
}
654
 
655
/* Get the value of h-iccr.  */
656
 
657
UQI
658
frvbf_h_iccr_get (SIM_CPU *current_cpu, UINT regno)
659
{
660
  return CPU (h_iccr[regno]);
661
}
662
 
663
/* Set a value for h-iccr.  */
664
 
665
void
666
frvbf_h_iccr_set (SIM_CPU *current_cpu, UINT regno, UQI newval)
667
{
668
  CPU (h_iccr[regno]) = newval;
669
}
670
 
671
/* Get the value of h-fccr.  */
672
 
673
UQI
674
frvbf_h_fccr_get (SIM_CPU *current_cpu, UINT regno)
675
{
676
  return CPU (h_fccr[regno]);
677
}
678
 
679
/* Set a value for h-fccr.  */
680
 
681
void
682
frvbf_h_fccr_set (SIM_CPU *current_cpu, UINT regno, UQI newval)
683
{
684
  CPU (h_fccr[regno]) = newval;
685
}
686
 
687
/* Get the value of h-cccr.  */
688
 
689
UQI
690
frvbf_h_cccr_get (SIM_CPU *current_cpu, UINT regno)
691
{
692
  return CPU (h_cccr[regno]);
693
}
694
 
695
/* Set a value for h-cccr.  */
696
 
697
void
698
frvbf_h_cccr_set (SIM_CPU *current_cpu, UINT regno, UQI newval)
699
{
700
  CPU (h_cccr[regno]) = newval;
701
}
702
 
703
/* Record trace results for INSN.  */
704
 
705
void
706
frvbf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
707
                            int *indices, TRACE_RECORD *tr)
708
{
709
}

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