OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [iq2000/] [ChangeLog] - Blame information for rev 853

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
2010-02-11  Doug Evans  
2
 
3
        * cpu.h, * decode.c, * model.c, * sem-switch.c, * sem.c: Regenerate.
4
 
5
2010-01-09  Ralf Wildenhues  
6
 
7
        * configure: Regenerate.
8
 
9
2010-01-02  Doug Evans  
10
 
11
        * arch.c, * arch.h, * cpu.c, * cpu.h, * cpuall.h, * decode.c,
12
        * decode.h, * model.c, * sem-switch.c, * sem.c: Regenerate, update
13
        copyright year.
14
 
15
2010-01-01  Doug Evans  
16
 
17
        * mloop.in: Fix copyright year update snafu.
18
 
19
2009-11-22  Doug Evans  
20
 
21
        * cpu.h: Regenerate.
22
        * cpuall.h: Regenerate.
23
        * decode.c: Regenerate.
24
        * decode.h: Regenerate.
25
 
26
2009-11-03  Doug Evans  
27
 
28
        * arch.c: Regenerate.
29
        * arch.h: Regenerate.
30
        * cpu.c: Regenerate.
31
        * cpu.h: Regenerate.
32
        * cpuall.h: Regenerate.
33
        * decode.c: Regenerate.
34
        * decode.h: Regenerate.
35
        * model.c: Regenerate.
36
        * sem-switch.c: Regenerate.
37
        * sem.c: Regenerate.
38
 
39
2009-08-22  Ralf Wildenhues  
40
 
41
        * config.in: Regenerate.
42
        * configure: Likewise.
43
 
44
        * configure: Regenerate.
45
 
46
2009-07-12  Doug Evans  
47
 
48
        * Makefile.in (stamp-arch): Use $(CPU_DIR) instead of $(CGEN_CPU_DIR).
49
        (stamp-cpu): Ditto.
50
 
51
2009-07-07  Doug Evans  
52
 
53
        * Makefile.in (stamp-arch): Pass archfile to cgen-arch.
54
        (stamp-cpu): Pass archfile to cgen-cpu-decode.
55
 
56
2008-07-11  Hans-Peter Nilsson  
57
 
58
        * configure: Regenerate to track ../common/common.m4 changes.
59
        * config.in: Ditto.
60
 
61
2008-06-06  Vladimir Prus  
62
            Daniel Jacobowitz  
63
            Joseph Myers  
64
 
65
        * configure: Regenerate.
66
 
67
2006-12-21  Hans-Peter Nilsson  
68
 
69
        * acconfig.h: Remove.
70
        * config.in: Regenerate.
71
 
72
2006-06-13  Richard Earnshaw  
73
 
74
        * configure: Regenerated.
75
 
76
2006-06-05  Daniel Jacobowitz  
77
 
78
        * configure: Regenerated.
79
 
80
2006-05-31  Daniel Jacobowitz  
81
 
82
        * configure: Regenerated.
83
 
84
2005-03-23  Mark Kettenis  
85
 
86
        * configure: Regenerate.
87
 
88
2005-02-21  Corinna Vinschen  
89
 
90
        * iq2000.c: Eliminate need to include gdb/sim-iq2000.h.
91
 
92
2005-02-18  Corinna Vinschen  
93
 
94
        * configure.ac: Rename from configure.in and pull up to autoconf 2.59.
95
        * configure: Regenerate.
96
 
97
2002-03-18  Jeff Johnston  
98
 
99
        * sem-switch.c: Regenerated.
100
        * sem.c: Ditto.
101
 
102
2002-01-28  Jeff Johnston  
103
 
104
        * arch.c: Regenerated.
105
        * arch.h: Ditto.
106
        * cpu.c: Ditto.
107
        * cpu.h: Ditto.
108
        * cpuall.h: Ditto.
109
        * decode.c: Ditto.
110
        * decode.h: Ditto.
111
        * model.c: Ditto.
112
        * sem-switch.c: Ditto.
113
        * sem.c: Ditto.
114
 
115
2001-11-16  Jeff Johnston  
116
 
117
        * decode.c: Regenerated after putting orui into machine-specific
118
        files.
119
        * decode.h: Ditto.
120
        * model.c: Ditto.
121
        * sem-switch.c: Ditto.
122
        * sem.c: Ditto.
123
 
124
2001-11-13  Jeff Johnston  
125
 
126
        * cpu.h: Regenerated after changing jump and branch operands
127
        so that no bit masking is performed.
128
        * decode.c: Ditto.
129
        * iq2000.c (get_h_pc): Change to return h_pc directly.
130
        (set_h_pc): Change to always set the insn mask bit.
131
        * sim-if.c (iq2000bf_disassemble_insn): Change to pass the
132
        pc untouched.
133
        (sim_create_inferior): Changed so starting address is taken
134
        directly from link.  If not specified, start address is
135
 
136
 
137
2001-11-08  Jeff Johnston  
138
 
139
        * cpu.h: Regenerated after making jump operand UINT.
140
        * decode.c: Ditto.
141
 
142
2001-10-31  Jeff Johnston  
143
 
144
        * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw,
145
        sb, sh, and sw insns handling of offset operand.
146
        * sem.c: Ditto.
147
 
148
2001-10-30  Jeff Johnston  
149
 
150
        * cpu.c: Regenerated.
151
        * cpu.h: Ditto.
152
        * decode.c: Ditto.
153
        * sem-switch.c: Ditto.
154
        * sem.c: Ditto.
155
        * iq2000.c (get_h_pc): New routine.
156
        (set_h_pc): Ditto.
157
        (fetch_str): Translate cpu data addresses to data area.
158
        (do_syscall): Ditto.
159
        (iq2000bf_fetch_register): Use get_h_pc.
160
        (iq2000bf_store_register): Use set_h_pc.
161
        * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN
162
        on the pc value passed first.
163
        * sim-if.c (iq2000bf_disassemble_insn): New function.
164
        (sim_open): Add extra memory region for insn memory vs data memory.
165
        Also change disassembler to be iq2000bf_disassemble_insn.
166
        (sim_create_inferior): Translate start address using INSN2CPU macro.
167
        * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros
168
        to translate between Harvard and cpu addresses.
169
 
170
2001-10-26  Jeff Johnston  
171
 
172
        * sem-switch.c: Regenerated after reverting addiu
173
        change.
174
        * sem.c: Ditto.
175
 
176
2001-10-25  Jeff Johnston  
177
 
178
        * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until
179
        iq10 simulator merged here.
180
        * cpu.h: Regenerated after fixing addiu insn.
181
        * cpuall.h: Ditto.
182
        * decode.c: Ditto.
183
        * decode.h: Ditto.
184
        * model.c: Ditto.
185
        * sem-switch.c: Ditto.
186
        * sem.c: Ditto.
187
 
188
2001-09-12  Stan Cox  
189
 
190
        * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c,
191
        sem.c}: Regen'd.
192
        * iq2000.c (do_syscall): Support system traps.
193
 
194
2001-07-05  Ben Elliston  
195
 
196
        * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
197
        (stamp-cpu): Likewise.
198
 
199
2001-04-02  Ben Elliston  
200
 
201
        * arch.c, arch.h: Regnerate to track recent cgen improvements.
202
        * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise.
203
        * model.c, sem-switch.c, sem.c: Likewise.
204
 
205
2001-01-22  Ben Elliston  
206
 
207
        * cpu.h, decode.c, decode.h, model.c: Regenerate.
208
        * sem.c, sem-switch.c: Likewise.
209
 
210
        * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate.
211
        * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise.
212
 
213
2000-07-05  Ben Elliston  
214
 
215
        * configure: Regenerated to track ../common/aclocal.m4 changes.
216
 
217
2000-07-04  Ben Elliston  
218
 
219
        * sem.c, sem-switch.c: Regenerate.
220
 
221
        * iq2000.c (do_break): Use sim_engine_halt ().
222
        * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate.
223
 
224
2000-07-03  Ben Elliston  
225
 
226
        * iq2000.c (do_syscall): Examine syscall register (nominally %11).
227
        (do_break): Handle breakpoints.
228
        * tconfig.in (SIM_HAVE_BREAKPOINTS): Define.
229
        (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise.
230
 
231
2000-06-29  Andrew Cagney  
232
 
233
        * iq2000.c (iq2000bf_fetch_register): Implement.
234
        (iq2000bf_store_register): Ditto.
235
 
236
2000-05-17  Ben Elliston  
237
 
238
        * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE
239
        to set the skip count for the (skip ..) rtx.
240
        (extract-pbb): Likewise.
241
        (extract-pbb): Include the delay slot instruction of all CTI
242
        instructions in the pbb, not just those that may nullify their
243
        delay slot (eg. likely branches).
244
 
245
        * sem.c, sem-switch.c: Regenerate.
246
 
247
2000-05-16  Ben Elliston  
248
 
249
        * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate.
250
        * sem.c, sem-switch.c: Likewise.
251
        * mloop.in (extract-pbb): Prohibit branch instructions in the
252
        delay slot of branch likely instructions.
253
 
254
2000-05-16  Ben Elliston  
255
 
256
        * Makefile.in: New file.
257
        * configure.in: Ditto.
258
        * acconfig.h: Ditto.
259
        * config.in, configure: Generate.
260
        * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto.
261
        * decode.c, decode.h: Ditto.
262
        * model.c, sem-switch.c, sem.c: Ditto.
263
        * mloop.in: New file.
264
        * iq2000.c: Ditto.
265
        * iq2000-sim.h: Ditto.
266
        * sim-if.c: Ditto.
267
        * sim-main.h: Ditto.
268
        * tconfig.in: Ditto

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.