OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [m32r/] [semx-switch.c] - Blame information for rev 857

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn 
/* Simulator instruction semantics for m32rxf.
2 
 
3 
THIS FILE IS MACHINE GENERATED WITH CGEN.
4 
 
5 
Copyright 1996-2010 Free Software Foundation, Inc.
6 
 
7 
This file is part of the GNU simulators.
8 
 
9 
   This file is free software; you can redistribute it and/or modify
10 
   it under the terms of the GNU General Public License as published by
11 
   the Free Software Foundation; either version 3, or (at your option)
12 
   any later version.
13 
 
14 
   It is distributed in the hope that it will be useful, but WITHOUT
15 
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17 
   License for more details.
18 
 
19 
   You should have received a copy of the GNU General Public License along
20 
   with this program; if not, write to the Free Software Foundation, Inc.,
21 
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22 
 
23 
*/
24 
 
25 
#ifdef DEFINE_LABELS
26 
 
27 
  /* The labels have the case they have because the enum of insn types
28 
     is all uppercase and in the non-stdc case the insn symbol is built
29 
     into the enum name.  */
30 
 
31 
  static struct {
32 
    int index;
33 
    void *label;
34 
  } labels[] = {
35 
    { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
36 
    { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
37 
    { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
38 
    { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
39 
    { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
40 
    { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
41 
    { M32RXF_INSN_ADD, && case_sem_INSN_ADD },
42 
    { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 },
43 
    { M32RXF_INSN_AND, && case_sem_INSN_AND },
44 
    { M32RXF_INSN_AND3, && case_sem_INSN_AND3 },
45 
    { M32RXF_INSN_OR, && case_sem_INSN_OR },
46 
    { M32RXF_INSN_OR3, && case_sem_INSN_OR3 },
47 
    { M32RXF_INSN_XOR, && case_sem_INSN_XOR },
48 
    { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 },
49 
    { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI },
50 
    { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV },
51 
    { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
52 
    { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX },
53 
    { M32RXF_INSN_BC8, && case_sem_INSN_BC8 },
54 
    { M32RXF_INSN_BC24, && case_sem_INSN_BC24 },
55 
    { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ },
56 
    { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ },
57 
    { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ },
58 
    { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ },
59 
    { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ },
60 
    { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ },
61 
    { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ },
62 
    { M32RXF_INSN_BL8, && case_sem_INSN_BL8 },
63 
    { M32RXF_INSN_BL24, && case_sem_INSN_BL24 },
64 
    { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 },
65 
    { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 },
66 
    { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 },
67 
    { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 },
68 
    { M32RXF_INSN_BNE, && case_sem_INSN_BNE },
69 
    { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 },
70 
    { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 },
71 
    { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 },
72 
    { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 },
73 
    { M32RXF_INSN_CMP, && case_sem_INSN_CMP },
74 
    { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI },
75 
    { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU },
76 
    { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI },
77 
    { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
78 
    { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ },
79 
    { M32RXF_INSN_DIV, && case_sem_INSN_DIV },
80 
    { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU },
81 
    { M32RXF_INSN_REM, && case_sem_INSN_REM },
82 
    { M32RXF_INSN_REMU, && case_sem_INSN_REMU },
83 
    { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH },
84 
    { M32RXF_INSN_JC, && case_sem_INSN_JC },
85 
    { M32RXF_INSN_JNC, && case_sem_INSN_JNC },
86 
    { M32RXF_INSN_JL, && case_sem_INSN_JL },
87 
    { M32RXF_INSN_JMP, && case_sem_INSN_JMP },
88 
    { M32RXF_INSN_LD, && case_sem_INSN_LD },
89 
    { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D },
90 
    { M32RXF_INSN_LDB, && case_sem_INSN_LDB },
91 
    { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D },
92 
    { M32RXF_INSN_LDH, && case_sem_INSN_LDH },
93 
    { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D },
94 
    { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB },
95 
    { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
96 
    { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH },
97 
    { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
98 
    { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
99 
    { M32RXF_INSN_LD24, && case_sem_INSN_LD24 },
100 
    { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 },
101 
    { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 },
102 
    { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK },
103 
    { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
104 
    { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
105 
    { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
106 
    { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
107 
    { M32RXF_INSN_MUL, && case_sem_INSN_MUL },
108 
    { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
109 
    { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
110 
    { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
111 
    { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
112 
    { M32RXF_INSN_MV, && case_sem_INSN_MV },
113 
    { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
114 
    { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
115 
    { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
116 
    { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC },
117 
    { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
118 
    { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
119 
    { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC },
120 
    { M32RXF_INSN_NEG, && case_sem_INSN_NEG },
121 
    { M32RXF_INSN_NOP, && case_sem_INSN_NOP },
122 
    { M32RXF_INSN_NOT, && case_sem_INSN_NOT },
123 
    { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
124 
    { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
125 
    { M32RXF_INSN_RTE, && case_sem_INSN_RTE },
126 
    { M32RXF_INSN_SETH, && case_sem_INSN_SETH },
127 
    { M32RXF_INSN_SLL, && case_sem_INSN_SLL },
128 
    { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 },
129 
    { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI },
130 
    { M32RXF_INSN_SRA, && case_sem_INSN_SRA },
131 
    { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 },
132 
    { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI },
133 
    { M32RXF_INSN_SRL, && case_sem_INSN_SRL },
134 
    { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 },
135 
    { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI },
136 
    { M32RXF_INSN_ST, && case_sem_INSN_ST },
137 
    { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D },
138 
    { M32RXF_INSN_STB, && case_sem_INSN_STB },
139 
    { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D },
140 
    { M32RXF_INSN_STH, && case_sem_INSN_STH },
141 
    { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D },
142 
    { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
143 
    { M32RXF_INSN_STH_PLUS, && case_sem_INSN_STH_PLUS },
144 
    { M32RXF_INSN_STB_PLUS, && case_sem_INSN_STB_PLUS },
145 
    { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
146 
    { M32RXF_INSN_SUB, && case_sem_INSN_SUB },
147 
    { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV },
148 
    { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX },
149 
    { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP },
150 
    { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
151 
    { M32RXF_INSN_SATB, && case_sem_INSN_SATB },
152 
    { M32RXF_INSN_SATH, && case_sem_INSN_SATH },
153 
    { M32RXF_INSN_SAT, && case_sem_INSN_SAT },
154 
    { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
155 
    { M32RXF_INSN_SADD, && case_sem_INSN_SADD },
156 
    { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 },
157 
    { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO },
158 
    { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 },
159 
    { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 },
160 
    { M32RXF_INSN_SC, && case_sem_INSN_SC },
161 
    { M32RXF_INSN_SNC, && case_sem_INSN_SNC },
162 
    { M32RXF_INSN_CLRPSW, && case_sem_INSN_CLRPSW },
163 
    { M32RXF_INSN_SETPSW, && case_sem_INSN_SETPSW },
164 
    { M32RXF_INSN_BSET, && case_sem_INSN_BSET },
165 
    { M32RXF_INSN_BCLR, && case_sem_INSN_BCLR },
166 
    { M32RXF_INSN_BTST, && case_sem_INSN_BTST },
167 
    { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
168 
    { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
169 
    { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
170 
    { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
171 
    { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
172 
    { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
173 
    { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
174 
    { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
175 
    { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
176 
    { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
177 
    { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
178 
    { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
179 
    { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
180 
    { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
181 
    { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
182 
    { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
183 
    { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
184 
    { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
185 
    { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
186 
    { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
187 
    { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
188 
    { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
189 
    { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
190 
    { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
191 
    { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
192 
    { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
193 
    { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
194 
    { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
195 
    { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
196 
    { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
197 
    { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
198 
    { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
199 
    { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
200 
    { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
201 
    { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
202 
    { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
203 
    { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
204 
    { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
205 
    { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
206 
    { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
207 
    { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
208 
    { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
209 
    { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
210 
    { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
211 
    { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
212 
    { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
213 
    { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
214 
    { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
215 
    { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
216 
    { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
217 
    { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
218 
    { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
219 
    { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
220 
    { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
221 
    { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
222 
    { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
223 
    { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
224 
    { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
225 
    { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
226 
    { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
227 
    { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
228 
    { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
229 
    { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
230 
    { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
231 
    { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
232 
    { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
233 
    { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
234 
    { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
235 
    { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
236 
    { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
237 
    { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
238 
    { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
239 
    { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
240 
    { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
241 
    { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
242 
    { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
243 
    { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
244 
    { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
245 
    { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
246 
    { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
247 
    { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
248 
    { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
249 
    { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
250 
    { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
251 
    { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
252 
    { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
253 
    { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
254 
    { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
255 
    { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
256 
    { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
257 
    { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
258 
    { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
259 
    { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
260 
    { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
261 
    { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
262 
    { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
263 
    { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
264 
    { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
265 
    { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
266 
    { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
267 
    { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
268 
    { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
269 
    { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
270 
    { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
271 
    { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
272 
    { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
273 
    { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
274 
    { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
275 
    { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
276 
    { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
277 
    { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
278 
    { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
279 
    { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
280 
    { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
281 
    { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
282 
    { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
283 
    { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
284 
    { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
285 
    { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
286 
    { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
287 
    { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
288 
    { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
289 
    { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
290 
    { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
291 
    { M32RXF_INSN_PAR_STH_PLUS, && case_sem_INSN_PAR_STH_PLUS },
292 
    { M32RXF_INSN_WRITE_STH_PLUS, && case_sem_INSN_WRITE_STH_PLUS },
293 
    { M32RXF_INSN_PAR_STB_PLUS, && case_sem_INSN_PAR_STB_PLUS },
294 
    { M32RXF_INSN_WRITE_STB_PLUS, && case_sem_INSN_WRITE_STB_PLUS },
295 
    { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
296 
    { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
297 
    { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
298 
    { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
299 
    { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
300 
    { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
301 
    { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
302 
    { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
303 
    { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
304 
    { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
305 
    { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
306 
    { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
307 
    { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
308 
    { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
309 
    { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
310 
    { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
311 
    { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
312 
    { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
313 
    { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
314 
    { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
315 
    { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
316 
    { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
317 
    { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
318 
    { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
319 
    { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
320 
    { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
321 
    { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
322 
    { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
323 
    { M32RXF_INSN_PAR_CLRPSW, && case_sem_INSN_PAR_CLRPSW },
324 
    { M32RXF_INSN_WRITE_CLRPSW, && case_sem_INSN_WRITE_CLRPSW },
325 
    { M32RXF_INSN_PAR_SETPSW, && case_sem_INSN_PAR_SETPSW },
326 
    { M32RXF_INSN_WRITE_SETPSW, && case_sem_INSN_WRITE_SETPSW },
327 
    { M32RXF_INSN_PAR_BTST, && case_sem_INSN_PAR_BTST },
328 
    { M32RXF_INSN_WRITE_BTST, && case_sem_INSN_WRITE_BTST },
329 
    { 0, 0 }
330 
  };
331 
  int i;
332 
 
333 
  for (i = 0; labels[i].label != 0; ++i)
334 
    {
335 
#if FAST_P
336 
      CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
337 
#else
338 
      CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
339 
#endif
340 
    }
341 
 
342 
#undef DEFINE_LABELS
343 
#endif /* DEFINE_LABELS */
344 
 
345 
#ifdef DEFINE_SWITCH
346 
 
347 
/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
348 
   off frills like tracing and profiling.  */
349 
/* FIXME: A better way would be to have TRACE_RESULT check for something
350 
   that can cause it to be optimized out.  Another way would be to emit
351 
   special handlers into the instruction "stream".  */
352 
 
353 
#if FAST_P
354 
#undef TRACE_RESULT
355 
#define TRACE_RESULT(cpu, abuf, name, type, val)
356 
#endif
357 
 
358 
#undef GET_ATTR
359 
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
360 
 
361 
{
362 
 
363 
#if WITH_SCACHE_PBB
364 
 
365 
/* Branch to next handler without going around main loop.  */
366 
#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
367 
SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
368 
 
369 
#else /* ! WITH_SCACHE_PBB */
370 
 
371 
#define NEXT(vpc) BREAK (sem)
372 
#ifdef __GNUC__
373 
#if FAST_P
374 
  SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
375 
#else
376 
  SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
377 
#endif
378 
#else
379 
  SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
380 
#endif
381 
 
382 
#endif /* ! WITH_SCACHE_PBB */
383 
 
384 
    {
385 
 
386 
  CASE (sem, INSN_X_INVALID) : /* --invalid-- */
387 
{
388 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
389 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
390 
#define FLD(f) abuf->fields.sfmt_empty.f
391 
  int UNUSED written = 0;
392 
  IADDR UNUSED pc = abuf->addr;
393 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
394 
 
395 
  {
396 
    /* Update the recorded pc in the cpu state struct.
397 
       Only necessary for WITH_SCACHE case, but to avoid the
398 
       conditional compilation ....  */
399 
    SET_H_PC (pc);
400 
    /* Virtual insns have zero size.  Overwrite vpc with address of next insn
401 
       using the default-insn-bitsize spec.  When executing insns in parallel
402 
       we may want to queue the fault and continue execution.  */
403 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
404 
    vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
405 
  }
406 
 
407 
#undef FLD
408 
}
409 
  NEXT (vpc);
410 
 
411 
  CASE (sem, INSN_X_AFTER) : /* --after-- */
412 
{
413 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
414 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
415 
#define FLD(f) abuf->fields.sfmt_empty.f
416 
  int UNUSED written = 0;
417 
  IADDR UNUSED pc = abuf->addr;
418 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
419 
 
420 
  {
421 
#if WITH_SCACHE_PBB_M32RXF
422 
    m32rxf_pbb_after (current_cpu, sem_arg);
423 
#endif
424 
  }
425 
 
426 
#undef FLD
427 
}
428 
  NEXT (vpc);
429 
 
430 
  CASE (sem, INSN_X_BEFORE) : /* --before-- */
431 
{
432 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
433 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
434 
#define FLD(f) abuf->fields.sfmt_empty.f
435 
  int UNUSED written = 0;
436 
  IADDR UNUSED pc = abuf->addr;
437 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
438 
 
439 
  {
440 
#if WITH_SCACHE_PBB_M32RXF
441 
    m32rxf_pbb_before (current_cpu, sem_arg);
442 
#endif
443 
  }
444 
 
445 
#undef FLD
446 
}
447 
  NEXT (vpc);
448 
 
449 
  CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
450 
{
451 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
452 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
453 
#define FLD(f) abuf->fields.sfmt_empty.f
454 
  int UNUSED written = 0;
455 
  IADDR UNUSED pc = abuf->addr;
456 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
457 
 
458 
  {
459 
#if WITH_SCACHE_PBB_M32RXF
460 
#ifdef DEFINE_SWITCH
461 
    vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
462 
                               pbb_br_type, pbb_br_npc);
463 
    BREAK (sem);
464 
#else
465 
    /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
466 
    vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
467 
                               CPU_PBB_BR_TYPE (current_cpu),
468 
                               CPU_PBB_BR_NPC (current_cpu));
469 
#endif
470 
#endif
471 
  }
472 
 
473 
#undef FLD
474 
}
475 
  NEXT (vpc);
476 
 
477 
  CASE (sem, INSN_X_CHAIN) : /* --chain-- */
478 
{
479 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
480 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
481 
#define FLD(f) abuf->fields.sfmt_empty.f
482 
  int UNUSED written = 0;
483 
  IADDR UNUSED pc = abuf->addr;
484 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
485 
 
486 
  {
487 
#if WITH_SCACHE_PBB_M32RXF
488 
    vpc = m32rxf_pbb_chain (current_cpu, sem_arg);
489 
#ifdef DEFINE_SWITCH
490 
    BREAK (sem);
491 
#endif
492 
#endif
493 
  }
494 
 
495 
#undef FLD
496 
}
497 
  NEXT (vpc);
498 
 
499 
  CASE (sem, INSN_X_BEGIN) : /* --begin-- */
500 
{
501 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
502 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
503 
#define FLD(f) abuf->fields.sfmt_empty.f
504 
  int UNUSED written = 0;
505 
  IADDR UNUSED pc = abuf->addr;
506 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
507 
 
508 
  {
509 
#if WITH_SCACHE_PBB_M32RXF
510 
#if defined DEFINE_SWITCH || defined FAST_P
511 
    /* In the switch case FAST_P is a constant, allowing several optimizations
512 
       in any called inline functions.  */
513 
    vpc = m32rxf_pbb_begin (current_cpu, FAST_P);
514 
#else
515 
#if 0 /* cgen engine can't handle dynamic fast/full switching yet.  */
516 
    vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
517 
#else
518 
    vpc = m32rxf_pbb_begin (current_cpu, 0);
519 
#endif
520 
#endif
521 
#endif
522 
  }
523 
 
524 
#undef FLD
525 
}
526 
  NEXT (vpc);
527 
 
528 
  CASE (sem, INSN_ADD) : /* add $dr,$sr */
529 
{
530 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
531 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
532 
#define FLD(f) abuf->fields.sfmt_add.f
533 
  int UNUSED written = 0;
534 
  IADDR UNUSED pc = abuf->addr;
535 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
536 
 
537 
  {
538 
    SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
539 
    * FLD (i_dr) = opval;
540 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
541 
  }
542 
 
543 
#undef FLD
544 
}
545 
  NEXT (vpc);
546 
 
547 
  CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
548 
{
549 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
550 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
551 
#define FLD(f) abuf->fields.sfmt_add3.f
552 
  int UNUSED written = 0;
553 
  IADDR UNUSED pc = abuf->addr;
554 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
555 
 
556 
  {
557 
    SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
558 
    * FLD (i_dr) = opval;
559 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
560 
  }
561 
 
562 
#undef FLD
563 
}
564 
  NEXT (vpc);
565 
 
566 
  CASE (sem, INSN_AND) : /* and $dr,$sr */
567 
{
568 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
569 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
570 
#define FLD(f) abuf->fields.sfmt_add.f
571 
  int UNUSED written = 0;
572 
  IADDR UNUSED pc = abuf->addr;
573 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
574 
 
575 
  {
576 
    SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
577 
    * FLD (i_dr) = opval;
578 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
579 
  }
580 
 
581 
#undef FLD
582 
}
583 
  NEXT (vpc);
584 
 
585 
  CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
586 
{
587 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
588 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
589 
#define FLD(f) abuf->fields.sfmt_and3.f
590 
  int UNUSED written = 0;
591 
  IADDR UNUSED pc = abuf->addr;
592 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
593 
 
594 
  {
595 
    SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
596 
    * FLD (i_dr) = opval;
597 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
598 
  }
599 
 
600 
#undef FLD
601 
}
602 
  NEXT (vpc);
603 
 
604 
  CASE (sem, INSN_OR) : /* or $dr,$sr */
605 
{
606 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
607 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
608 
#define FLD(f) abuf->fields.sfmt_add.f
609 
  int UNUSED written = 0;
610 
  IADDR UNUSED pc = abuf->addr;
611 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
612 
 
613 
  {
614 
    SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
615 
    * FLD (i_dr) = opval;
616 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
617 
  }
618 
 
619 
#undef FLD
620 
}
621 
  NEXT (vpc);
622 
 
623 
  CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
624 
{
625 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
626 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
627 
#define FLD(f) abuf->fields.sfmt_and3.f
628 
  int UNUSED written = 0;
629 
  IADDR UNUSED pc = abuf->addr;
630 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
631 
 
632 
  {
633 
    SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
634 
    * FLD (i_dr) = opval;
635 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
636 
  }
637 
 
638 
#undef FLD
639 
}
640 
  NEXT (vpc);
641 
 
642 
  CASE (sem, INSN_XOR) : /* xor $dr,$sr */
643 
{
644 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
645 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
646 
#define FLD(f) abuf->fields.sfmt_add.f
647 
  int UNUSED written = 0;
648 
  IADDR UNUSED pc = abuf->addr;
649 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
650 
 
651 
  {
652 
    SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
653 
    * FLD (i_dr) = opval;
654 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
655 
  }
656 
 
657 
#undef FLD
658 
}
659 
  NEXT (vpc);
660 
 
661 
  CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
662 
{
663 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
664 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
665 
#define FLD(f) abuf->fields.sfmt_and3.f
666 
  int UNUSED written = 0;
667 
  IADDR UNUSED pc = abuf->addr;
668 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
669 
 
670 
  {
671 
    SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
672 
    * FLD (i_dr) = opval;
673 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
674 
  }
675 
 
676 
#undef FLD
677 
}
678 
  NEXT (vpc);
679 
 
680 
  CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
681 
{
682 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
683 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
684 
#define FLD(f) abuf->fields.sfmt_addi.f
685 
  int UNUSED written = 0;
686 
  IADDR UNUSED pc = abuf->addr;
687 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
688 
 
689 
  {
690 
    SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
691 
    * FLD (i_dr) = opval;
692 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
693 
  }
694 
 
695 
#undef FLD
696 
}
697 
  NEXT (vpc);
698 
 
699 
  CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
700 
{
701 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
702 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
703 
#define FLD(f) abuf->fields.sfmt_add.f
704 
  int UNUSED written = 0;
705 
  IADDR UNUSED pc = abuf->addr;
706 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
707 
 
708 
{
709 
  SI temp0;BI temp1;
710 
  temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
711 
  temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
712 
  {
713 
    SI opval = temp0;
714 
    * FLD (i_dr) = opval;
715 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
716 
  }
717 
  {
718 
    BI opval = temp1;
719 
    CPU (h_cond) = opval;
720 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
721 
  }
722 
}
723 
 
724 
#undef FLD
725 
}
726 
  NEXT (vpc);
727 
 
728 
  CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
729 
{
730 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
731 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
732 
#define FLD(f) abuf->fields.sfmt_add3.f
733 
  int UNUSED written = 0;
734 
  IADDR UNUSED pc = abuf->addr;
735 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
736 
 
737 
{
738 
  SI temp0;BI temp1;
739 
  temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
740 
  temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
741 
  {
742 
    SI opval = temp0;
743 
    * FLD (i_dr) = opval;
744 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
745 
  }
746 
  {
747 
    BI opval = temp1;
748 
    CPU (h_cond) = opval;
749 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
750 
  }
751 
}
752 
 
753 
#undef FLD
754 
}
755 
  NEXT (vpc);
756 
 
757 
  CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
758 
{
759 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
760 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
761 
#define FLD(f) abuf->fields.sfmt_add.f
762 
  int UNUSED written = 0;
763 
  IADDR UNUSED pc = abuf->addr;
764 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
765 
 
766 
{
767 
  SI temp0;BI temp1;
768 
  temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
769 
  temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
770 
  {
771 
    SI opval = temp0;
772 
    * FLD (i_dr) = opval;
773 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
774 
  }
775 
  {
776 
    BI opval = temp1;
777 
    CPU (h_cond) = opval;
778 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
779 
  }
780 
}
781 
 
782 
#undef FLD
783 
}
784 
  NEXT (vpc);
785 
 
786 
  CASE (sem, INSN_BC8) : /* bc.s $disp8 */
787 
{
788 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
789 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
790 
#define FLD(f) abuf->fields.sfmt_bl8.f
791 
  int UNUSED written = 0;
792 
  IADDR UNUSED pc = abuf->addr;
793 
  SEM_BRANCH_INIT
794 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
795 
 
796 
if (CPU (h_cond)) {
797 
  {
798 
    USI opval = FLD (i_disp8);
799 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
800 
    written |= (1 << 2);
801 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
802 
  }
803 
}
804 
 
805 
  abuf->written = written;
806 
  SEM_BRANCH_FINI (vpc);
807 
#undef FLD
808 
}
809 
  NEXT (vpc);
810 
 
811 
  CASE (sem, INSN_BC24) : /* bc.l $disp24 */
812 
{
813 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
814 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
815 
#define FLD(f) abuf->fields.sfmt_bl24.f
816 
  int UNUSED written = 0;
817 
  IADDR UNUSED pc = abuf->addr;
818 
  SEM_BRANCH_INIT
819 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
820 
 
821 
if (CPU (h_cond)) {
822 
  {
823 
    USI opval = FLD (i_disp24);
824 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
825 
    written |= (1 << 2);
826 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
827 
  }
828 
}
829 
 
830 
  abuf->written = written;
831 
  SEM_BRANCH_FINI (vpc);
832 
#undef FLD
833 
}
834 
  NEXT (vpc);
835 
 
836 
  CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
837 
{
838 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
839 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
840 
#define FLD(f) abuf->fields.sfmt_beq.f
841 
  int UNUSED written = 0;
842 
  IADDR UNUSED pc = abuf->addr;
843 
  SEM_BRANCH_INIT
844 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
845 
 
846 
if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
847 
  {
848 
    USI opval = FLD (i_disp16);
849 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
850 
    written |= (1 << 3);
851 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
852 
  }
853 
}
854 
 
855 
  abuf->written = written;
856 
  SEM_BRANCH_FINI (vpc);
857 
#undef FLD
858 
}
859 
  NEXT (vpc);
860 
 
861 
  CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
862 
{
863 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
864 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
865 
#define FLD(f) abuf->fields.sfmt_beq.f
866 
  int UNUSED written = 0;
867 
  IADDR UNUSED pc = abuf->addr;
868 
  SEM_BRANCH_INIT
869 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
870 
 
871 
if (EQSI (* FLD (i_src2), 0)) {
872 
  {
873 
    USI opval = FLD (i_disp16);
874 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
875 
    written |= (1 << 2);
876 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
877 
  }
878 
}
879 
 
880 
  abuf->written = written;
881 
  SEM_BRANCH_FINI (vpc);
882 
#undef FLD
883 
}
884 
  NEXT (vpc);
885 
 
886 
  CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
887 
{
888 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
889 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
890 
#define FLD(f) abuf->fields.sfmt_beq.f
891 
  int UNUSED written = 0;
892 
  IADDR UNUSED pc = abuf->addr;
893 
  SEM_BRANCH_INIT
894 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
895 
 
896 
if (GESI (* FLD (i_src2), 0)) {
897 
  {
898 
    USI opval = FLD (i_disp16);
899 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
900 
    written |= (1 << 2);
901 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
902 
  }
903 
}
904 
 
905 
  abuf->written = written;
906 
  SEM_BRANCH_FINI (vpc);
907 
#undef FLD
908 
}
909 
  NEXT (vpc);
910 
 
911 
  CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
912 
{
913 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
914 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
915 
#define FLD(f) abuf->fields.sfmt_beq.f
916 
  int UNUSED written = 0;
917 
  IADDR UNUSED pc = abuf->addr;
918 
  SEM_BRANCH_INIT
919 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
920 
 
921 
if (GTSI (* FLD (i_src2), 0)) {
922 
  {
923 
    USI opval = FLD (i_disp16);
924 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
925 
    written |= (1 << 2);
926 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
927 
  }
928 
}
929 
 
930 
  abuf->written = written;
931 
  SEM_BRANCH_FINI (vpc);
932 
#undef FLD
933 
}
934 
  NEXT (vpc);
935 
 
936 
  CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
937 
{
938 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
939 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
940 
#define FLD(f) abuf->fields.sfmt_beq.f
941 
  int UNUSED written = 0;
942 
  IADDR UNUSED pc = abuf->addr;
943 
  SEM_BRANCH_INIT
944 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
945 
 
946 
if (LESI (* FLD (i_src2), 0)) {
947 
  {
948 
    USI opval = FLD (i_disp16);
949 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
950 
    written |= (1 << 2);
951 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
952 
  }
953 
}
954 
 
955 
  abuf->written = written;
956 
  SEM_BRANCH_FINI (vpc);
957 
#undef FLD
958 
}
959 
  NEXT (vpc);
960 
 
961 
  CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
962 
{
963 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
964 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
965 
#define FLD(f) abuf->fields.sfmt_beq.f
966 
  int UNUSED written = 0;
967 
  IADDR UNUSED pc = abuf->addr;
968 
  SEM_BRANCH_INIT
969 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
970 
 
971 
if (LTSI (* FLD (i_src2), 0)) {
972 
  {
973 
    USI opval = FLD (i_disp16);
974 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
975 
    written |= (1 << 2);
976 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
977 
  }
978 
}
979 
 
980 
  abuf->written = written;
981 
  SEM_BRANCH_FINI (vpc);
982 
#undef FLD
983 
}
984 
  NEXT (vpc);
985 
 
986 
  CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
987 
{
988 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
989 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
990 
#define FLD(f) abuf->fields.sfmt_beq.f
991 
  int UNUSED written = 0;
992 
  IADDR UNUSED pc = abuf->addr;
993 
  SEM_BRANCH_INIT
994 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
995 
 
996 
if (NESI (* FLD (i_src2), 0)) {
997 
  {
998 
    USI opval = FLD (i_disp16);
999 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1000 
    written |= (1 << 2);
1001 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1002 
  }
1003 
}
1004 
 
1005 
  abuf->written = written;
1006 
  SEM_BRANCH_FINI (vpc);
1007 
#undef FLD
1008 
}
1009 
  NEXT (vpc);
1010 
 
1011 
  CASE (sem, INSN_BL8) : /* bl.s $disp8 */
1012 
{
1013 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1014 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1015 
#define FLD(f) abuf->fields.sfmt_bl8.f
1016 
  int UNUSED written = 0;
1017 
  IADDR UNUSED pc = abuf->addr;
1018 
  SEM_BRANCH_INIT
1019 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1020 
 
1021 
{
1022 
  {
1023 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
1024 
    CPU (h_gr[((UINT) 14)]) = opval;
1025 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1026 
  }
1027 
  {
1028 
    USI opval = FLD (i_disp8);
1029 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1030 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1031 
  }
1032 
}
1033 
 
1034 
  SEM_BRANCH_FINI (vpc);
1035 
#undef FLD
1036 
}
1037 
  NEXT (vpc);
1038 
 
1039 
  CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1040 
{
1041 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1042 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1043 
#define FLD(f) abuf->fields.sfmt_bl24.f
1044 
  int UNUSED written = 0;
1045 
  IADDR UNUSED pc = abuf->addr;
1046 
  SEM_BRANCH_INIT
1047 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1048 
 
1049 
{
1050 
  {
1051 
    SI opval = ADDSI (pc, 4);
1052 
    CPU (h_gr[((UINT) 14)]) = opval;
1053 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1054 
  }
1055 
  {
1056 
    USI opval = FLD (i_disp24);
1057 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1058 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1059 
  }
1060 
}
1061 
 
1062 
  SEM_BRANCH_FINI (vpc);
1063 
#undef FLD
1064 
}
1065 
  NEXT (vpc);
1066 
 
1067 
  CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1068 
{
1069 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1070 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1071 
#define FLD(f) abuf->fields.sfmt_bl8.f
1072 
  int UNUSED written = 0;
1073 
  IADDR UNUSED pc = abuf->addr;
1074 
  SEM_BRANCH_INIT
1075 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1076 
 
1077 
if (CPU (h_cond)) {
1078 
{
1079 
  {
1080 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
1081 
    CPU (h_gr[((UINT) 14)]) = opval;
1082 
    written |= (1 << 3);
1083 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1084 
  }
1085 
  {
1086 
    USI opval = FLD (i_disp8);
1087 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1088 
    written |= (1 << 4);
1089 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1090 
  }
1091 
}
1092 
}
1093 
 
1094 
  abuf->written = written;
1095 
  SEM_BRANCH_FINI (vpc);
1096 
#undef FLD
1097 
}
1098 
  NEXT (vpc);
1099 
 
1100 
  CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1101 
{
1102 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1103 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1104 
#define FLD(f) abuf->fields.sfmt_bl24.f
1105 
  int UNUSED written = 0;
1106 
  IADDR UNUSED pc = abuf->addr;
1107 
  SEM_BRANCH_INIT
1108 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1109 
 
1110 
if (CPU (h_cond)) {
1111 
{
1112 
  {
1113 
    SI opval = ADDSI (pc, 4);
1114 
    CPU (h_gr[((UINT) 14)]) = opval;
1115 
    written |= (1 << 3);
1116 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1117 
  }
1118 
  {
1119 
    USI opval = FLD (i_disp24);
1120 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1121 
    written |= (1 << 4);
1122 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1123 
  }
1124 
}
1125 
}
1126 
 
1127 
  abuf->written = written;
1128 
  SEM_BRANCH_FINI (vpc);
1129 
#undef FLD
1130 
}
1131 
  NEXT (vpc);
1132 
 
1133 
  CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1134 
{
1135 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1136 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1137 
#define FLD(f) abuf->fields.sfmt_bl8.f
1138 
  int UNUSED written = 0;
1139 
  IADDR UNUSED pc = abuf->addr;
1140 
  SEM_BRANCH_INIT
1141 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1142 
 
1143 
if (NOTBI (CPU (h_cond))) {
1144 
  {
1145 
    USI opval = FLD (i_disp8);
1146 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1147 
    written |= (1 << 2);
1148 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1149 
  }
1150 
}
1151 
 
1152 
  abuf->written = written;
1153 
  SEM_BRANCH_FINI (vpc);
1154 
#undef FLD
1155 
}
1156 
  NEXT (vpc);
1157 
 
1158 
  CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1159 
{
1160 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1161 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1162 
#define FLD(f) abuf->fields.sfmt_bl24.f
1163 
  int UNUSED written = 0;
1164 
  IADDR UNUSED pc = abuf->addr;
1165 
  SEM_BRANCH_INIT
1166 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1167 
 
1168 
if (NOTBI (CPU (h_cond))) {
1169 
  {
1170 
    USI opval = FLD (i_disp24);
1171 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1172 
    written |= (1 << 2);
1173 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1174 
  }
1175 
}
1176 
 
1177 
  abuf->written = written;
1178 
  SEM_BRANCH_FINI (vpc);
1179 
#undef FLD
1180 
}
1181 
  NEXT (vpc);
1182 
 
1183 
  CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1184 
{
1185 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1186 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1187 
#define FLD(f) abuf->fields.sfmt_beq.f
1188 
  int UNUSED written = 0;
1189 
  IADDR UNUSED pc = abuf->addr;
1190 
  SEM_BRANCH_INIT
1191 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1192 
 
1193 
if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1194 
  {
1195 
    USI opval = FLD (i_disp16);
1196 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1197 
    written |= (1 << 3);
1198 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1199 
  }
1200 
}
1201 
 
1202 
  abuf->written = written;
1203 
  SEM_BRANCH_FINI (vpc);
1204 
#undef FLD
1205 
}
1206 
  NEXT (vpc);
1207 
 
1208 
  CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1209 
{
1210 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1211 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1212 
#define FLD(f) abuf->fields.sfmt_bl8.f
1213 
  int UNUSED written = 0;
1214 
  IADDR UNUSED pc = abuf->addr;
1215 
  SEM_BRANCH_INIT
1216 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1217 
 
1218 
  {
1219 
    USI opval = FLD (i_disp8);
1220 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1221 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1222 
  }
1223 
 
1224 
  SEM_BRANCH_FINI (vpc);
1225 
#undef FLD
1226 
}
1227 
  NEXT (vpc);
1228 
 
1229 
  CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1230 
{
1231 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1232 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1233 
#define FLD(f) abuf->fields.sfmt_bl24.f
1234 
  int UNUSED written = 0;
1235 
  IADDR UNUSED pc = abuf->addr;
1236 
  SEM_BRANCH_INIT
1237 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1238 
 
1239 
  {
1240 
    USI opval = FLD (i_disp24);
1241 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1242 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1243 
  }
1244 
 
1245 
  SEM_BRANCH_FINI (vpc);
1246 
#undef FLD
1247 
}
1248 
  NEXT (vpc);
1249 
 
1250 
  CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1251 
{
1252 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1253 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1254 
#define FLD(f) abuf->fields.sfmt_bl8.f
1255 
  int UNUSED written = 0;
1256 
  IADDR UNUSED pc = abuf->addr;
1257 
  SEM_BRANCH_INIT
1258 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1259 
 
1260 
if (NOTBI (CPU (h_cond))) {
1261 
{
1262 
  {
1263 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
1264 
    CPU (h_gr[((UINT) 14)]) = opval;
1265 
    written |= (1 << 3);
1266 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1267 
  }
1268 
  {
1269 
    USI opval = FLD (i_disp8);
1270 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1271 
    written |= (1 << 4);
1272 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1273 
  }
1274 
}
1275 
}
1276 
 
1277 
  abuf->written = written;
1278 
  SEM_BRANCH_FINI (vpc);
1279 
#undef FLD
1280 
}
1281 
  NEXT (vpc);
1282 
 
1283 
  CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1284 
{
1285 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1286 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1287 
#define FLD(f) abuf->fields.sfmt_bl24.f
1288 
  int UNUSED written = 0;
1289 
  IADDR UNUSED pc = abuf->addr;
1290 
  SEM_BRANCH_INIT
1291 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1292 
 
1293 
if (NOTBI (CPU (h_cond))) {
1294 
{
1295 
  {
1296 
    SI opval = ADDSI (pc, 4);
1297 
    CPU (h_gr[((UINT) 14)]) = opval;
1298 
    written |= (1 << 3);
1299 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1300 
  }
1301 
  {
1302 
    USI opval = FLD (i_disp24);
1303 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1304 
    written |= (1 << 4);
1305 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1306 
  }
1307 
}
1308 
}
1309 
 
1310 
  abuf->written = written;
1311 
  SEM_BRANCH_FINI (vpc);
1312 
#undef FLD
1313 
}
1314 
  NEXT (vpc);
1315 
 
1316 
  CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1317 
{
1318 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1319 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1320 
#define FLD(f) abuf->fields.sfmt_st_plus.f
1321 
  int UNUSED written = 0;
1322 
  IADDR UNUSED pc = abuf->addr;
1323 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1324 
 
1325 
  {
1326 
    BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1327 
    CPU (h_cond) = opval;
1328 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1329 
  }
1330 
 
1331 
#undef FLD
1332 
}
1333 
  NEXT (vpc);
1334 
 
1335 
  CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1336 
{
1337 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1338 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1339 
#define FLD(f) abuf->fields.sfmt_st_d.f
1340 
  int UNUSED written = 0;
1341 
  IADDR UNUSED pc = abuf->addr;
1342 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1343 
 
1344 
  {
1345 
    BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1346 
    CPU (h_cond) = opval;
1347 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1348 
  }
1349 
 
1350 
#undef FLD
1351 
}
1352 
  NEXT (vpc);
1353 
 
1354 
  CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1355 
{
1356 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1357 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1358 
#define FLD(f) abuf->fields.sfmt_st_plus.f
1359 
  int UNUSED written = 0;
1360 
  IADDR UNUSED pc = abuf->addr;
1361 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1362 
 
1363 
  {
1364 
    BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1365 
    CPU (h_cond) = opval;
1366 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1367 
  }
1368 
 
1369 
#undef FLD
1370 
}
1371 
  NEXT (vpc);
1372 
 
1373 
  CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1374 
{
1375 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1376 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1377 
#define FLD(f) abuf->fields.sfmt_st_d.f
1378 
  int UNUSED written = 0;
1379 
  IADDR UNUSED pc = abuf->addr;
1380 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1381 
 
1382 
  {
1383 
    BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1384 
    CPU (h_cond) = opval;
1385 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1386 
  }
1387 
 
1388 
#undef FLD
1389 
}
1390 
  NEXT (vpc);
1391 
 
1392 
  CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1393 
{
1394 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1395 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1396 
#define FLD(f) abuf->fields.sfmt_st_plus.f
1397 
  int UNUSED written = 0;
1398 
  IADDR UNUSED pc = abuf->addr;
1399 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1400 
 
1401 
  {
1402 
    BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1403 
    CPU (h_cond) = opval;
1404 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1405 
  }
1406 
 
1407 
#undef FLD
1408 
}
1409 
  NEXT (vpc);
1410 
 
1411 
  CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1412 
{
1413 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1414 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1415 
#define FLD(f) abuf->fields.sfmt_st_plus.f
1416 
  int UNUSED written = 0;
1417 
  IADDR UNUSED pc = abuf->addr;
1418 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1419 
 
1420 
  {
1421 
    BI opval = EQSI (* FLD (i_src2), 0);
1422 
    CPU (h_cond) = opval;
1423 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1424 
  }
1425 
 
1426 
#undef FLD
1427 
}
1428 
  NEXT (vpc);
1429 
 
1430 
  CASE (sem, INSN_DIV) : /* div $dr,$sr */
1431 
{
1432 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1433 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1434 
#define FLD(f) abuf->fields.sfmt_add.f
1435 
  int UNUSED written = 0;
1436 
  IADDR UNUSED pc = abuf->addr;
1437 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1438 
 
1439 
if (NESI (* FLD (i_sr), 0)) {
1440 
  {
1441 
    SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1442 
    * FLD (i_dr) = opval;
1443 
    written |= (1 << 2);
1444 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1445 
  }
1446 
}
1447 
 
1448 
  abuf->written = written;
1449 
#undef FLD
1450 
}
1451 
  NEXT (vpc);
1452 
 
1453 
  CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1454 
{
1455 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1456 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1457 
#define FLD(f) abuf->fields.sfmt_add.f
1458 
  int UNUSED written = 0;
1459 
  IADDR UNUSED pc = abuf->addr;
1460 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1461 
 
1462 
if (NESI (* FLD (i_sr), 0)) {
1463 
  {
1464 
    SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1465 
    * FLD (i_dr) = opval;
1466 
    written |= (1 << 2);
1467 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1468 
  }
1469 
}
1470 
 
1471 
  abuf->written = written;
1472 
#undef FLD
1473 
}
1474 
  NEXT (vpc);
1475 
 
1476 
  CASE (sem, INSN_REM) : /* rem $dr,$sr */
1477 
{
1478 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1479 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1480 
#define FLD(f) abuf->fields.sfmt_add.f
1481 
  int UNUSED written = 0;
1482 
  IADDR UNUSED pc = abuf->addr;
1483 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1484 
 
1485 
if (NESI (* FLD (i_sr), 0)) {
1486 
  {
1487 
    SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1488 
    * FLD (i_dr) = opval;
1489 
    written |= (1 << 2);
1490 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1491 
  }
1492 
}
1493 
 
1494 
  abuf->written = written;
1495 
#undef FLD
1496 
}
1497 
  NEXT (vpc);
1498 
 
1499 
  CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1500 
{
1501 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1502 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1503 
#define FLD(f) abuf->fields.sfmt_add.f
1504 
  int UNUSED written = 0;
1505 
  IADDR UNUSED pc = abuf->addr;
1506 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1507 
 
1508 
if (NESI (* FLD (i_sr), 0)) {
1509 
  {
1510 
    SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1511 
    * FLD (i_dr) = opval;
1512 
    written |= (1 << 2);
1513 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1514 
  }
1515 
}
1516 
 
1517 
  abuf->written = written;
1518 
#undef FLD
1519 
}
1520 
  NEXT (vpc);
1521 
 
1522 
  CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1523 
{
1524 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1525 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1526 
#define FLD(f) abuf->fields.sfmt_add.f
1527 
  int UNUSED written = 0;
1528 
  IADDR UNUSED pc = abuf->addr;
1529 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1530 
 
1531 
if (NESI (* FLD (i_sr), 0)) {
1532 
  {
1533 
    SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1534 
    * FLD (i_dr) = opval;
1535 
    written |= (1 << 2);
1536 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1537 
  }
1538 
}
1539 
 
1540 
  abuf->written = written;
1541 
#undef FLD
1542 
}
1543 
  NEXT (vpc);
1544 
 
1545 
  CASE (sem, INSN_JC) : /* jc $sr */
1546 
{
1547 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1548 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1549 
#define FLD(f) abuf->fields.sfmt_jl.f
1550 
  int UNUSED written = 0;
1551 
  IADDR UNUSED pc = abuf->addr;
1552 
  SEM_BRANCH_INIT
1553 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1554 
 
1555 
if (CPU (h_cond)) {
1556 
  {
1557 
    USI opval = ANDSI (* FLD (i_sr), -4);
1558 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1559 
    written |= (1 << 2);
1560 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1561 
  }
1562 
}
1563 
 
1564 
  abuf->written = written;
1565 
  SEM_BRANCH_FINI (vpc);
1566 
#undef FLD
1567 
}
1568 
  NEXT (vpc);
1569 
 
1570 
  CASE (sem, INSN_JNC) : /* jnc $sr */
1571 
{
1572 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1573 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1574 
#define FLD(f) abuf->fields.sfmt_jl.f
1575 
  int UNUSED written = 0;
1576 
  IADDR UNUSED pc = abuf->addr;
1577 
  SEM_BRANCH_INIT
1578 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1579 
 
1580 
if (NOTBI (CPU (h_cond))) {
1581 
  {
1582 
    USI opval = ANDSI (* FLD (i_sr), -4);
1583 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1584 
    written |= (1 << 2);
1585 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1586 
  }
1587 
}
1588 
 
1589 
  abuf->written = written;
1590 
  SEM_BRANCH_FINI (vpc);
1591 
#undef FLD
1592 
}
1593 
  NEXT (vpc);
1594 
 
1595 
  CASE (sem, INSN_JL) : /* jl $sr */
1596 
{
1597 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1598 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1599 
#define FLD(f) abuf->fields.sfmt_jl.f
1600 
  int UNUSED written = 0;
1601 
  IADDR UNUSED pc = abuf->addr;
1602 
  SEM_BRANCH_INIT
1603 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1604 
 
1605 
{
1606 
  SI temp0;USI temp1;
1607 
  temp0 = ADDSI (ANDSI (pc, -4), 4);
1608 
  temp1 = ANDSI (* FLD (i_sr), -4);
1609 
  {
1610 
    SI opval = temp0;
1611 
    CPU (h_gr[((UINT) 14)]) = opval;
1612 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1613 
  }
1614 
  {
1615 
    USI opval = temp1;
1616 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1617 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1618 
  }
1619 
}
1620 
 
1621 
  SEM_BRANCH_FINI (vpc);
1622 
#undef FLD
1623 
}
1624 
  NEXT (vpc);
1625 
 
1626 
  CASE (sem, INSN_JMP) : /* jmp $sr */
1627 
{
1628 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1629 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1630 
#define FLD(f) abuf->fields.sfmt_jl.f
1631 
  int UNUSED written = 0;
1632 
  IADDR UNUSED pc = abuf->addr;
1633 
  SEM_BRANCH_INIT
1634 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1635 
 
1636 
  {
1637 
    USI opval = ANDSI (* FLD (i_sr), -4);
1638 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1639 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1640 
  }
1641 
 
1642 
  SEM_BRANCH_FINI (vpc);
1643 
#undef FLD
1644 
}
1645 
  NEXT (vpc);
1646 
 
1647 
  CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1648 
{
1649 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1650 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1651 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1652 
  int UNUSED written = 0;
1653 
  IADDR UNUSED pc = abuf->addr;
1654 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1655 
 
1656 
  {
1657 
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1658 
    * FLD (i_dr) = opval;
1659 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1660 
  }
1661 
 
1662 
#undef FLD
1663 
}
1664 
  NEXT (vpc);
1665 
 
1666 
  CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1667 
{
1668 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1669 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1670 
#define FLD(f) abuf->fields.sfmt_add3.f
1671 
  int UNUSED written = 0;
1672 
  IADDR UNUSED pc = abuf->addr;
1673 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1674 
 
1675 
  {
1676 
    SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1677 
    * FLD (i_dr) = opval;
1678 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1679 
  }
1680 
 
1681 
#undef FLD
1682 
}
1683 
  NEXT (vpc);
1684 
 
1685 
  CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1686 
{
1687 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1688 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1689 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1690 
  int UNUSED written = 0;
1691 
  IADDR UNUSED pc = abuf->addr;
1692 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1693 
 
1694 
  {
1695 
    SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1696 
    * FLD (i_dr) = opval;
1697 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1698 
  }
1699 
 
1700 
#undef FLD
1701 
}
1702 
  NEXT (vpc);
1703 
 
1704 
  CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1705 
{
1706 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1707 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1708 
#define FLD(f) abuf->fields.sfmt_add3.f
1709 
  int UNUSED written = 0;
1710 
  IADDR UNUSED pc = abuf->addr;
1711 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1712 
 
1713 
  {
1714 
    SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1715 
    * FLD (i_dr) = opval;
1716 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1717 
  }
1718 
 
1719 
#undef FLD
1720 
}
1721 
  NEXT (vpc);
1722 
 
1723 
  CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1724 
{
1725 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1726 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1727 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1728 
  int UNUSED written = 0;
1729 
  IADDR UNUSED pc = abuf->addr;
1730 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1731 
 
1732 
  {
1733 
    SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1734 
    * FLD (i_dr) = opval;
1735 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1736 
  }
1737 
 
1738 
#undef FLD
1739 
}
1740 
  NEXT (vpc);
1741 
 
1742 
  CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1743 
{
1744 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1745 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1746 
#define FLD(f) abuf->fields.sfmt_add3.f
1747 
  int UNUSED written = 0;
1748 
  IADDR UNUSED pc = abuf->addr;
1749 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1750 
 
1751 
  {
1752 
    SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1753 
    * FLD (i_dr) = opval;
1754 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1755 
  }
1756 
 
1757 
#undef FLD
1758 
}
1759 
  NEXT (vpc);
1760 
 
1761 
  CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1762 
{
1763 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1764 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1765 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1766 
  int UNUSED written = 0;
1767 
  IADDR UNUSED pc = abuf->addr;
1768 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1769 
 
1770 
  {
1771 
    SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1772 
    * FLD (i_dr) = opval;
1773 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1774 
  }
1775 
 
1776 
#undef FLD
1777 
}
1778 
  NEXT (vpc);
1779 
 
1780 
  CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1781 
{
1782 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1783 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1784 
#define FLD(f) abuf->fields.sfmt_add3.f
1785 
  int UNUSED written = 0;
1786 
  IADDR UNUSED pc = abuf->addr;
1787 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1788 
 
1789 
  {
1790 
    SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1791 
    * FLD (i_dr) = opval;
1792 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1793 
  }
1794 
 
1795 
#undef FLD
1796 
}
1797 
  NEXT (vpc);
1798 
 
1799 
  CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1800 
{
1801 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1802 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1803 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1804 
  int UNUSED written = 0;
1805 
  IADDR UNUSED pc = abuf->addr;
1806 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1807 
 
1808 
  {
1809 
    SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1810 
    * FLD (i_dr) = opval;
1811 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1812 
  }
1813 
 
1814 
#undef FLD
1815 
}
1816 
  NEXT (vpc);
1817 
 
1818 
  CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1819 
{
1820 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1821 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1822 
#define FLD(f) abuf->fields.sfmt_add3.f
1823 
  int UNUSED written = 0;
1824 
  IADDR UNUSED pc = abuf->addr;
1825 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1826 
 
1827 
  {
1828 
    SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1829 
    * FLD (i_dr) = opval;
1830 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1831 
  }
1832 
 
1833 
#undef FLD
1834 
}
1835 
  NEXT (vpc);
1836 
 
1837 
  CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
1838 
{
1839 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1840 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1841 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1842 
  int UNUSED written = 0;
1843 
  IADDR UNUSED pc = abuf->addr;
1844 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1845 
 
1846 
{
1847 
  SI temp0;SI temp1;
1848 
  temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1849 
  temp1 = ADDSI (* FLD (i_sr), 4);
1850 
  {
1851 
    SI opval = temp0;
1852 
    * FLD (i_dr) = opval;
1853 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1854 
  }
1855 
  {
1856 
    SI opval = temp1;
1857 
    * FLD (i_sr) = opval;
1858 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1859 
  }
1860 
}
1861 
 
1862 
#undef FLD
1863 
}
1864 
  NEXT (vpc);
1865 
 
1866 
  CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
1867 
{
1868 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1869 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1870 
#define FLD(f) abuf->fields.sfmt_ld24.f
1871 
  int UNUSED written = 0;
1872 
  IADDR UNUSED pc = abuf->addr;
1873 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1874 
 
1875 
  {
1876 
    SI opval = FLD (i_uimm24);
1877 
    * FLD (i_dr) = opval;
1878 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1879 
  }
1880 
 
1881 
#undef FLD
1882 
}
1883 
  NEXT (vpc);
1884 
 
1885 
  CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
1886 
{
1887 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1888 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1889 
#define FLD(f) abuf->fields.sfmt_addi.f
1890 
  int UNUSED written = 0;
1891 
  IADDR UNUSED pc = abuf->addr;
1892 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1893 
 
1894 
  {
1895 
    SI opval = FLD (f_simm8);
1896 
    * FLD (i_dr) = opval;
1897 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1898 
  }
1899 
 
1900 
#undef FLD
1901 
}
1902 
  NEXT (vpc);
1903 
 
1904 
  CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
1905 
{
1906 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1907 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1908 
#define FLD(f) abuf->fields.sfmt_add3.f
1909 
  int UNUSED written = 0;
1910 
  IADDR UNUSED pc = abuf->addr;
1911 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1912 
 
1913 
  {
1914 
    SI opval = FLD (f_simm16);
1915 
    * FLD (i_dr) = opval;
1916 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1917 
  }
1918 
 
1919 
#undef FLD
1920 
}
1921 
  NEXT (vpc);
1922 
 
1923 
  CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
1924 
{
1925 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1926 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1927 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1928 
  int UNUSED written = 0;
1929 
  IADDR UNUSED pc = abuf->addr;
1930 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1931 
 
1932 
{
1933 
  {
1934 
    BI opval = 1;
1935 
    CPU (h_lock) = opval;
1936 
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1937 
  }
1938 
  {
1939 
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1940 
    * FLD (i_dr) = opval;
1941 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1942 
  }
1943 
}
1944 
 
1945 
#undef FLD
1946 
}
1947 
  NEXT (vpc);
1948 
 
1949 
  CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
1950 
{
1951 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1952 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1953 
#define FLD(f) abuf->fields.sfmt_machi_a.f
1954 
  int UNUSED written = 0;
1955 
  IADDR UNUSED pc = abuf->addr;
1956 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1957 
 
1958 
  {
1959 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1960 
    SET_H_ACCUMS (FLD (f_acc), opval);
1961 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1962 
  }
1963 
 
1964 
#undef FLD
1965 
}
1966 
  NEXT (vpc);
1967 
 
1968 
  CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
1969 
{
1970 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1971 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1972 
#define FLD(f) abuf->fields.sfmt_machi_a.f
1973 
  int UNUSED written = 0;
1974 
  IADDR UNUSED pc = abuf->addr;
1975 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1976 
 
1977 
  {
1978 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1979 
    SET_H_ACCUMS (FLD (f_acc), opval);
1980 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1981 
  }
1982 
 
1983 
#undef FLD
1984 
}
1985 
  NEXT (vpc);
1986 
 
1987 
  CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
1988 
{
1989 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1990 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1991 
#define FLD(f) abuf->fields.sfmt_machi_a.f
1992 
  int UNUSED written = 0;
1993 
  IADDR UNUSED pc = abuf->addr;
1994 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1995 
 
1996 
  {
1997 
    DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
1998 
    SET_H_ACCUMS (FLD (f_acc), opval);
1999 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2000 
  }
2001 
 
2002 
#undef FLD
2003 
}
2004 
  NEXT (vpc);
2005 
 
2006 
  CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
2007 
{
2008 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2009 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2010 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2011 
  int UNUSED written = 0;
2012 
  IADDR UNUSED pc = abuf->addr;
2013 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2014 
 
2015 
  {
2016 
    DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
2017 
    SET_H_ACCUMS (FLD (f_acc), opval);
2018 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2019 
  }
2020 
 
2021 
#undef FLD
2022 
}
2023 
  NEXT (vpc);
2024 
 
2025 
  CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2026 
{
2027 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2028 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2029 
#define FLD(f) abuf->fields.sfmt_add.f
2030 
  int UNUSED written = 0;
2031 
  IADDR UNUSED pc = abuf->addr;
2032 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2033 
 
2034 
  {
2035 
    SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2036 
    * FLD (i_dr) = opval;
2037 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2038 
  }
2039 
 
2040 
#undef FLD
2041 
}
2042 
  NEXT (vpc);
2043 
 
2044 
  CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2045 
{
2046 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2047 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2048 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2049 
  int UNUSED written = 0;
2050 
  IADDR UNUSED pc = abuf->addr;
2051 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2052 
 
2053 
  {
2054 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2055 
    SET_H_ACCUMS (FLD (f_acc), opval);
2056 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2057 
  }
2058 
 
2059 
#undef FLD
2060 
}
2061 
  NEXT (vpc);
2062 
 
2063 
  CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2064 
{
2065 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2066 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2067 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2068 
  int UNUSED written = 0;
2069 
  IADDR UNUSED pc = abuf->addr;
2070 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2071 
 
2072 
  {
2073 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2074 
    SET_H_ACCUMS (FLD (f_acc), opval);
2075 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2076 
  }
2077 
 
2078 
#undef FLD
2079 
}
2080 
  NEXT (vpc);
2081 
 
2082 
  CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2083 
{
2084 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2085 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2086 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2087 
  int UNUSED written = 0;
2088 
  IADDR UNUSED pc = abuf->addr;
2089 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2090 
 
2091 
  {
2092 
    DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2093 
    SET_H_ACCUMS (FLD (f_acc), opval);
2094 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2095 
  }
2096 
 
2097 
#undef FLD
2098 
}
2099 
  NEXT (vpc);
2100 
 
2101 
  CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2102 
{
2103 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2104 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2105 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2106 
  int UNUSED written = 0;
2107 
  IADDR UNUSED pc = abuf->addr;
2108 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2109 
 
2110 
  {
2111 
    DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2112 
    SET_H_ACCUMS (FLD (f_acc), opval);
2113 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2114 
  }
2115 
 
2116 
#undef FLD
2117 
}
2118 
  NEXT (vpc);
2119 
 
2120 
  CASE (sem, INSN_MV) : /* mv $dr,$sr */
2121 
{
2122 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2123 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2124 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2125 
  int UNUSED written = 0;
2126 
  IADDR UNUSED pc = abuf->addr;
2127 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2128 
 
2129 
  {
2130 
    SI opval = * FLD (i_sr);
2131 
    * FLD (i_dr) = opval;
2132 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2133 
  }
2134 
 
2135 
#undef FLD
2136 
}
2137 
  NEXT (vpc);
2138 
 
2139 
  CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2140 
{
2141 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2142 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2143 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2144 
  int UNUSED written = 0;
2145 
  IADDR UNUSED pc = abuf->addr;
2146 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2147 
 
2148 
  {
2149 
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
2150 
    * FLD (i_dr) = opval;
2151 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2152 
  }
2153 
 
2154 
#undef FLD
2155 
}
2156 
  NEXT (vpc);
2157 
 
2158 
  CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2159 
{
2160 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2161 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2162 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2163 
  int UNUSED written = 0;
2164 
  IADDR UNUSED pc = abuf->addr;
2165 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2166 
 
2167 
  {
2168 
    SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
2169 
    * FLD (i_dr) = opval;
2170 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2171 
  }
2172 
 
2173 
#undef FLD
2174 
}
2175 
  NEXT (vpc);
2176 
 
2177 
  CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2178 
{
2179 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2180 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2181 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2182 
  int UNUSED written = 0;
2183 
  IADDR UNUSED pc = abuf->addr;
2184 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2185 
 
2186 
  {
2187 
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
2188 
    * FLD (i_dr) = opval;
2189 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2190 
  }
2191 
 
2192 
#undef FLD
2193 
}
2194 
  NEXT (vpc);
2195 
 
2196 
  CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2197 
{
2198 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2199 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2200 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2201 
  int UNUSED written = 0;
2202 
  IADDR UNUSED pc = abuf->addr;
2203 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2204 
 
2205 
  {
2206 
    SI opval = GET_H_CR (FLD (f_r2));
2207 
    * FLD (i_dr) = opval;
2208 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2209 
  }
2210 
 
2211 
#undef FLD
2212 
}
2213 
  NEXT (vpc);
2214 
 
2215 
  CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2216 
{
2217 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2218 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2219 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2220 
  int UNUSED written = 0;
2221 
  IADDR UNUSED pc = abuf->addr;
2222 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2223 
 
2224 
  {
2225 
    DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2226 
    SET_H_ACCUMS (FLD (f_accs), opval);
2227 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2228 
  }
2229 
 
2230 
#undef FLD
2231 
}
2232 
  NEXT (vpc);
2233 
 
2234 
  CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2235 
{
2236 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2237 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2238 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2239 
  int UNUSED written = 0;
2240 
  IADDR UNUSED pc = abuf->addr;
2241 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2242 
 
2243 
  {
2244 
    DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2245 
    SET_H_ACCUMS (FLD (f_accs), opval);
2246 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2247 
  }
2248 
 
2249 
#undef FLD
2250 
}
2251 
  NEXT (vpc);
2252 
 
2253 
  CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2254 
{
2255 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2256 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2257 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2258 
  int UNUSED written = 0;
2259 
  IADDR UNUSED pc = abuf->addr;
2260 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2261 
 
2262 
  {
2263 
    USI opval = * FLD (i_sr);
2264 
    SET_H_CR (FLD (f_r1), opval);
2265 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2266 
  }
2267 
 
2268 
#undef FLD
2269 
}
2270 
  NEXT (vpc);
2271 
 
2272 
  CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2273 
{
2274 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2275 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2276 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2277 
  int UNUSED written = 0;
2278 
  IADDR UNUSED pc = abuf->addr;
2279 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2280 
 
2281 
  {
2282 
    SI opval = NEGSI (* FLD (i_sr));
2283 
    * FLD (i_dr) = opval;
2284 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2285 
  }
2286 
 
2287 
#undef FLD
2288 
}
2289 
  NEXT (vpc);
2290 
 
2291 
  CASE (sem, INSN_NOP) : /* nop */
2292 
{
2293 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2294 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2295 
#define FLD(f) abuf->fields.sfmt_empty.f
2296 
  int UNUSED written = 0;
2297 
  IADDR UNUSED pc = abuf->addr;
2298 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2299 
 
2300 
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2301 
 
2302 
#undef FLD
2303 
}
2304 
  NEXT (vpc);
2305 
 
2306 
  CASE (sem, INSN_NOT) : /* not $dr,$sr */
2307 
{
2308 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2309 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2311 
  int UNUSED written = 0;
2312 
  IADDR UNUSED pc = abuf->addr;
2313 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2314 
 
2315 
  {
2316 
    SI opval = INVSI (* FLD (i_sr));
2317 
    * FLD (i_dr) = opval;
2318 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2319 
  }
2320 
 
2321 
#undef FLD
2322 
}
2323 
  NEXT (vpc);
2324 
 
2325 
  CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2326 
{
2327 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2328 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2329 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
2330 
  int UNUSED written = 0;
2331 
  IADDR UNUSED pc = abuf->addr;
2332 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2333 
 
2334 
{
2335 
  DI tmp_tmp1;
2336 
  tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2337 
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2338 
  {
2339 
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2340 
    SET_H_ACCUMS (FLD (f_accd), opval);
2341 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2342 
  }
2343 
}
2344 
 
2345 
#undef FLD
2346 
}
2347 
  NEXT (vpc);
2348 
 
2349 
  CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2350 
{
2351 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2352 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2353 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
2354 
  int UNUSED written = 0;
2355 
  IADDR UNUSED pc = abuf->addr;
2356 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2357 
 
2358 
{
2359 
  DI tmp_tmp1;
2360 
  tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2361 
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2362 
  {
2363 
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2364 
    SET_H_ACCUMS (FLD (f_accd), opval);
2365 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2366 
  }
2367 
}
2368 
 
2369 
#undef FLD
2370 
}
2371 
  NEXT (vpc);
2372 
 
2373 
  CASE (sem, INSN_RTE) : /* rte */
2374 
{
2375 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2376 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2377 
#define FLD(f) abuf->fields.sfmt_empty.f
2378 
  int UNUSED written = 0;
2379 
  IADDR UNUSED pc = abuf->addr;
2380 
  SEM_BRANCH_INIT
2381 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2382 
 
2383 
{
2384 
  {
2385 
    USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
2386 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2387 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2388 
  }
2389 
  {
2390 
    USI opval = GET_H_CR (((UINT) 14));
2391 
    SET_H_CR (((UINT) 6), opval);
2392 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2393 
  }
2394 
  {
2395 
    UQI opval = CPU (h_bpsw);
2396 
    SET_H_PSW (opval);
2397 
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2398 
  }
2399 
  {
2400 
    UQI opval = CPU (h_bbpsw);
2401 
    CPU (h_bpsw) = opval;
2402 
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2403 
  }
2404 
}
2405 
 
2406 
  SEM_BRANCH_FINI (vpc);
2407 
#undef FLD
2408 
}
2409 
  NEXT (vpc);
2410 
 
2411 
  CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2412 
{
2413 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2414 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2415 
#define FLD(f) abuf->fields.sfmt_seth.f
2416 
  int UNUSED written = 0;
2417 
  IADDR UNUSED pc = abuf->addr;
2418 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2419 
 
2420 
  {
2421 
    SI opval = SLLSI (FLD (f_hi16), 16);
2422 
    * FLD (i_dr) = opval;
2423 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2424 
  }
2425 
 
2426 
#undef FLD
2427 
}
2428 
  NEXT (vpc);
2429 
 
2430 
  CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2431 
{
2432 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2433 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2434 
#define FLD(f) abuf->fields.sfmt_add.f
2435 
  int UNUSED written = 0;
2436 
  IADDR UNUSED pc = abuf->addr;
2437 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2438 
 
2439 
  {
2440 
    SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2441 
    * FLD (i_dr) = opval;
2442 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2443 
  }
2444 
 
2445 
#undef FLD
2446 
}
2447 
  NEXT (vpc);
2448 
 
2449 
  CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2450 
{
2451 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2452 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2453 
#define FLD(f) abuf->fields.sfmt_add3.f
2454 
  int UNUSED written = 0;
2455 
  IADDR UNUSED pc = abuf->addr;
2456 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2457 
 
2458 
  {
2459 
    SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2460 
    * FLD (i_dr) = opval;
2461 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2462 
  }
2463 
 
2464 
#undef FLD
2465 
}
2466 
  NEXT (vpc);
2467 
 
2468 
  CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2469 
{
2470 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2471 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2472 
#define FLD(f) abuf->fields.sfmt_slli.f
2473 
  int UNUSED written = 0;
2474 
  IADDR UNUSED pc = abuf->addr;
2475 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2476 
 
2477 
  {
2478 
    SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2479 
    * FLD (i_dr) = opval;
2480 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2481 
  }
2482 
 
2483 
#undef FLD
2484 
}
2485 
  NEXT (vpc);
2486 
 
2487 
  CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2488 
{
2489 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2490 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2491 
#define FLD(f) abuf->fields.sfmt_add.f
2492 
  int UNUSED written = 0;
2493 
  IADDR UNUSED pc = abuf->addr;
2494 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2495 
 
2496 
  {
2497 
    SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2498 
    * FLD (i_dr) = opval;
2499 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2500 
  }
2501 
 
2502 
#undef FLD
2503 
}
2504 
  NEXT (vpc);
2505 
 
2506 
  CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2507 
{
2508 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2509 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2510 
#define FLD(f) abuf->fields.sfmt_add3.f
2511 
  int UNUSED written = 0;
2512 
  IADDR UNUSED pc = abuf->addr;
2513 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2514 
 
2515 
  {
2516 
    SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2517 
    * FLD (i_dr) = opval;
2518 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2519 
  }
2520 
 
2521 
#undef FLD
2522 
}
2523 
  NEXT (vpc);
2524 
 
2525 
  CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2526 
{
2527 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2528 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2529 
#define FLD(f) abuf->fields.sfmt_slli.f
2530 
  int UNUSED written = 0;
2531 
  IADDR UNUSED pc = abuf->addr;
2532 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2533 
 
2534 
  {
2535 
    SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2536 
    * FLD (i_dr) = opval;
2537 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2538 
  }
2539 
 
2540 
#undef FLD
2541 
}
2542 
  NEXT (vpc);
2543 
 
2544 
  CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2545 
{
2546 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2547 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2548 
#define FLD(f) abuf->fields.sfmt_add.f
2549 
  int UNUSED written = 0;
2550 
  IADDR UNUSED pc = abuf->addr;
2551 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2552 
 
2553 
  {
2554 
    SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2555 
    * FLD (i_dr) = opval;
2556 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2557 
  }
2558 
 
2559 
#undef FLD
2560 
}
2561 
  NEXT (vpc);
2562 
 
2563 
  CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2564 
{
2565 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2566 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2567 
#define FLD(f) abuf->fields.sfmt_add3.f
2568 
  int UNUSED written = 0;
2569 
  IADDR UNUSED pc = abuf->addr;
2570 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2571 
 
2572 
  {
2573 
    SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2574 
    * FLD (i_dr) = opval;
2575 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2576 
  }
2577 
 
2578 
#undef FLD
2579 
}
2580 
  NEXT (vpc);
2581 
 
2582 
  CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2583 
{
2584 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2585 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2586 
#define FLD(f) abuf->fields.sfmt_slli.f
2587 
  int UNUSED written = 0;
2588 
  IADDR UNUSED pc = abuf->addr;
2589 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2590 
 
2591 
  {
2592 
    SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2593 
    * FLD (i_dr) = opval;
2594 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2595 
  }
2596 
 
2597 
#undef FLD
2598 
}
2599 
  NEXT (vpc);
2600 
 
2601 
  CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2602 
{
2603 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2604 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2605 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2606 
  int UNUSED written = 0;
2607 
  IADDR UNUSED pc = abuf->addr;
2608 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2609 
 
2610 
  {
2611 
    SI opval = * FLD (i_src1);
2612 
    SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2613 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2614 
  }
2615 
 
2616 
#undef FLD
2617 
}
2618 
  NEXT (vpc);
2619 
 
2620 
  CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2621 
{
2622 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2623 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2624 
#define FLD(f) abuf->fields.sfmt_st_d.f
2625 
  int UNUSED written = 0;
2626 
  IADDR UNUSED pc = abuf->addr;
2627 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2628 
 
2629 
  {
2630 
    SI opval = * FLD (i_src1);
2631 
    SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2632 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2633 
  }
2634 
 
2635 
#undef FLD
2636 
}
2637 
  NEXT (vpc);
2638 
 
2639 
  CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2640 
{
2641 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2642 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2643 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2644 
  int UNUSED written = 0;
2645 
  IADDR UNUSED pc = abuf->addr;
2646 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2647 
 
2648 
  {
2649 
    QI opval = * FLD (i_src1);
2650 
    SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2651 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2652 
  }
2653 
 
2654 
#undef FLD
2655 
}
2656 
  NEXT (vpc);
2657 
 
2658 
  CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2659 
{
2660 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2661 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2662 
#define FLD(f) abuf->fields.sfmt_st_d.f
2663 
  int UNUSED written = 0;
2664 
  IADDR UNUSED pc = abuf->addr;
2665 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2666 
 
2667 
  {
2668 
    QI opval = * FLD (i_src1);
2669 
    SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2670 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2671 
  }
2672 
 
2673 
#undef FLD
2674 
}
2675 
  NEXT (vpc);
2676 
 
2677 
  CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2678 
{
2679 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2680 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2681 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2682 
  int UNUSED written = 0;
2683 
  IADDR UNUSED pc = abuf->addr;
2684 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2685 
 
2686 
  {
2687 
    HI opval = * FLD (i_src1);
2688 
    SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2689 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2690 
  }
2691 
 
2692 
#undef FLD
2693 
}
2694 
  NEXT (vpc);
2695 
 
2696 
  CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2697 
{
2698 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2699 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2700 
#define FLD(f) abuf->fields.sfmt_st_d.f
2701 
  int UNUSED written = 0;
2702 
  IADDR UNUSED pc = abuf->addr;
2703 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2704 
 
2705 
  {
2706 
    HI opval = * FLD (i_src1);
2707 
    SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2708 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2709 
  }
2710 
 
2711 
#undef FLD
2712 
}
2713 
  NEXT (vpc);
2714 
 
2715 
  CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2716 
{
2717 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2718 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2719 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2720 
  int UNUSED written = 0;
2721 
  IADDR UNUSED pc = abuf->addr;
2722 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2723 
 
2724 
{
2725 
  SI tmp_new_src2;
2726 
  tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2727 
  {
2728 
    SI opval = * FLD (i_src1);
2729 
    SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2730 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2731 
  }
2732 
  {
2733 
    SI opval = tmp_new_src2;
2734 
    * FLD (i_src2) = opval;
2735 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2736 
  }
2737 
}
2738 
 
2739 
#undef FLD
2740 
}
2741 
  NEXT (vpc);
2742 
 
2743 
  CASE (sem, INSN_STH_PLUS) : /* sth $src1,@$src2+ */
2744 
{
2745 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2746 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2747 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2748 
  int UNUSED written = 0;
2749 
  IADDR UNUSED pc = abuf->addr;
2750 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2751 
 
2752 
{
2753 
  SI tmp_new_src2;
2754 
  tmp_new_src2 = * FLD (i_src2);
2755 
  {
2756 
    HI opval = * FLD (i_src1);
2757 
    SETMEMHI (current_cpu, pc, tmp_new_src2, opval);
2758 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2759 
  }
2760 
  {
2761 
    SI opval = ADDSI (tmp_new_src2, 2);
2762 
    * FLD (i_src2) = opval;
2763 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2764 
  }
2765 
}
2766 
 
2767 
#undef FLD
2768 
}
2769 
  NEXT (vpc);
2770 
 
2771 
  CASE (sem, INSN_STB_PLUS) : /* stb $src1,@$src2+ */
2772 
{
2773 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2774 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2775 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2776 
  int UNUSED written = 0;
2777 
  IADDR UNUSED pc = abuf->addr;
2778 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2779 
 
2780 
{
2781 
  SI tmp_new_src2;
2782 
  tmp_new_src2 = * FLD (i_src2);
2783 
  {
2784 
    QI opval = * FLD (i_src1);
2785 
    SETMEMQI (current_cpu, pc, tmp_new_src2, opval);
2786 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2787 
  }
2788 
  {
2789 
    SI opval = ADDSI (tmp_new_src2, 1);
2790 
    * FLD (i_src2) = opval;
2791 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2792 
  }
2793 
}
2794 
 
2795 
#undef FLD
2796 
}
2797 
  NEXT (vpc);
2798 
 
2799 
  CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2800 
{
2801 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2802 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2803 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2804 
  int UNUSED written = 0;
2805 
  IADDR UNUSED pc = abuf->addr;
2806 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2807 
 
2808 
{
2809 
  SI tmp_new_src2;
2810 
  tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2811 
  {
2812 
    SI opval = * FLD (i_src1);
2813 
    SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2814 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2815 
  }
2816 
  {
2817 
    SI opval = tmp_new_src2;
2818 
    * FLD (i_src2) = opval;
2819 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2820 
  }
2821 
}
2822 
 
2823 
#undef FLD
2824 
}
2825 
  NEXT (vpc);
2826 
 
2827 
  CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2828 
{
2829 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2830 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2831 
#define FLD(f) abuf->fields.sfmt_add.f
2832 
  int UNUSED written = 0;
2833 
  IADDR UNUSED pc = abuf->addr;
2834 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2835 
 
2836 
  {
2837 
    SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2838 
    * FLD (i_dr) = opval;
2839 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2840 
  }
2841 
 
2842 
#undef FLD
2843 
}
2844 
  NEXT (vpc);
2845 
 
2846 
  CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
2847 
{
2848 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2849 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2850 
#define FLD(f) abuf->fields.sfmt_add.f
2851 
  int UNUSED written = 0;
2852 
  IADDR UNUSED pc = abuf->addr;
2853 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2854 
 
2855 
{
2856 
  SI temp0;BI temp1;
2857 
  temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2858 
  temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2859 
  {
2860 
    SI opval = temp0;
2861 
    * FLD (i_dr) = opval;
2862 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2863 
  }
2864 
  {
2865 
    BI opval = temp1;
2866 
    CPU (h_cond) = opval;
2867 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2868 
  }
2869 
}
2870 
 
2871 
#undef FLD
2872 
}
2873 
  NEXT (vpc);
2874 
 
2875 
  CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
2876 
{
2877 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2878 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2879 
#define FLD(f) abuf->fields.sfmt_add.f
2880 
  int UNUSED written = 0;
2881 
  IADDR UNUSED pc = abuf->addr;
2882 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2883 
 
2884 
{
2885 
  SI temp0;BI temp1;
2886 
  temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2887 
  temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2888 
  {
2889 
    SI opval = temp0;
2890 
    * FLD (i_dr) = opval;
2891 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2892 
  }
2893 
  {
2894 
    BI opval = temp1;
2895 
    CPU (h_cond) = opval;
2896 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2897 
  }
2898 
}
2899 
 
2900 
#undef FLD
2901 
}
2902 
  NEXT (vpc);
2903 
 
2904 
  CASE (sem, INSN_TRAP) : /* trap $uimm4 */
2905 
{
2906 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2907 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2908 
#define FLD(f) abuf->fields.sfmt_trap.f
2909 
  int UNUSED written = 0;
2910 
  IADDR UNUSED pc = abuf->addr;
2911 
  SEM_BRANCH_INIT
2912 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2913 
 
2914 
{
2915 
  {
2916 
    USI opval = GET_H_CR (((UINT) 6));
2917 
    SET_H_CR (((UINT) 14), opval);
2918 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2919 
  }
2920 
  {
2921 
    USI opval = ADDSI (pc, 4);
2922 
    SET_H_CR (((UINT) 6), opval);
2923 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2924 
  }
2925 
  {
2926 
    UQI opval = CPU (h_bpsw);
2927 
    CPU (h_bbpsw) = opval;
2928 
    TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2929 
  }
2930 
  {
2931 
    UQI opval = GET_H_PSW ();
2932 
    CPU (h_bpsw) = opval;
2933 
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2934 
  }
2935 
  {
2936 
    UQI opval = ANDQI (GET_H_PSW (), 128);
2937 
    SET_H_PSW (opval);
2938 
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2939 
  }
2940 
  {
2941 
    SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2942 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2943 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2944 
  }
2945 
}
2946 
 
2947 
  SEM_BRANCH_FINI (vpc);
2948 
#undef FLD
2949 
}
2950 
  NEXT (vpc);
2951 
 
2952 
  CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
2953 
{
2954 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2955 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2956 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2957 
  int UNUSED written = 0;
2958 
  IADDR UNUSED pc = abuf->addr;
2959 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2960 
 
2961 
{
2962 
if (CPU (h_lock)) {
2963 
  {
2964 
    SI opval = * FLD (i_src1);
2965 
    SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2966 
    written |= (1 << 4);
2967 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2968 
  }
2969 
}
2970 
  {
2971 
    BI opval = 0;
2972 
    CPU (h_lock) = opval;
2973 
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2974 
  }
2975 
}
2976 
 
2977 
  abuf->written = written;
2978 
#undef FLD
2979 
}
2980 
  NEXT (vpc);
2981 
 
2982 
  CASE (sem, INSN_SATB) : /* satb $dr,$sr */
2983 
{
2984 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2985 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2986 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2987 
  int UNUSED written = 0;
2988 
  IADDR UNUSED pc = abuf->addr;
2989 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2990 
 
2991 
  {
2992 
    SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
2993 
    * FLD (i_dr) = opval;
2994 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2995 
  }
2996 
 
2997 
#undef FLD
2998 
}
2999 
  NEXT (vpc);
3000 
 
3001 
  CASE (sem, INSN_SATH) : /* sath $dr,$sr */
3002 
{
3003 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3004 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3005 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
3006 
  int UNUSED written = 0;
3007 
  IADDR UNUSED pc = abuf->addr;
3008 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3009 
 
3010 
  {
3011 
    SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
3012 
    * FLD (i_dr) = opval;
3013 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3014 
  }
3015 
 
3016 
#undef FLD
3017 
}
3018 
  NEXT (vpc);
3019 
 
3020 
  CASE (sem, INSN_SAT) : /* sat $dr,$sr */
3021 
{
3022 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3023 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3024 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
3025 
  int UNUSED written = 0;
3026 
  IADDR UNUSED pc = abuf->addr;
3027 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3028 
 
3029 
  {
3030 
    SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
3031 
    * FLD (i_dr) = opval;
3032 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3033 
  }
3034 
 
3035 
#undef FLD
3036 
}
3037 
  NEXT (vpc);
3038 
 
3039 
  CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
3040 
{
3041 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3042 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3043 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3044 
  int UNUSED written = 0;
3045 
  IADDR UNUSED pc = abuf->addr;
3046 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3047 
 
3048 
  {
3049 
    BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
3050 
    CPU (h_cond) = opval;
3051 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3052 
  }
3053 
 
3054 
#undef FLD
3055 
}
3056 
  NEXT (vpc);
3057 
 
3058 
  CASE (sem, INSN_SADD) : /* sadd */
3059 
{
3060 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3061 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3062 
#define FLD(f) abuf->fields.sfmt_empty.f
3063 
  int UNUSED written = 0;
3064 
  IADDR UNUSED pc = abuf->addr;
3065 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3066 
 
3067 
  {
3068 
    DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
3069 
    SET_H_ACCUMS (((UINT) 0), opval);
3070 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3071 
  }
3072 
 
3073 
#undef FLD
3074 
}
3075 
  NEXT (vpc);
3076 
 
3077 
  CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
3078 
{
3079 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3080 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3081 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3082 
  int UNUSED written = 0;
3083 
  IADDR UNUSED pc = abuf->addr;
3084 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3085 
 
3086 
  {
3087 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3088 
    SET_H_ACCUMS (((UINT) 1), opval);
3089 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3090 
  }
3091 
 
3092 
#undef FLD
3093 
}
3094 
  NEXT (vpc);
3095 
 
3096 
  CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3097 
{
3098 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3099 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3100 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3101 
  int UNUSED written = 0;
3102 
  IADDR UNUSED pc = abuf->addr;
3103 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3104 
 
3105 
  {
3106 
    DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3107 
    SET_H_ACCUM (opval);
3108 
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3109 
  }
3110 
 
3111 
#undef FLD
3112 
}
3113 
  NEXT (vpc);
3114 
 
3115 
  CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3116 
{
3117 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3118 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3119 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3120 
  int UNUSED written = 0;
3121 
  IADDR UNUSED pc = abuf->addr;
3122 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3123 
 
3124 
  {
3125 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3126 
    SET_H_ACCUMS (((UINT) 1), opval);
3127 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3128 
  }
3129 
 
3130 
#undef FLD
3131 
}
3132 
  NEXT (vpc);
3133 
 
3134 
  CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3135 
{
3136 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3137 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3138 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3139 
  int UNUSED written = 0;
3140 
  IADDR UNUSED pc = abuf->addr;
3141 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3142 
 
3143 
  {
3144 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3145 
    SET_H_ACCUMS (((UINT) 1), opval);
3146 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3147 
  }
3148 
 
3149 
#undef FLD
3150 
}
3151 
  NEXT (vpc);
3152 
 
3153 
  CASE (sem, INSN_SC) : /* sc */
3154 
{
3155 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3156 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3157 
#define FLD(f) abuf->fields.sfmt_empty.f
3158 
  int UNUSED written = 0;
3159 
  IADDR UNUSED pc = abuf->addr;
3160 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3161 
 
3162 
if (ZEXTBISI (CPU (h_cond)))
3163 
  SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3164 
 
3165 
#undef FLD
3166 
}
3167 
  NEXT (vpc);
3168 
 
3169 
  CASE (sem, INSN_SNC) : /* snc */
3170 
{
3171 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3172 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3173 
#define FLD(f) abuf->fields.sfmt_empty.f
3174 
  int UNUSED written = 0;
3175 
  IADDR UNUSED pc = abuf->addr;
3176 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3177 
 
3178 
if (ZEXTBISI (NOTBI (CPU (h_cond))))
3179 
  SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3180 
 
3181 
#undef FLD
3182 
}
3183 
  NEXT (vpc);
3184 
 
3185 
  CASE (sem, INSN_CLRPSW) : /* clrpsw $uimm8 */
3186 
{
3187 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3188 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3189 
#define FLD(f) abuf->fields.sfmt_clrpsw.f
3190 
  int UNUSED written = 0;
3191 
  IADDR UNUSED pc = abuf->addr;
3192 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3193 
 
3194 
  {
3195 
    USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280));
3196 
    SET_H_CR (((UINT) 0), opval);
3197 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3198 
  }
3199 
 
3200 
#undef FLD
3201 
}
3202 
  NEXT (vpc);
3203 
 
3204 
  CASE (sem, INSN_SETPSW) : /* setpsw $uimm8 */
3205 
{
3206 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3207 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3208 
#define FLD(f) abuf->fields.sfmt_clrpsw.f
3209 
  int UNUSED written = 0;
3210 
  IADDR UNUSED pc = abuf->addr;
3211 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3212 
 
3213 
  {
3214 
    USI opval = FLD (f_uimm8);
3215 
    SET_H_CR (((UINT) 0), opval);
3216 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3217 
  }
3218 
 
3219 
#undef FLD
3220 
}
3221 
  NEXT (vpc);
3222 
 
3223 
  CASE (sem, INSN_BSET) : /* bset $uimm3,@($slo16,$sr) */
3224 
{
3225 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3226 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3227 
#define FLD(f) abuf->fields.sfmt_bset.f
3228 
  int UNUSED written = 0;
3229 
  IADDR UNUSED pc = abuf->addr;
3230 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3231 
 
3232 
  {
3233 
    QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLQI (1, SUBSI (7, FLD (f_uimm3))));
3234 
    SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3235 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3236 
  }
3237 
 
3238 
#undef FLD
3239 
}
3240 
  NEXT (vpc);
3241 
 
3242 
  CASE (sem, INSN_BCLR) : /* bclr $uimm3,@($slo16,$sr) */
3243 
{
3244 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3245 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3246 
#define FLD(f) abuf->fields.sfmt_bset.f
3247 
  int UNUSED written = 0;
3248 
  IADDR UNUSED pc = abuf->addr;
3249 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3250 
 
3251 
  {
3252 
    QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLQI (1, SUBSI (7, FLD (f_uimm3)))));
3253 
    SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3254 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3255 
  }
3256 
 
3257 
#undef FLD
3258 
}
3259 
  NEXT (vpc);
3260 
 
3261 
  CASE (sem, INSN_BTST) : /* btst $uimm3,$sr */
3262 
{
3263 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3264 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3265 
#define FLD(f) abuf->fields.sfmt_bset.f
3266 
  int UNUSED written = 0;
3267 
  IADDR UNUSED pc = abuf->addr;
3268 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3269 
 
3270 
  {
3271 
    BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
3272 
    CPU (h_cond) = opval;
3273 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3274 
  }
3275 
 
3276 
#undef FLD
3277 
}
3278 
  NEXT (vpc);
3279 
 
3280 
  CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3281 
{
3282 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3283 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3284 
#define FLD(f) abuf->fields.sfmt_add.f
3285 
#define OPRND(f) par_exec->operands.sfmt_add.f
3286 
  int UNUSED written = 0;
3287 
  IADDR UNUSED pc = abuf->addr;
3288 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3289 
 
3290 
  {
3291 
    SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3292 
    OPRND (dr) = opval;
3293 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3294 
  }
3295 
 
3296 
#undef OPRND
3297 
#undef FLD
3298 
}
3299 
  NEXT (vpc);
3300 
 
3301 
CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3302 
  {
3303 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3304 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3305 
#define FLD(f) abuf->fields.sfmt_add.f
3306 
#define OPRND(f) par_exec->operands.sfmt_add.f
3307 
    int UNUSED written = abuf->written;
3308 
    IADDR UNUSED pc = abuf->addr;
3309 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3310 
 
3311 
  * FLD (i_dr) = OPRND (dr);
3312 
 
3313 
#undef OPRND
3314 
#undef FLD
3315 
  }
3316 
  NEXT (vpc);
3317 
 
3318 
  CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3319 
{
3320 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3321 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3322 
#define FLD(f) abuf->fields.sfmt_add.f
3323 
#define OPRND(f) par_exec->operands.sfmt_add.f
3324 
  int UNUSED written = 0;
3325 
  IADDR UNUSED pc = abuf->addr;
3326 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3327 
 
3328 
  {
3329 
    SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3330 
    OPRND (dr) = opval;
3331 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3332 
  }
3333 
 
3334 
#undef OPRND
3335 
#undef FLD
3336 
}
3337 
  NEXT (vpc);
3338 
 
3339 
CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3340 
  {
3341 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3342 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3343 
#define FLD(f) abuf->fields.sfmt_add.f
3344 
#define OPRND(f) par_exec->operands.sfmt_add.f
3345 
    int UNUSED written = abuf->written;
3346 
    IADDR UNUSED pc = abuf->addr;
3347 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3348 
 
3349 
  * FLD (i_dr) = OPRND (dr);
3350 
 
3351 
#undef OPRND
3352 
#undef FLD
3353 
  }
3354 
  NEXT (vpc);
3355 
 
3356 
  CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3357 
{
3358 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3359 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3360 
#define FLD(f) abuf->fields.sfmt_add.f
3361 
#define OPRND(f) par_exec->operands.sfmt_add.f
3362 
  int UNUSED written = 0;
3363 
  IADDR UNUSED pc = abuf->addr;
3364 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3365 
 
3366 
  {
3367 
    SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3368 
    OPRND (dr) = opval;
3369 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3370 
  }
3371 
 
3372 
#undef OPRND
3373 
#undef FLD
3374 
}
3375 
  NEXT (vpc);
3376 
 
3377 
CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3378 
  {
3379 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3380 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3381 
#define FLD(f) abuf->fields.sfmt_add.f
3382 
#define OPRND(f) par_exec->operands.sfmt_add.f
3383 
    int UNUSED written = abuf->written;
3384 
    IADDR UNUSED pc = abuf->addr;
3385 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3386 
 
3387 
  * FLD (i_dr) = OPRND (dr);
3388 
 
3389 
#undef OPRND
3390 
#undef FLD
3391 
  }
3392 
  NEXT (vpc);
3393 
 
3394 
  CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3395 
{
3396 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3397 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3398 
#define FLD(f) abuf->fields.sfmt_add.f
3399 
#define OPRND(f) par_exec->operands.sfmt_add.f
3400 
  int UNUSED written = 0;
3401 
  IADDR UNUSED pc = abuf->addr;
3402 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3403 
 
3404 
  {
3405 
    SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3406 
    OPRND (dr) = opval;
3407 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3408 
  }
3409 
 
3410 
#undef OPRND
3411 
#undef FLD
3412 
}
3413 
  NEXT (vpc);
3414 
 
3415 
CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3416 
  {
3417 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3418 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3419 
#define FLD(f) abuf->fields.sfmt_add.f
3420 
#define OPRND(f) par_exec->operands.sfmt_add.f
3421 
    int UNUSED written = abuf->written;
3422 
    IADDR UNUSED pc = abuf->addr;
3423 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3424 
 
3425 
  * FLD (i_dr) = OPRND (dr);
3426 
 
3427 
#undef OPRND
3428 
#undef FLD
3429 
  }
3430 
  NEXT (vpc);
3431 
 
3432 
  CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3433 
{
3434 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3435 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3436 
#define FLD(f) abuf->fields.sfmt_addi.f
3437 
#define OPRND(f) par_exec->operands.sfmt_addi.f
3438 
  int UNUSED written = 0;
3439 
  IADDR UNUSED pc = abuf->addr;
3440 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3441 
 
3442 
  {
3443 
    SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3444 
    OPRND (dr) = opval;
3445 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3446 
  }
3447 
 
3448 
#undef OPRND
3449 
#undef FLD
3450 
}
3451 
  NEXT (vpc);
3452 
 
3453 
CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3454 
  {
3455 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3456 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3457 
#define FLD(f) abuf->fields.sfmt_addi.f
3458 
#define OPRND(f) par_exec->operands.sfmt_addi.f
3459 
    int UNUSED written = abuf->written;
3460 
    IADDR UNUSED pc = abuf->addr;
3461 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3462 
 
3463 
  * FLD (i_dr) = OPRND (dr);
3464 
 
3465 
#undef OPRND
3466 
#undef FLD
3467 
  }
3468 
  NEXT (vpc);
3469 
 
3470 
  CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3471 
{
3472 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3473 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3474 
#define FLD(f) abuf->fields.sfmt_add.f
3475 
#define OPRND(f) par_exec->operands.sfmt_addv.f
3476 
  int UNUSED written = 0;
3477 
  IADDR UNUSED pc = abuf->addr;
3478 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3479 
 
3480 
{
3481 
  SI temp0;BI temp1;
3482 
  temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3483 
  temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3484 
  {
3485 
    SI opval = temp0;
3486 
    OPRND (dr) = opval;
3487 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3488 
  }
3489 
  {
3490 
    BI opval = temp1;
3491 
    OPRND (condbit) = opval;
3492 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3493 
  }
3494 
}
3495 
 
3496 
#undef OPRND
3497 
#undef FLD
3498 
}
3499 
  NEXT (vpc);
3500 
 
3501 
CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3502 
  {
3503 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3504 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3505 
#define FLD(f) abuf->fields.sfmt_add.f
3506 
#define OPRND(f) par_exec->operands.sfmt_addv.f
3507 
    int UNUSED written = abuf->written;
3508 
    IADDR UNUSED pc = abuf->addr;
3509 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3510 
 
3511 
  CPU (h_cond) = OPRND (condbit);
3512 
  * FLD (i_dr) = OPRND (dr);
3513 
 
3514 
#undef OPRND
3515 
#undef FLD
3516 
  }
3517 
  NEXT (vpc);
3518 
 
3519 
  CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3520 
{
3521 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3522 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3523 
#define FLD(f) abuf->fields.sfmt_add.f
3524 
#define OPRND(f) par_exec->operands.sfmt_addx.f
3525 
  int UNUSED written = 0;
3526 
  IADDR UNUSED pc = abuf->addr;
3527 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3528 
 
3529 
{
3530 
  SI temp0;BI temp1;
3531 
  temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3532 
  temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3533 
  {
3534 
    SI opval = temp0;
3535 
    OPRND (dr) = opval;
3536 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3537 
  }
3538 
  {
3539 
    BI opval = temp1;
3540 
    OPRND (condbit) = opval;
3541 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3542 
  }
3543 
}
3544 
 
3545 
#undef OPRND
3546 
#undef FLD
3547 
}
3548 
  NEXT (vpc);
3549 
 
3550 
CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3551 
  {
3552 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3553 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3554 
#define FLD(f) abuf->fields.sfmt_add.f
3555 
#define OPRND(f) par_exec->operands.sfmt_addx.f
3556 
    int UNUSED written = abuf->written;
3557 
    IADDR UNUSED pc = abuf->addr;
3558 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3559 
 
3560 
  CPU (h_cond) = OPRND (condbit);
3561 
  * FLD (i_dr) = OPRND (dr);
3562 
 
3563 
#undef OPRND
3564 
#undef FLD
3565 
  }
3566 
  NEXT (vpc);
3567 
 
3568 
  CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3569 
{
3570 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3571 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3572 
#define FLD(f) abuf->fields.sfmt_bl8.f
3573 
#define OPRND(f) par_exec->operands.sfmt_bc8.f
3574 
  int UNUSED written = 0;
3575 
  IADDR UNUSED pc = abuf->addr;
3576 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3577 
 
3578 
if (CPU (h_cond)) {
3579 
  {
3580 
    USI opval = FLD (i_disp8);
3581 
    OPRND (pc) = opval;
3582 
    written |= (1 << 2);
3583 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3584 
  }
3585 
}
3586 
 
3587 
  abuf->written = written;
3588 
#undef OPRND
3589 
#undef FLD
3590 
}
3591 
  NEXT (vpc);
3592 
 
3593 
CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3594 
  {
3595 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3596 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3597 
#define FLD(f) abuf->fields.sfmt_bl8.f
3598 
#define OPRND(f) par_exec->operands.sfmt_bc8.f
3599 
    int UNUSED written = abuf->written;
3600 
    IADDR UNUSED pc = abuf->addr;
3601 
    SEM_BRANCH_INIT
3602 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3603 
 
3604 
  if (written & (1 << 2))
3605 
    {
3606 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3607 
    }
3608 
 
3609 
  SEM_BRANCH_FINI (vpc);
3610 
#undef OPRND
3611 
#undef FLD
3612 
  }
3613 
  NEXT (vpc);
3614 
 
3615 
  CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3616 
{
3617 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3618 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3619 
#define FLD(f) abuf->fields.sfmt_bl8.f
3620 
#define OPRND(f) par_exec->operands.sfmt_bl8.f
3621 
  int UNUSED written = 0;
3622 
  IADDR UNUSED pc = abuf->addr;
3623 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3624 
 
3625 
{
3626 
  {
3627 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
3628 
    OPRND (h_gr_SI_14) = opval;
3629 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3630 
  }
3631 
  {
3632 
    USI opval = FLD (i_disp8);
3633 
    OPRND (pc) = opval;
3634 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3635 
  }
3636 
}
3637 
 
3638 
#undef OPRND
3639 
#undef FLD
3640 
}
3641 
  NEXT (vpc);
3642 
 
3643 
CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3644 
  {
3645 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3646 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3647 
#define FLD(f) abuf->fields.sfmt_bl8.f
3648 
#define OPRND(f) par_exec->operands.sfmt_bl8.f
3649 
    int UNUSED written = abuf->written;
3650 
    IADDR UNUSED pc = abuf->addr;
3651 
    SEM_BRANCH_INIT
3652 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3653 
 
3654 
  CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3655 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3656 
 
3657 
  SEM_BRANCH_FINI (vpc);
3658 
#undef OPRND
3659 
#undef FLD
3660 
  }
3661 
  NEXT (vpc);
3662 
 
3663 
  CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3664 
{
3665 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3666 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3667 
#define FLD(f) abuf->fields.sfmt_bl8.f
3668 
#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3669 
  int UNUSED written = 0;
3670 
  IADDR UNUSED pc = abuf->addr;
3671 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3672 
 
3673 
if (CPU (h_cond)) {
3674 
{
3675 
  {
3676 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
3677 
    OPRND (h_gr_SI_14) = opval;
3678 
    written |= (1 << 3);
3679 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3680 
  }
3681 
  {
3682 
    USI opval = FLD (i_disp8);
3683 
    OPRND (pc) = opval;
3684 
    written |= (1 << 4);
3685 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3686 
  }
3687 
}
3688 
}
3689 
 
3690 
  abuf->written = written;
3691 
#undef OPRND
3692 
#undef FLD
3693 
}
3694 
  NEXT (vpc);
3695 
 
3696 
CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3697 
  {
3698 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3699 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3700 
#define FLD(f) abuf->fields.sfmt_bl8.f
3701 
#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3702 
    int UNUSED written = abuf->written;
3703 
    IADDR UNUSED pc = abuf->addr;
3704 
    SEM_BRANCH_INIT
3705 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3706 
 
3707 
  if (written & (1 << 3))
3708 
    {
3709 
      CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3710 
    }
3711 
  if (written & (1 << 4))
3712 
    {
3713 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3714 
    }
3715 
 
3716 
  SEM_BRANCH_FINI (vpc);
3717 
#undef OPRND
3718 
#undef FLD
3719 
  }
3720 
  NEXT (vpc);
3721 
 
3722 
  CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3723 
{
3724 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3725 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3726 
#define FLD(f) abuf->fields.sfmt_bl8.f
3727 
#define OPRND(f) par_exec->operands.sfmt_bc8.f
3728 
  int UNUSED written = 0;
3729 
  IADDR UNUSED pc = abuf->addr;
3730 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3731 
 
3732 
if (NOTBI (CPU (h_cond))) {
3733 
  {
3734 
    USI opval = FLD (i_disp8);
3735 
    OPRND (pc) = opval;
3736 
    written |= (1 << 2);
3737 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3738 
  }
3739 
}
3740 
 
3741 
  abuf->written = written;
3742 
#undef OPRND
3743 
#undef FLD
3744 
}
3745 
  NEXT (vpc);
3746 
 
3747 
CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3748 
  {
3749 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3750 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3751 
#define FLD(f) abuf->fields.sfmt_bl8.f
3752 
#define OPRND(f) par_exec->operands.sfmt_bc8.f
3753 
    int UNUSED written = abuf->written;
3754 
    IADDR UNUSED pc = abuf->addr;
3755 
    SEM_BRANCH_INIT
3756 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3757 
 
3758 
  if (written & (1 << 2))
3759 
    {
3760 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3761 
    }
3762 
 
3763 
  SEM_BRANCH_FINI (vpc);
3764 
#undef OPRND
3765 
#undef FLD
3766 
  }
3767 
  NEXT (vpc);
3768 
 
3769 
  CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3770 
{
3771 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3772 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3773 
#define FLD(f) abuf->fields.sfmt_bl8.f
3774 
#define OPRND(f) par_exec->operands.sfmt_bra8.f
3775 
  int UNUSED written = 0;
3776 
  IADDR UNUSED pc = abuf->addr;
3777 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3778 
 
3779 
  {
3780 
    USI opval = FLD (i_disp8);
3781 
    OPRND (pc) = opval;
3782 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3783 
  }
3784 
 
3785 
#undef OPRND
3786 
#undef FLD
3787 
}
3788 
  NEXT (vpc);
3789 
 
3790 
CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3791 
  {
3792 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3793 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3794 
#define FLD(f) abuf->fields.sfmt_bl8.f
3795 
#define OPRND(f) par_exec->operands.sfmt_bra8.f
3796 
    int UNUSED written = abuf->written;
3797 
    IADDR UNUSED pc = abuf->addr;
3798 
    SEM_BRANCH_INIT
3799 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3800 
 
3801 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3802 
 
3803 
  SEM_BRANCH_FINI (vpc);
3804 
#undef OPRND
3805 
#undef FLD
3806 
  }
3807 
  NEXT (vpc);
3808 
 
3809 
  CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3810 
{
3811 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3812 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3813 
#define FLD(f) abuf->fields.sfmt_bl8.f
3814 
#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3815 
  int UNUSED written = 0;
3816 
  IADDR UNUSED pc = abuf->addr;
3817 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3818 
 
3819 
if (NOTBI (CPU (h_cond))) {
3820 
{
3821 
  {
3822 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
3823 
    OPRND (h_gr_SI_14) = opval;
3824 
    written |= (1 << 3);
3825 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3826 
  }
3827 
  {
3828 
    USI opval = FLD (i_disp8);
3829 
    OPRND (pc) = opval;
3830 
    written |= (1 << 4);
3831 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3832 
  }
3833 
}
3834 
}
3835 
 
3836 
  abuf->written = written;
3837 
#undef OPRND
3838 
#undef FLD
3839 
}
3840 
  NEXT (vpc);
3841 
 
3842 
CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
3843 
  {
3844 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3845 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3846 
#define FLD(f) abuf->fields.sfmt_bl8.f
3847 
#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3848 
    int UNUSED written = abuf->written;
3849 
    IADDR UNUSED pc = abuf->addr;
3850 
    SEM_BRANCH_INIT
3851 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3852 
 
3853 
  if (written & (1 << 3))
3854 
    {
3855 
      CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3856 
    }
3857 
  if (written & (1 << 4))
3858 
    {
3859 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3860 
    }
3861 
 
3862 
  SEM_BRANCH_FINI (vpc);
3863 
#undef OPRND
3864 
#undef FLD
3865 
  }
3866 
  NEXT (vpc);
3867 
 
3868 
  CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
3869 
{
3870 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3871 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3872 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3873 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3874 
  int UNUSED written = 0;
3875 
  IADDR UNUSED pc = abuf->addr;
3876 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3877 
 
3878 
  {
3879 
    BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
3880 
    OPRND (condbit) = opval;
3881 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3882 
  }
3883 
 
3884 
#undef OPRND
3885 
#undef FLD
3886 
}
3887 
  NEXT (vpc);
3888 
 
3889 
CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
3890 
  {
3891 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3892 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3893 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3894 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3895 
    int UNUSED written = abuf->written;
3896 
    IADDR UNUSED pc = abuf->addr;
3897 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3898 
 
3899 
  CPU (h_cond) = OPRND (condbit);
3900 
 
3901 
#undef OPRND
3902 
#undef FLD
3903 
  }
3904 
  NEXT (vpc);
3905 
 
3906 
  CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
3907 
{
3908 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3909 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3910 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3911 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3912 
  int UNUSED written = 0;
3913 
  IADDR UNUSED pc = abuf->addr;
3914 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3915 
 
3916 
  {
3917 
    BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
3918 
    OPRND (condbit) = opval;
3919 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3920 
  }
3921 
 
3922 
#undef OPRND
3923 
#undef FLD
3924 
}
3925 
  NEXT (vpc);
3926 
 
3927 
CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
3928 
  {
3929 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3930 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3931 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3932 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3933 
    int UNUSED written = abuf->written;
3934 
    IADDR UNUSED pc = abuf->addr;
3935 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3936 
 
3937 
  CPU (h_cond) = OPRND (condbit);
3938 
 
3939 
#undef OPRND
3940 
#undef FLD
3941 
  }
3942 
  NEXT (vpc);
3943 
 
3944 
  CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
3945 
{
3946 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3947 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3948 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3949 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3950 
  int UNUSED written = 0;
3951 
  IADDR UNUSED pc = abuf->addr;
3952 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3953 
 
3954 
  {
3955 
    BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
3956 
    OPRND (condbit) = opval;
3957 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3958 
  }
3959 
 
3960 
#undef OPRND
3961 
#undef FLD
3962 
}
3963 
  NEXT (vpc);
3964 
 
3965 
CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
3966 
  {
3967 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3968 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3969 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3970 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3971 
    int UNUSED written = abuf->written;
3972 
    IADDR UNUSED pc = abuf->addr;
3973 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3974 
 
3975 
  CPU (h_cond) = OPRND (condbit);
3976 
 
3977 
#undef OPRND
3978 
#undef FLD
3979 
  }
3980 
  NEXT (vpc);
3981 
 
3982 
  CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
3983 
{
3984 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3985 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3986 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3987 
#define OPRND(f) par_exec->operands.sfmt_cmpz.f
3988 
  int UNUSED written = 0;
3989 
  IADDR UNUSED pc = abuf->addr;
3990 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3991 
 
3992 
  {
3993 
    BI opval = EQSI (* FLD (i_src2), 0);
3994 
    OPRND (condbit) = opval;
3995 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3996 
  }
3997 
 
3998 
#undef OPRND
3999 
#undef FLD
4000 
}
4001 
  NEXT (vpc);
4002 
 
4003 
CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
4004 
  {
4005 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4006 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4007 
#define FLD(f) abuf->fields.sfmt_st_plus.f
4008 
#define OPRND(f) par_exec->operands.sfmt_cmpz.f
4009 
    int UNUSED written = abuf->written;
4010 
    IADDR UNUSED pc = abuf->addr;
4011 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4012 
 
4013 
  CPU (h_cond) = OPRND (condbit);
4014 
 
4015 
#undef OPRND
4016 
#undef FLD
4017 
  }
4018 
  NEXT (vpc);
4019 
 
4020 
  CASE (sem, INSN_PAR_JC) : /* jc $sr */
4021 
{
4022 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4023 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4024 
#define FLD(f) abuf->fields.sfmt_jl.f
4025 
#define OPRND(f) par_exec->operands.sfmt_jc.f
4026 
  int UNUSED written = 0;
4027 
  IADDR UNUSED pc = abuf->addr;
4028 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4029 
 
4030 
if (CPU (h_cond)) {
4031 
  {
4032 
    USI opval = ANDSI (* FLD (i_sr), -4);
4033 
    OPRND (pc) = opval;
4034 
    written |= (1 << 2);
4035 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4036 
  }
4037 
}
4038 
 
4039 
  abuf->written = written;
4040 
#undef OPRND
4041 
#undef FLD
4042 
}
4043 
  NEXT (vpc);
4044 
 
4045 
CASE (sem, INSN_WRITE_JC) : /* jc $sr */
4046 
  {
4047 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4048 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4049 
#define FLD(f) abuf->fields.sfmt_jl.f
4050 
#define OPRND(f) par_exec->operands.sfmt_jc.f
4051 
    int UNUSED written = abuf->written;
4052 
    IADDR UNUSED pc = abuf->addr;
4053 
    SEM_BRANCH_INIT
4054 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4055 
 
4056 
  if (written & (1 << 2))
4057 
    {
4058 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4059 
    }
4060 
 
4061 
  SEM_BRANCH_FINI (vpc);
4062 
#undef OPRND
4063 
#undef FLD
4064 
  }
4065 
  NEXT (vpc);
4066 
 
4067 
  CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
4068 
{
4069 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4070 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4071 
#define FLD(f) abuf->fields.sfmt_jl.f
4072 
#define OPRND(f) par_exec->operands.sfmt_jc.f
4073 
  int UNUSED written = 0;
4074 
  IADDR UNUSED pc = abuf->addr;
4075 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4076 
 
4077 
if (NOTBI (CPU (h_cond))) {
4078 
  {
4079 
    USI opval = ANDSI (* FLD (i_sr), -4);
4080 
    OPRND (pc) = opval;
4081 
    written |= (1 << 2);
4082 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4083 
  }
4084 
}
4085 
 
4086 
  abuf->written = written;
4087 
#undef OPRND
4088 
#undef FLD
4089 
}
4090 
  NEXT (vpc);
4091 
 
4092 
CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
4093 
  {
4094 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4095 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4096 
#define FLD(f) abuf->fields.sfmt_jl.f
4097 
#define OPRND(f) par_exec->operands.sfmt_jc.f
4098 
    int UNUSED written = abuf->written;
4099 
    IADDR UNUSED pc = abuf->addr;
4100 
    SEM_BRANCH_INIT
4101 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4102 
 
4103 
  if (written & (1 << 2))
4104 
    {
4105 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4106 
    }
4107 
 
4108 
  SEM_BRANCH_FINI (vpc);
4109 
#undef OPRND
4110 
#undef FLD
4111 
  }
4112 
  NEXT (vpc);
4113 
 
4114 
  CASE (sem, INSN_PAR_JL) : /* jl $sr */
4115 
{
4116 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4117 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4118 
#define FLD(f) abuf->fields.sfmt_jl.f
4119 
#define OPRND(f) par_exec->operands.sfmt_jl.f
4120 
  int UNUSED written = 0;
4121 
  IADDR UNUSED pc = abuf->addr;
4122 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4123 
 
4124 
{
4125 
  SI temp0;USI temp1;
4126 
  temp0 = ADDSI (ANDSI (pc, -4), 4);
4127 
  temp1 = ANDSI (* FLD (i_sr), -4);
4128 
  {
4129 
    SI opval = temp0;
4130 
    OPRND (h_gr_SI_14) = opval;
4131 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4132 
  }
4133 
  {
4134 
    USI opval = temp1;
4135 
    OPRND (pc) = opval;
4136 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4137 
  }
4138 
}
4139 
 
4140 
#undef OPRND
4141 
#undef FLD
4142 
}
4143 
  NEXT (vpc);
4144 
 
4145 
CASE (sem, INSN_WRITE_JL) : /* jl $sr */
4146 
  {
4147 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4148 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4149 
#define FLD(f) abuf->fields.sfmt_jl.f
4150 
#define OPRND(f) par_exec->operands.sfmt_jl.f
4151 
    int UNUSED written = abuf->written;
4152 
    IADDR UNUSED pc = abuf->addr;
4153 
    SEM_BRANCH_INIT
4154 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4155 
 
4156 
  CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4157 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4158 
 
4159 
  SEM_BRANCH_FINI (vpc);
4160 
#undef OPRND
4161 
#undef FLD
4162 
  }
4163 
  NEXT (vpc);
4164 
 
4165 
  CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
4166 
{
4167 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4168 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4169 
#define FLD(f) abuf->fields.sfmt_jl.f
4170 
#define OPRND(f) par_exec->operands.sfmt_jmp.f
4171 
  int UNUSED written = 0;
4172 
  IADDR UNUSED pc = abuf->addr;
4173 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4174 
 
4175 
  {
4176 
    USI opval = ANDSI (* FLD (i_sr), -4);
4177 
    OPRND (pc) = opval;
4178 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4179 
  }
4180 
 
4181 
#undef OPRND
4182 
#undef FLD
4183 
}
4184 
  NEXT (vpc);
4185 
 
4186 
CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4187 
  {
4188 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4189 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4190 
#define FLD(f) abuf->fields.sfmt_jl.f
4191 
#define OPRND(f) par_exec->operands.sfmt_jmp.f
4192 
    int UNUSED written = abuf->written;
4193 
    IADDR UNUSED pc = abuf->addr;
4194 
    SEM_BRANCH_INIT
4195 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4196 
 
4197 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4198 
 
4199 
  SEM_BRANCH_FINI (vpc);
4200 
#undef OPRND
4201 
#undef FLD
4202 
  }
4203 
  NEXT (vpc);
4204 
 
4205 
  CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4206 
{
4207 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4208 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4209 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4210 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4211 
  int UNUSED written = 0;
4212 
  IADDR UNUSED pc = abuf->addr;
4213 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4214 
 
4215 
  {
4216 
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4217 
    OPRND (dr) = opval;
4218 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4219 
  }
4220 
 
4221 
#undef OPRND
4222 
#undef FLD
4223 
}
4224 
  NEXT (vpc);
4225 
 
4226 
CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4227 
  {
4228 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4229 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4230 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4231 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4232 
    int UNUSED written = abuf->written;
4233 
    IADDR UNUSED pc = abuf->addr;
4234 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4235 
 
4236 
  * FLD (i_dr) = OPRND (dr);
4237 
 
4238 
#undef OPRND
4239 
#undef FLD
4240 
  }
4241 
  NEXT (vpc);
4242 
 
4243 
  CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4244 
{
4245 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4246 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4247 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4248 
#define OPRND(f) par_exec->operands.sfmt_ldb.f
4249 
  int UNUSED written = 0;
4250 
  IADDR UNUSED pc = abuf->addr;
4251 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4252 
 
4253 
  {
4254 
    SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4255 
    OPRND (dr) = opval;
4256 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4257 
  }
4258 
 
4259 
#undef OPRND
4260 
#undef FLD
4261 
}
4262 
  NEXT (vpc);
4263 
 
4264 
CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4265 
  {
4266 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4267 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4268 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4269 
#define OPRND(f) par_exec->operands.sfmt_ldb.f
4270 
    int UNUSED written = abuf->written;
4271 
    IADDR UNUSED pc = abuf->addr;
4272 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4273 
 
4274 
  * FLD (i_dr) = OPRND (dr);
4275 
 
4276 
#undef OPRND
4277 
#undef FLD
4278 
  }
4279 
  NEXT (vpc);
4280 
 
4281 
  CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4282 
{
4283 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4284 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4285 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4286 
#define OPRND(f) par_exec->operands.sfmt_ldh.f
4287 
  int UNUSED written = 0;
4288 
  IADDR UNUSED pc = abuf->addr;
4289 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4290 
 
4291 
  {
4292 
    SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4293 
    OPRND (dr) = opval;
4294 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4295 
  }
4296 
 
4297 
#undef OPRND
4298 
#undef FLD
4299 
}
4300 
  NEXT (vpc);
4301 
 
4302 
CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4303 
  {
4304 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4305 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4306 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4307 
#define OPRND(f) par_exec->operands.sfmt_ldh.f
4308 
    int UNUSED written = abuf->written;
4309 
    IADDR UNUSED pc = abuf->addr;
4310 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4311 
 
4312 
  * FLD (i_dr) = OPRND (dr);
4313 
 
4314 
#undef OPRND
4315 
#undef FLD
4316 
  }
4317 
  NEXT (vpc);
4318 
 
4319 
  CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4320 
{
4321 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4322 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4323 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4324 
#define OPRND(f) par_exec->operands.sfmt_ldb.f
4325 
  int UNUSED written = 0;
4326 
  IADDR UNUSED pc = abuf->addr;
4327 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4328 
 
4329 
  {
4330 
    SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4331 
    OPRND (dr) = opval;
4332 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4333 
  }
4334 
 
4335 
#undef OPRND
4336 
#undef FLD
4337 
}
4338 
  NEXT (vpc);
4339 
 
4340 
CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4341 
  {
4342 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4343 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4344 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4345 
#define OPRND(f) par_exec->operands.sfmt_ldb.f
4346 
    int UNUSED written = abuf->written;
4347 
    IADDR UNUSED pc = abuf->addr;
4348 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4349 
 
4350 
  * FLD (i_dr) = OPRND (dr);
4351 
 
4352 
#undef OPRND
4353 
#undef FLD
4354 
  }
4355 
  NEXT (vpc);
4356 
 
4357 
  CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4358 
{
4359 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4360 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4361 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4362 
#define OPRND(f) par_exec->operands.sfmt_ldh.f
4363 
  int UNUSED written = 0;
4364 
  IADDR UNUSED pc = abuf->addr;
4365 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4366 
 
4367 
  {
4368 
    SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4369 
    OPRND (dr) = opval;
4370 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4371 
  }
4372 
 
4373 
#undef OPRND
4374 
#undef FLD
4375 
}
4376 
  NEXT (vpc);
4377 
 
4378 
CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4379 
  {
4380 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4381 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4382 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4383 
#define OPRND(f) par_exec->operands.sfmt_ldh.f
4384 
    int UNUSED written = abuf->written;
4385 
    IADDR UNUSED pc = abuf->addr;
4386 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4387 
 
4388 
  * FLD (i_dr) = OPRND (dr);
4389 
 
4390 
#undef OPRND
4391 
#undef FLD
4392 
  }
4393 
  NEXT (vpc);
4394 
 
4395 
  CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4396 
{
4397 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4398 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4399 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4400 
#define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4401 
  int UNUSED written = 0;
4402 
  IADDR UNUSED pc = abuf->addr;
4403 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4404 
 
4405 
{
4406 
  SI temp0;SI temp1;
4407 
  temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4408 
  temp1 = ADDSI (* FLD (i_sr), 4);
4409 
  {
4410 
    SI opval = temp0;
4411 
    OPRND (dr) = opval;
4412 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4413 
  }
4414 
  {
4415 
    SI opval = temp1;
4416 
    OPRND (sr) = opval;
4417 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4418 
  }
4419 
}
4420 
 
4421 
#undef OPRND
4422 
#undef FLD
4423 
}
4424 
  NEXT (vpc);
4425 
 
4426 
CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4427 
  {
4428 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4429 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4430 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4431 
#define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4432 
    int UNUSED written = abuf->written;
4433 
    IADDR UNUSED pc = abuf->addr;
4434 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4435 
 
4436 
  * FLD (i_dr) = OPRND (dr);
4437 
  * FLD (i_sr) = OPRND (sr);
4438 
 
4439 
#undef OPRND
4440 
#undef FLD
4441 
  }
4442 
  NEXT (vpc);
4443 
 
4444 
  CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4445 
{
4446 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4447 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4448 
#define FLD(f) abuf->fields.sfmt_addi.f
4449 
#define OPRND(f) par_exec->operands.sfmt_ldi8.f
4450 
  int UNUSED written = 0;
4451 
  IADDR UNUSED pc = abuf->addr;
4452 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4453 
 
4454 
  {
4455 
    SI opval = FLD (f_simm8);
4456 
    OPRND (dr) = opval;
4457 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4458 
  }
4459 
 
4460 
#undef OPRND
4461 
#undef FLD
4462 
}
4463 
  NEXT (vpc);
4464 
 
4465 
CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4466 
  {
4467 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4468 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4469 
#define FLD(f) abuf->fields.sfmt_addi.f
4470 
#define OPRND(f) par_exec->operands.sfmt_ldi8.f
4471 
    int UNUSED written = abuf->written;
4472 
    IADDR UNUSED pc = abuf->addr;
4473 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4474 
 
4475 
  * FLD (i_dr) = OPRND (dr);
4476 
 
4477 
#undef OPRND
4478 
#undef FLD
4479 
  }
4480 
  NEXT (vpc);
4481 
 
4482 
  CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4483 
{
4484 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4485 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4486 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4487 
#define OPRND(f) par_exec->operands.sfmt_lock.f
4488 
  int UNUSED written = 0;
4489 
  IADDR UNUSED pc = abuf->addr;
4490 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4491 
 
4492 
{
4493 
  {
4494 
    BI opval = 1;
4495 
    OPRND (h_lock_BI) = opval;
4496 
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
4497 
  }
4498 
  {
4499 
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4500 
    OPRND (dr) = opval;
4501 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4502 
  }
4503 
}
4504 
 
4505 
#undef OPRND
4506 
#undef FLD
4507 
}
4508 
  NEXT (vpc);
4509 
 
4510 
CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4511 
  {
4512 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4513 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4514 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4515 
#define OPRND(f) par_exec->operands.sfmt_lock.f
4516 
    int UNUSED written = abuf->written;
4517 
    IADDR UNUSED pc = abuf->addr;
4518 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4519 
 
4520 
  * FLD (i_dr) = OPRND (dr);
4521 
  CPU (h_lock) = OPRND (h_lock_BI);
4522 
 
4523 
#undef OPRND
4524 
#undef FLD
4525 
  }
4526 
  NEXT (vpc);
4527 
 
4528 
  CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4529 
{
4530 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4531 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4532 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4533 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4534 
  int UNUSED written = 0;
4535 
  IADDR UNUSED pc = abuf->addr;
4536 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4537 
 
4538 
  {
4539 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4540 
    OPRND (acc) = opval;
4541 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4542 
  }
4543 
 
4544 
#undef OPRND
4545 
#undef FLD
4546 
}
4547 
  NEXT (vpc);
4548 
 
4549 
CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4550 
  {
4551 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4552 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4553 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4554 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4555 
    int UNUSED written = abuf->written;
4556 
    IADDR UNUSED pc = abuf->addr;
4557 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4558 
 
4559 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4560 
 
4561 
#undef OPRND
4562 
#undef FLD
4563 
  }
4564 
  NEXT (vpc);
4565 
 
4566 
  CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4567 
{
4568 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4569 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4570 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4571 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4572 
  int UNUSED written = 0;
4573 
  IADDR UNUSED pc = abuf->addr;
4574 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4575 
 
4576 
  {
4577 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4578 
    OPRND (acc) = opval;
4579 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4580 
  }
4581 
 
4582 
#undef OPRND
4583 
#undef FLD
4584 
}
4585 
  NEXT (vpc);
4586 
 
4587 
CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4588 
  {
4589 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4590 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4591 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4592 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4593 
    int UNUSED written = abuf->written;
4594 
    IADDR UNUSED pc = abuf->addr;
4595 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4596 
 
4597 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4598 
 
4599 
#undef OPRND
4600 
#undef FLD
4601 
  }
4602 
  NEXT (vpc);
4603 
 
4604 
  CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4605 
{
4606 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4607 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4608 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4609 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4610 
  int UNUSED written = 0;
4611 
  IADDR UNUSED pc = abuf->addr;
4612 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4613 
 
4614 
  {
4615 
    DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4616 
    OPRND (acc) = opval;
4617 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4618 
  }
4619 
 
4620 
#undef OPRND
4621 
#undef FLD
4622 
}
4623 
  NEXT (vpc);
4624 
 
4625 
CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4626 
  {
4627 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4628 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4629 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4630 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4631 
    int UNUSED written = abuf->written;
4632 
    IADDR UNUSED pc = abuf->addr;
4633 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4634 
 
4635 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4636 
 
4637 
#undef OPRND
4638 
#undef FLD
4639 
  }
4640 
  NEXT (vpc);
4641 
 
4642 
  CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4643 
{
4644 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4645 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4646 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4647 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4648 
  int UNUSED written = 0;
4649 
  IADDR UNUSED pc = abuf->addr;
4650 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4651 
 
4652 
  {
4653 
    DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4654 
    OPRND (acc) = opval;
4655 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4656 
  }
4657 
 
4658 
#undef OPRND
4659 
#undef FLD
4660 
}
4661 
  NEXT (vpc);
4662 
 
4663 
CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4664 
  {
4665 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4666 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4667 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4668 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4669 
    int UNUSED written = abuf->written;
4670 
    IADDR UNUSED pc = abuf->addr;
4671 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4672 
 
4673 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4674 
 
4675 
#undef OPRND
4676 
#undef FLD
4677 
  }
4678 
  NEXT (vpc);
4679 
 
4680 
  CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4681 
{
4682 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4683 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4684 
#define FLD(f) abuf->fields.sfmt_add.f
4685 
#define OPRND(f) par_exec->operands.sfmt_add.f
4686 
  int UNUSED written = 0;
4687 
  IADDR UNUSED pc = abuf->addr;
4688 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4689 
 
4690 
  {
4691 
    SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4692 
    OPRND (dr) = opval;
4693 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4694 
  }
4695 
 
4696 
#undef OPRND
4697 
#undef FLD
4698 
}
4699 
  NEXT (vpc);
4700 
 
4701 
CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4702 
  {
4703 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4704 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4705 
#define FLD(f) abuf->fields.sfmt_add.f
4706 
#define OPRND(f) par_exec->operands.sfmt_add.f
4707 
    int UNUSED written = abuf->written;
4708 
    IADDR UNUSED pc = abuf->addr;
4709 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4710 
 
4711 
  * FLD (i_dr) = OPRND (dr);
4712 
 
4713 
#undef OPRND
4714 
#undef FLD
4715 
  }
4716 
  NEXT (vpc);
4717 
 
4718 
  CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4719 
{
4720 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4721 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4722 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4723 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4724 
  int UNUSED written = 0;
4725 
  IADDR UNUSED pc = abuf->addr;
4726 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4727 
 
4728 
  {
4729 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4730 
    OPRND (acc) = opval;
4731 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4732 
  }
4733 
 
4734 
#undef OPRND
4735 
#undef FLD
4736 
}
4737 
  NEXT (vpc);
4738 
 
4739 
CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4740 
  {
4741 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4742 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4743 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4744 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4745 
    int UNUSED written = abuf->written;
4746 
    IADDR UNUSED pc = abuf->addr;
4747 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4748 
 
4749 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4750 
 
4751 
#undef OPRND
4752 
#undef FLD
4753 
  }
4754 
  NEXT (vpc);
4755 
 
4756 
  CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4757 
{
4758 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4759 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4760 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4761 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4762 
  int UNUSED written = 0;
4763 
  IADDR UNUSED pc = abuf->addr;
4764 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4765 
 
4766 
  {
4767 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4768 
    OPRND (acc) = opval;
4769 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4770 
  }
4771 
 
4772 
#undef OPRND
4773 
#undef FLD
4774 
}
4775 
  NEXT (vpc);
4776 
 
4777 
CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4778 
  {
4779 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4780 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4781 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4782 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4783 
    int UNUSED written = abuf->written;
4784 
    IADDR UNUSED pc = abuf->addr;
4785 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4786 
 
4787 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4788 
 
4789 
#undef OPRND
4790 
#undef FLD
4791 
  }
4792 
  NEXT (vpc);
4793 
 
4794 
  CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4795 
{
4796 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4797 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4798 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4799 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4800 
  int UNUSED written = 0;
4801 
  IADDR UNUSED pc = abuf->addr;
4802 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4803 
 
4804 
  {
4805 
    DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4806 
    OPRND (acc) = opval;
4807 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4808 
  }
4809 
 
4810 
#undef OPRND
4811 
#undef FLD
4812 
}
4813 
  NEXT (vpc);
4814 
 
4815 
CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4816 
  {
4817 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4818 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4819 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4820 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4821 
    int UNUSED written = abuf->written;
4822 
    IADDR UNUSED pc = abuf->addr;
4823 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4824 
 
4825 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4826 
 
4827 
#undef OPRND
4828 
#undef FLD
4829 
  }
4830 
  NEXT (vpc);
4831 
 
4832 
  CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4833 
{
4834 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4835 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4836 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4837 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4838 
  int UNUSED written = 0;
4839 
  IADDR UNUSED pc = abuf->addr;
4840 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4841 
 
4842 
  {
4843 
    DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
4844 
    OPRND (acc) = opval;
4845 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4846 
  }
4847 
 
4848 
#undef OPRND
4849 
#undef FLD
4850 
}
4851 
  NEXT (vpc);
4852 
 
4853 
CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4854 
  {
4855 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4856 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4857 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4858 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4859 
    int UNUSED written = abuf->written;
4860 
    IADDR UNUSED pc = abuf->addr;
4861 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4862 
 
4863 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4864 
 
4865 
#undef OPRND
4866 
#undef FLD
4867 
  }
4868 
  NEXT (vpc);
4869 
 
4870 
  CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
4871 
{
4872 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4873 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4874 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4875 
#define OPRND(f) par_exec->operands.sfmt_mv.f
4876 
  int UNUSED written = 0;
4877 
  IADDR UNUSED pc = abuf->addr;
4878 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4879 
 
4880 
  {
4881 
    SI opval = * FLD (i_sr);
4882 
    OPRND (dr) = opval;
4883 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4884 
  }
4885 
 
4886 
#undef OPRND
4887 
#undef FLD
4888 
}
4889 
  NEXT (vpc);
4890 
 
4891 
CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
4892 
  {
4893 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4894 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4895 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4896 
#define OPRND(f) par_exec->operands.sfmt_mv.f
4897 
    int UNUSED written = abuf->written;
4898 
    IADDR UNUSED pc = abuf->addr;
4899 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4900 
 
4901 
  * FLD (i_dr) = OPRND (dr);
4902 
 
4903 
#undef OPRND
4904 
#undef FLD
4905 
  }
4906 
  NEXT (vpc);
4907 
 
4908 
  CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
4909 
{
4910 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4911 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4912 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4913 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4914 
  int UNUSED written = 0;
4915 
  IADDR UNUSED pc = abuf->addr;
4916 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4917 
 
4918 
  {
4919 
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
4920 
    OPRND (dr) = opval;
4921 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4922 
  }
4923 
 
4924 
#undef OPRND
4925 
#undef FLD
4926 
}
4927 
  NEXT (vpc);
4928 
 
4929 
CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
4930 
  {
4931 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4932 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4933 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4934 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4935 
    int UNUSED written = abuf->written;
4936 
    IADDR UNUSED pc = abuf->addr;
4937 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4938 
 
4939 
  * FLD (i_dr) = OPRND (dr);
4940 
 
4941 
#undef OPRND
4942 
#undef FLD
4943 
  }
4944 
  NEXT (vpc);
4945 
 
4946 
  CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
4947 
{
4948 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4949 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4950 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4951 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4952 
  int UNUSED written = 0;
4953 
  IADDR UNUSED pc = abuf->addr;
4954 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4955 
 
4956 
  {
4957 
    SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
4958 
    OPRND (dr) = opval;
4959 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4960 
  }
4961 
 
4962 
#undef OPRND
4963 
#undef FLD
4964 
}
4965 
  NEXT (vpc);
4966 
 
4967 
CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
4968 
  {
4969 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4970 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4971 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4972 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4973 
    int UNUSED written = abuf->written;
4974 
    IADDR UNUSED pc = abuf->addr;
4975 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4976 
 
4977 
  * FLD (i_dr) = OPRND (dr);
4978 
 
4979 
#undef OPRND
4980 
#undef FLD
4981 
  }
4982 
  NEXT (vpc);
4983 
 
4984 
  CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
4985 
{
4986 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4987 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4988 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4989 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4990 
  int UNUSED written = 0;
4991 
  IADDR UNUSED pc = abuf->addr;
4992 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4993 
 
4994 
  {
4995 
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
4996 
    OPRND (dr) = opval;
4997 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4998 
  }
4999 
 
5000 
#undef OPRND
5001 
#undef FLD
5002 
}
5003 
  NEXT (vpc);
5004 
 
5005 
CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
5006 
  {
5007 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5008 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5009 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5010 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5011 
    int UNUSED written = abuf->written;
5012 
    IADDR UNUSED pc = abuf->addr;
5013 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5014 
 
5015 
  * FLD (i_dr) = OPRND (dr);
5016 
 
5017 
#undef OPRND
5018 
#undef FLD
5019 
  }
5020 
  NEXT (vpc);
5021 
 
5022 
  CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
5023 
{
5024 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5025 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5026 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5027 
#define OPRND(f) par_exec->operands.sfmt_mvfc.f
5028 
  int UNUSED written = 0;
5029 
  IADDR UNUSED pc = abuf->addr;
5030 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5031 
 
5032 
  {
5033 
    SI opval = GET_H_CR (FLD (f_r2));
5034 
    OPRND (dr) = opval;
5035 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5036 
  }
5037 
 
5038 
#undef OPRND
5039 
#undef FLD
5040 
}
5041 
  NEXT (vpc);
5042 
 
5043 
CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
5044 
  {
5045 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5046 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5047 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5048 
#define OPRND(f) par_exec->operands.sfmt_mvfc.f
5049 
    int UNUSED written = abuf->written;
5050 
    IADDR UNUSED pc = abuf->addr;
5051 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5052 
 
5053 
  * FLD (i_dr) = OPRND (dr);
5054 
 
5055 
#undef OPRND
5056 
#undef FLD
5057 
  }
5058 
  NEXT (vpc);
5059 
 
5060 
  CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
5061 
{
5062 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5063 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5064 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5065 
#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5066 
  int UNUSED written = 0;
5067 
  IADDR UNUSED pc = abuf->addr;
5068 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5069 
 
5070 
  {
5071 
    DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
5072 
    OPRND (accs) = opval;
5073 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5074 
  }
5075 
 
5076 
#undef OPRND
5077 
#undef FLD
5078 
}
5079 
  NEXT (vpc);
5080 
 
5081 
CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
5082 
  {
5083 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5084 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5085 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5086 
#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5087 
    int UNUSED written = abuf->written;
5088 
    IADDR UNUSED pc = abuf->addr;
5089 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5090 
 
5091 
  SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5092 
 
5093 
#undef OPRND
5094 
#undef FLD
5095 
  }
5096 
  NEXT (vpc);
5097 
 
5098 
  CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
5099 
{
5100 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5101 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5102 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5103 
#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5104 
  int UNUSED written = 0;
5105 
  IADDR UNUSED pc = abuf->addr;
5106 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5107 
 
5108 
  {
5109 
    DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
5110 
    OPRND (accs) = opval;
5111 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5112 
  }
5113 
 
5114 
#undef OPRND
5115 
#undef FLD
5116 
}
5117 
  NEXT (vpc);
5118 
 
5119 
CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
5120 
  {
5121 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5122 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5123 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5124 
#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5125 
    int UNUSED written = abuf->written;
5126 
    IADDR UNUSED pc = abuf->addr;
5127 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5128 
 
5129 
  SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5130 
 
5131 
#undef OPRND
5132 
#undef FLD
5133 
  }
5134 
  NEXT (vpc);
5135 
 
5136 
  CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
5137 
{
5138 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5139 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5140 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5141 
#define OPRND(f) par_exec->operands.sfmt_mvtc.f
5142 
  int UNUSED written = 0;
5143 
  IADDR UNUSED pc = abuf->addr;
5144 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5145 
 
5146 
  {
5147 
    USI opval = * FLD (i_sr);
5148 
    OPRND (dcr) = opval;
5149 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5150 
  }
5151 
 
5152 
#undef OPRND
5153 
#undef FLD
5154 
}
5155 
  NEXT (vpc);
5156 
 
5157 
CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
5158 
  {
5159 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5160 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5161 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5162 
#define OPRND(f) par_exec->operands.sfmt_mvtc.f
5163 
    int UNUSED written = abuf->written;
5164 
    IADDR UNUSED pc = abuf->addr;
5165 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5166 
 
5167 
  SET_H_CR (FLD (f_r1), OPRND (dcr));
5168 
 
5169 
#undef OPRND
5170 
#undef FLD
5171 
  }
5172 
  NEXT (vpc);
5173 
 
5174 
  CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5175 
{
5176 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5177 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5178 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5179 
#define OPRND(f) par_exec->operands.sfmt_mv.f
5180 
  int UNUSED written = 0;
5181 
  IADDR UNUSED pc = abuf->addr;
5182 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5183 
 
5184 
  {
5185 
    SI opval = NEGSI (* FLD (i_sr));
5186 
    OPRND (dr) = opval;
5187 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5188 
  }
5189 
 
5190 
#undef OPRND
5191 
#undef FLD
5192 
}
5193 
  NEXT (vpc);
5194 
 
5195 
CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5196 
  {
5197 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5198 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5199 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5200 
#define OPRND(f) par_exec->operands.sfmt_mv.f
5201 
    int UNUSED written = abuf->written;
5202 
    IADDR UNUSED pc = abuf->addr;
5203 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5204 
 
5205 
  * FLD (i_dr) = OPRND (dr);
5206 
 
5207 
#undef OPRND
5208 
#undef FLD
5209 
  }
5210 
  NEXT (vpc);
5211 
 
5212 
  CASE (sem, INSN_PAR_NOP) : /* nop */
5213 
{
5214 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5215 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5216 
#define FLD(f) abuf->fields.sfmt_empty.f
5217 
#define OPRND(f) par_exec->operands.sfmt_nop.f
5218 
  int UNUSED written = 0;
5219 
  IADDR UNUSED pc = abuf->addr;
5220 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5221 
 
5222 
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5223 
 
5224 
#undef OPRND
5225 
#undef FLD
5226 
}
5227 
  NEXT (vpc);
5228 
 
5229 
CASE (sem, INSN_WRITE_NOP) : /* nop */
5230 
  {
5231 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5232 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5233 
#define FLD(f) abuf->fields.sfmt_empty.f
5234 
#define OPRND(f) par_exec->operands.sfmt_nop.f
5235 
    int UNUSED written = abuf->written;
5236 
    IADDR UNUSED pc = abuf->addr;
5237 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5238 
 
5239 
 
5240 
#undef OPRND
5241 
#undef FLD
5242 
  }
5243 
  NEXT (vpc);
5244 
 
5245 
  CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5246 
{
5247 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5248 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5249 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5250 
#define OPRND(f) par_exec->operands.sfmt_mv.f
5251 
  int UNUSED written = 0;
5252 
  IADDR UNUSED pc = abuf->addr;
5253 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5254 
 
5255 
  {
5256 
    SI opval = INVSI (* FLD (i_sr));
5257 
    OPRND (dr) = opval;
5258 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5259 
  }
5260 
 
5261 
#undef OPRND
5262 
#undef FLD
5263 
}
5264 
  NEXT (vpc);
5265 
 
5266 
CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5267 
  {
5268 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5269 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5270 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5271 
#define OPRND(f) par_exec->operands.sfmt_mv.f
5272 
    int UNUSED written = abuf->written;
5273 
    IADDR UNUSED pc = abuf->addr;
5274 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5275 
 
5276 
  * FLD (i_dr) = OPRND (dr);
5277 
 
5278 
#undef OPRND
5279 
#undef FLD
5280 
  }
5281 
  NEXT (vpc);
5282 
 
5283 
  CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5284 
{
5285 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5286 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5287 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5288 
#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5289 
  int UNUSED written = 0;
5290 
  IADDR UNUSED pc = abuf->addr;
5291 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5292 
 
5293 
{
5294 
  DI tmp_tmp1;
5295 
  tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5296 
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5297 
  {
5298 
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5299 
    OPRND (accd) = opval;
5300 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5301 
  }
5302 
}
5303 
 
5304 
#undef OPRND
5305 
#undef FLD
5306 
}
5307 
  NEXT (vpc);
5308 
 
5309 
CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5310 
  {
5311 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5312 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5313 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5314 
#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5315 
    int UNUSED written = abuf->written;
5316 
    IADDR UNUSED pc = abuf->addr;
5317 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5318 
 
5319 
  SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5320 
 
5321 
#undef OPRND
5322 
#undef FLD
5323 
  }
5324 
  NEXT (vpc);
5325 
 
5326 
  CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5327 
{
5328 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5329 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5330 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5331 
#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5332 
  int UNUSED written = 0;
5333 
  IADDR UNUSED pc = abuf->addr;
5334 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5335 
 
5336 
{
5337 
  DI tmp_tmp1;
5338 
  tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5339 
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5340 
  {
5341 
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5342 
    OPRND (accd) = opval;
5343 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5344 
  }
5345 
}
5346 
 
5347 
#undef OPRND
5348 
#undef FLD
5349 
}
5350 
  NEXT (vpc);
5351 
 
5352 
CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5353 
  {
5354 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5355 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5356 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5357 
#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5358 
    int UNUSED written = abuf->written;
5359 
    IADDR UNUSED pc = abuf->addr;
5360 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5361 
 
5362 
  SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5363 
 
5364 
#undef OPRND
5365 
#undef FLD
5366 
  }
5367 
  NEXT (vpc);
5368 
 
5369 
  CASE (sem, INSN_PAR_RTE) : /* rte */
5370 
{
5371 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5372 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5373 
#define FLD(f) abuf->fields.sfmt_empty.f
5374 
#define OPRND(f) par_exec->operands.sfmt_rte.f
5375 
  int UNUSED written = 0;
5376 
  IADDR UNUSED pc = abuf->addr;
5377 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5378 
 
5379 
{
5380 
  {
5381 
    USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
5382 
    OPRND (pc) = opval;
5383 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5384 
  }
5385 
  {
5386 
    USI opval = GET_H_CR (((UINT) 14));
5387 
    OPRND (h_cr_USI_6) = opval;
5388 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5389 
  }
5390 
  {
5391 
    UQI opval = CPU (h_bpsw);
5392 
    OPRND (h_psw_UQI) = opval;
5393 
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5394 
  }
5395 
  {
5396 
    UQI opval = CPU (h_bbpsw);
5397 
    OPRND (h_bpsw_UQI) = opval;
5398 
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5399 
  }
5400 
}
5401 
 
5402 
#undef OPRND
5403 
#undef FLD
5404 
}
5405 
  NEXT (vpc);
5406 
 
5407 
CASE (sem, INSN_WRITE_RTE) : /* rte */
5408 
  {
5409 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5410 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5411 
#define FLD(f) abuf->fields.sfmt_empty.f
5412 
#define OPRND(f) par_exec->operands.sfmt_rte.f
5413 
    int UNUSED written = abuf->written;
5414 
    IADDR UNUSED pc = abuf->addr;
5415 
    SEM_BRANCH_INIT
5416 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5417 
 
5418 
  CPU (h_bpsw) = OPRND (h_bpsw_UQI);
5419 
  SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
5420 
  SET_H_PSW (OPRND (h_psw_UQI));
5421 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5422 
 
5423 
  SEM_BRANCH_FINI (vpc);
5424 
#undef OPRND
5425 
#undef FLD
5426 
  }
5427 
  NEXT (vpc);
5428 
 
5429 
  CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5430 
{
5431 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5432 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5433 
#define FLD(f) abuf->fields.sfmt_add.f
5434 
#define OPRND(f) par_exec->operands.sfmt_add.f
5435 
  int UNUSED written = 0;
5436 
  IADDR UNUSED pc = abuf->addr;
5437 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5438 
 
5439 
  {
5440 
    SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5441 
    OPRND (dr) = opval;
5442 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5443 
  }
5444 
 
5445 
#undef OPRND
5446 
#undef FLD
5447 
}
5448 
  NEXT (vpc);
5449 
 
5450 
CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5451 
  {
5452 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5453 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5454 
#define FLD(f) abuf->fields.sfmt_add.f
5455 
#define OPRND(f) par_exec->operands.sfmt_add.f
5456 
    int UNUSED written = abuf->written;
5457 
    IADDR UNUSED pc = abuf->addr;
5458 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5459 
 
5460 
  * FLD (i_dr) = OPRND (dr);
5461 
 
5462 
#undef OPRND
5463 
#undef FLD
5464 
  }
5465 
  NEXT (vpc);
5466 
 
5467 
  CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5468 
{
5469 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5470 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5471 
#define FLD(f) abuf->fields.sfmt_slli.f
5472 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5473 
  int UNUSED written = 0;
5474 
  IADDR UNUSED pc = abuf->addr;
5475 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5476 
 
5477 
  {
5478 
    SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5479 
    OPRND (dr) = opval;
5480 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5481 
  }
5482 
 
5483 
#undef OPRND
5484 
#undef FLD
5485 
}
5486 
  NEXT (vpc);
5487 
 
5488 
CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5489 
  {
5490 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5491 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5492 
#define FLD(f) abuf->fields.sfmt_slli.f
5493 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5494 
    int UNUSED written = abuf->written;
5495 
    IADDR UNUSED pc = abuf->addr;
5496 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5497 
 
5498 
  * FLD (i_dr) = OPRND (dr);
5499 
 
5500 
#undef OPRND
5501 
#undef FLD
5502 
  }
5503 
  NEXT (vpc);
5504 
 
5505 
  CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5506 
{
5507 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5508 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5509 
#define FLD(f) abuf->fields.sfmt_add.f
5510 
#define OPRND(f) par_exec->operands.sfmt_add.f
5511 
  int UNUSED written = 0;
5512 
  IADDR UNUSED pc = abuf->addr;
5513 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5514 
 
5515 
  {
5516 
    SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5517 
    OPRND (dr) = opval;
5518 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5519 
  }
5520 
 
5521 
#undef OPRND
5522 
#undef FLD
5523 
}
5524 
  NEXT (vpc);
5525 
 
5526 
CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5527 
  {
5528 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5529 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5530 
#define FLD(f) abuf->fields.sfmt_add.f
5531 
#define OPRND(f) par_exec->operands.sfmt_add.f
5532 
    int UNUSED written = abuf->written;
5533 
    IADDR UNUSED pc = abuf->addr;
5534 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5535 
 
5536 
  * FLD (i_dr) = OPRND (dr);
5537 
 
5538 
#undef OPRND
5539 
#undef FLD
5540 
  }
5541 
  NEXT (vpc);
5542 
 
5543 
  CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5544 
{
5545 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5546 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5547 
#define FLD(f) abuf->fields.sfmt_slli.f
5548 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5549 
  int UNUSED written = 0;
5550 
  IADDR UNUSED pc = abuf->addr;
5551 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5552 
 
5553 
  {
5554 
    SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5555 
    OPRND (dr) = opval;
5556 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5557 
  }
5558 
 
5559 
#undef OPRND
5560 
#undef FLD
5561 
}
5562 
  NEXT (vpc);
5563 
 
5564 
CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5565 
  {
5566 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5567 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5568 
#define FLD(f) abuf->fields.sfmt_slli.f
5569 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5570 
    int UNUSED written = abuf->written;
5571 
    IADDR UNUSED pc = abuf->addr;
5572 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5573 
 
5574 
  * FLD (i_dr) = OPRND (dr);
5575 
 
5576 
#undef OPRND
5577 
#undef FLD
5578 
  }
5579 
  NEXT (vpc);
5580 
 
5581 
  CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5582 
{
5583 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5584 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5585 
#define FLD(f) abuf->fields.sfmt_add.f
5586 
#define OPRND(f) par_exec->operands.sfmt_add.f
5587 
  int UNUSED written = 0;
5588 
  IADDR UNUSED pc = abuf->addr;
5589 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5590 
 
5591 
  {
5592 
    SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5593 
    OPRND (dr) = opval;
5594 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5595 
  }
5596 
 
5597 
#undef OPRND
5598 
#undef FLD
5599 
}
5600 
  NEXT (vpc);
5601 
 
5602 
CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5603 
  {
5604 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5605 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5606 
#define FLD(f) abuf->fields.sfmt_add.f
5607 
#define OPRND(f) par_exec->operands.sfmt_add.f
5608 
    int UNUSED written = abuf->written;
5609 
    IADDR UNUSED pc = abuf->addr;
5610 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5611 
 
5612 
  * FLD (i_dr) = OPRND (dr);
5613 
 
5614 
#undef OPRND
5615 
#undef FLD
5616 
  }
5617 
  NEXT (vpc);
5618 
 
5619 
  CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5620 
{
5621 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5622 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5623 
#define FLD(f) abuf->fields.sfmt_slli.f
5624 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5625 
  int UNUSED written = 0;
5626 
  IADDR UNUSED pc = abuf->addr;
5627 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5628 
 
5629 
  {
5630 
    SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5631 
    OPRND (dr) = opval;
5632 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5633 
  }
5634 
 
5635 
#undef OPRND
5636 
#undef FLD
5637 
}
5638 
  NEXT (vpc);
5639 
 
5640 
CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5641 
  {
5642 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5643 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5644 
#define FLD(f) abuf->fields.sfmt_slli.f
5645 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5646 
    int UNUSED written = abuf->written;
5647 
    IADDR UNUSED pc = abuf->addr;
5648 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5649 
 
5650 
  * FLD (i_dr) = OPRND (dr);
5651 
 
5652 
#undef OPRND
5653 
#undef FLD
5654 
  }
5655 
  NEXT (vpc);
5656 
 
5657 
  CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5658 
{
5659 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5660 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5661 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5662 
#define OPRND(f) par_exec->operands.sfmt_st.f
5663 
  int UNUSED written = 0;
5664 
  IADDR UNUSED pc = abuf->addr;
5665 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5666 
 
5667 
  {
5668 
    SI opval = * FLD (i_src1);
5669 
    OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
5670 
    OPRND (h_memory_SI_src2) = opval;
5671 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5672 
  }
5673 
 
5674 
#undef OPRND
5675 
#undef FLD
5676 
}
5677 
  NEXT (vpc);
5678 
 
5679 
CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5680 
  {
5681 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5682 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5683 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5684 
#define OPRND(f) par_exec->operands.sfmt_st.f
5685 
    int UNUSED written = abuf->written;
5686 
    IADDR UNUSED pc = abuf->addr;
5687 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5688 
 
5689 
  SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
5690 
 
5691 
#undef OPRND
5692 
#undef FLD
5693 
  }
5694 
  NEXT (vpc);
5695 
 
5696 
  CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5697 
{
5698 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5699 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5700 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5701 
#define OPRND(f) par_exec->operands.sfmt_stb.f
5702 
  int UNUSED written = 0;
5703 
  IADDR UNUSED pc = abuf->addr;
5704 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5705 
 
5706 
  {
5707 
    QI opval = * FLD (i_src1);
5708 
    OPRND (h_memory_QI_src2_idx) = * FLD (i_src2);
5709 
    OPRND (h_memory_QI_src2) = opval;
5710 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5711 
  }
5712 
 
5713 
#undef OPRND
5714 
#undef FLD
5715 
}
5716 
  NEXT (vpc);
5717 
 
5718 
CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5719 
  {
5720 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5721 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5722 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5723 
#define OPRND(f) par_exec->operands.sfmt_stb.f
5724 
    int UNUSED written = abuf->written;
5725 
    IADDR UNUSED pc = abuf->addr;
5726 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5727 
 
5728 
  SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2));
5729 
 
5730 
#undef OPRND
5731 
#undef FLD
5732 
  }
5733 
  NEXT (vpc);
5734 
 
5735 
  CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5736 
{
5737 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5738 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5739 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5740 
#define OPRND(f) par_exec->operands.sfmt_sth.f
5741 
  int UNUSED written = 0;
5742 
  IADDR UNUSED pc = abuf->addr;
5743 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5744 
 
5745 
  {
5746 
    HI opval = * FLD (i_src1);
5747 
    OPRND (h_memory_HI_src2_idx) = * FLD (i_src2);
5748 
    OPRND (h_memory_HI_src2) = opval;
5749 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5750 
  }
5751 
 
5752 
#undef OPRND
5753 
#undef FLD
5754 
}
5755 
  NEXT (vpc);
5756 
 
5757 
CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5758 
  {
5759 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5760 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5761 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5762 
#define OPRND(f) par_exec->operands.sfmt_sth.f
5763 
    int UNUSED written = abuf->written;
5764 
    IADDR UNUSED pc = abuf->addr;
5765 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5766 
 
5767 
  SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2));
5768 
 
5769 
#undef OPRND
5770 
#undef FLD
5771 
  }
5772 
  NEXT (vpc);
5773 
 
5774 
  CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5775 
{
5776 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5777 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5778 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5779 
#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5780 
  int UNUSED written = 0;
5781 
  IADDR UNUSED pc = abuf->addr;
5782 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5783 
 
5784 
{
5785 
  SI tmp_new_src2;
5786 
  tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5787 
  {
5788 
    SI opval = * FLD (i_src1);
5789 
    OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5790 
    OPRND (h_memory_SI_new_src2) = opval;
5791 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5792 
  }
5793 
  {
5794 
    SI opval = tmp_new_src2;
5795 
    OPRND (src2) = opval;
5796 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5797 
  }
5798 
}
5799 
 
5800 
#undef OPRND
5801 
#undef FLD
5802 
}
5803 
  NEXT (vpc);
5804 
 
5805 
CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5806 
  {
5807 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5808 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5809 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5810 
#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5811 
    int UNUSED written = abuf->written;
5812 
    IADDR UNUSED pc = abuf->addr;
5813 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5814 
 
5815 
  SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5816 
  * FLD (i_src2) = OPRND (src2);
5817 
 
5818 
#undef OPRND
5819 
#undef FLD
5820 
  }
5821 
  NEXT (vpc);
5822 
 
5823 
  CASE (sem, INSN_PAR_STH_PLUS) : /* sth $src1,@$src2+ */
5824 
{
5825 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5826 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5827 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5828 
#define OPRND(f) par_exec->operands.sfmt_sth_plus.f
5829 
  int UNUSED written = 0;
5830 
  IADDR UNUSED pc = abuf->addr;
5831 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5832 
 
5833 
{
5834 
  SI tmp_new_src2;
5835 
  tmp_new_src2 = * FLD (i_src2);
5836 
  {
5837 
    HI opval = * FLD (i_src1);
5838 
    OPRND (h_memory_HI_new_src2_idx) = tmp_new_src2;
5839 
    OPRND (h_memory_HI_new_src2) = opval;
5840 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5841 
  }
5842 
  {
5843 
    SI opval = ADDSI (tmp_new_src2, 2);
5844 
    OPRND (src2) = opval;
5845 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5846 
  }
5847 
}
5848 
 
5849 
#undef OPRND
5850 
#undef FLD
5851 
}
5852 
  NEXT (vpc);
5853 
 
5854 
CASE (sem, INSN_WRITE_STH_PLUS) : /* sth $src1,@$src2+ */
5855 
  {
5856 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5857 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5858 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5859 
#define OPRND(f) par_exec->operands.sfmt_sth_plus.f
5860 
    int UNUSED written = abuf->written;
5861 
    IADDR UNUSED pc = abuf->addr;
5862 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5863 
 
5864 
  SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_new_src2_idx), OPRND (h_memory_HI_new_src2));
5865 
  * FLD (i_src2) = OPRND (src2);
5866 
 
5867 
#undef OPRND
5868 
#undef FLD
5869 
  }
5870 
  NEXT (vpc);
5871 
 
5872 
  CASE (sem, INSN_PAR_STB_PLUS) : /* stb $src1,@$src2+ */
5873 
{
5874 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5875 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5876 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5877 
#define OPRND(f) par_exec->operands.sfmt_stb_plus.f
5878 
  int UNUSED written = 0;
5879 
  IADDR UNUSED pc = abuf->addr;
5880 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5881 
 
5882 
{
5883 
  SI tmp_new_src2;
5884 
  tmp_new_src2 = * FLD (i_src2);
5885 
  {
5886 
    QI opval = * FLD (i_src1);
5887 
    OPRND (h_memory_QI_new_src2_idx) = tmp_new_src2;
5888 
    OPRND (h_memory_QI_new_src2) = opval;
5889 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5890 
  }
5891 
  {
5892 
    SI opval = ADDSI (tmp_new_src2, 1);
5893 
    OPRND (src2) = opval;
5894 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5895 
  }
5896 
}
5897 
 
5898 
#undef OPRND
5899 
#undef FLD
5900 
}
5901 
  NEXT (vpc);
5902 
 
5903 
CASE (sem, INSN_WRITE_STB_PLUS) : /* stb $src1,@$src2+ */
5904 
  {
5905 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5906 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5907 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5908 
#define OPRND(f) par_exec->operands.sfmt_stb_plus.f
5909 
    int UNUSED written = abuf->written;
5910 
    IADDR UNUSED pc = abuf->addr;
5911 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5912 
 
5913 
  SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_new_src2_idx), OPRND (h_memory_QI_new_src2));
5914 
  * FLD (i_src2) = OPRND (src2);
5915 
 
5916 
#undef OPRND
5917 
#undef FLD
5918 
  }
5919 
  NEXT (vpc);
5920 
 
5921 
  CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
5922 
{
5923 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5924 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5925 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5926 
#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5927 
  int UNUSED written = 0;
5928 
  IADDR UNUSED pc = abuf->addr;
5929 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5930 
 
5931 
{
5932 
  SI tmp_new_src2;
5933 
  tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
5934 
  {
5935 
    SI opval = * FLD (i_src1);
5936 
    OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5937 
    OPRND (h_memory_SI_new_src2) = opval;
5938 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5939 
  }
5940 
  {
5941 
    SI opval = tmp_new_src2;
5942 
    OPRND (src2) = opval;
5943 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5944 
  }
5945 
}
5946 
 
5947 
#undef OPRND
5948 
#undef FLD
5949 
}
5950 
  NEXT (vpc);
5951 
 
5952 
CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
5953 
  {
5954 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5955 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5956 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5957 
#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5958 
    int UNUSED written = abuf->written;
5959 
    IADDR UNUSED pc = abuf->addr;
5960 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5961 
 
5962 
  SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5963 
  * FLD (i_src2) = OPRND (src2);
5964 
 
5965 
#undef OPRND
5966 
#undef FLD
5967 
  }
5968 
  NEXT (vpc);
5969 
 
5970 
  CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
5971 
{
5972 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5973 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5974 
#define FLD(f) abuf->fields.sfmt_add.f
5975 
#define OPRND(f) par_exec->operands.sfmt_add.f
5976 
  int UNUSED written = 0;
5977 
  IADDR UNUSED pc = abuf->addr;
5978 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5979 
 
5980 
  {
5981 
    SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
5982 
    OPRND (dr) = opval;
5983 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5984 
  }
5985 
 
5986 
#undef OPRND
5987 
#undef FLD
5988 
}
5989 
  NEXT (vpc);
5990 
 
5991 
CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
5992 
  {
5993 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5994 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5995 
#define FLD(f) abuf->fields.sfmt_add.f
5996 
#define OPRND(f) par_exec->operands.sfmt_add.f
5997 
    int UNUSED written = abuf->written;
5998 
    IADDR UNUSED pc = abuf->addr;
5999 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6000 
 
6001 
  * FLD (i_dr) = OPRND (dr);
6002 
 
6003 
#undef OPRND
6004 
#undef FLD
6005 
  }
6006 
  NEXT (vpc);
6007 
 
6008 
  CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
6009 
{
6010 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6011 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6012 
#define FLD(f) abuf->fields.sfmt_add.f
6013 
#define OPRND(f) par_exec->operands.sfmt_addv.f
6014 
  int UNUSED written = 0;
6015 
  IADDR UNUSED pc = abuf->addr;
6016 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6017 
 
6018 
{
6019 
  SI temp0;BI temp1;
6020 
  temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
6021 
  temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
6022 
  {
6023 
    SI opval = temp0;
6024 
    OPRND (dr) = opval;
6025 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6026 
  }
6027 
  {
6028 
    BI opval = temp1;
6029 
    OPRND (condbit) = opval;
6030 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6031 
  }
6032 
}
6033 
 
6034 
#undef OPRND
6035 
#undef FLD
6036 
}
6037 
  NEXT (vpc);
6038 
 
6039 
CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
6040 
  {
6041 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6042 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6043 
#define FLD(f) abuf->fields.sfmt_add.f
6044 
#define OPRND(f) par_exec->operands.sfmt_addv.f
6045 
    int UNUSED written = abuf->written;
6046 
    IADDR UNUSED pc = abuf->addr;
6047 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6048 
 
6049 
  CPU (h_cond) = OPRND (condbit);
6050 
  * FLD (i_dr) = OPRND (dr);
6051 
 
6052 
#undef OPRND
6053 
#undef FLD
6054 
  }
6055 
  NEXT (vpc);
6056 
 
6057 
  CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
6058 
{
6059 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6060 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6061 
#define FLD(f) abuf->fields.sfmt_add.f
6062 
#define OPRND(f) par_exec->operands.sfmt_addx.f
6063 
  int UNUSED written = 0;
6064 
  IADDR UNUSED pc = abuf->addr;
6065 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6066 
 
6067 
{
6068 
  SI temp0;BI temp1;
6069 
  temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6070 
  temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6071 
  {
6072 
    SI opval = temp0;
6073 
    OPRND (dr) = opval;
6074 
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6075 
  }
6076 
  {
6077 
    BI opval = temp1;
6078 
    OPRND (condbit) = opval;
6079 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6080 
  }
6081 
}
6082 
 
6083 
#undef OPRND
6084 
#undef FLD
6085 
}
6086 
  NEXT (vpc);
6087 
 
6088 
CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
6089 
  {
6090 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6091 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6092 
#define FLD(f) abuf->fields.sfmt_add.f
6093 
#define OPRND(f) par_exec->operands.sfmt_addx.f
6094 
    int UNUSED written = abuf->written;
6095 
    IADDR UNUSED pc = abuf->addr;
6096 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6097 
 
6098 
  CPU (h_cond) = OPRND (condbit);
6099 
  * FLD (i_dr) = OPRND (dr);
6100 
 
6101 
#undef OPRND
6102 
#undef FLD
6103 
  }
6104 
  NEXT (vpc);
6105 
 
6106 
  CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
6107 
{
6108 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6109 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6110 
#define FLD(f) abuf->fields.sfmt_trap.f
6111 
#define OPRND(f) par_exec->operands.sfmt_trap.f
6112 
  int UNUSED written = 0;
6113 
  IADDR UNUSED pc = abuf->addr;
6114 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6115 
 
6116 
{
6117 
  {
6118 
    USI opval = GET_H_CR (((UINT) 6));
6119 
    OPRND (h_cr_USI_14) = opval;
6120 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6121 
  }
6122 
  {
6123 
    USI opval = ADDSI (pc, 4);
6124 
    OPRND (h_cr_USI_6) = opval;
6125 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6126 
  }
6127 
  {
6128 
    UQI opval = CPU (h_bpsw);
6129 
    OPRND (h_bbpsw_UQI) = opval;
6130 
    TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
6131 
  }
6132 
  {
6133 
    UQI opval = GET_H_PSW ();
6134 
    OPRND (h_bpsw_UQI) = opval;
6135 
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
6136 
  }
6137 
  {
6138 
    UQI opval = ANDQI (GET_H_PSW (), 128);
6139 
    OPRND (h_psw_UQI) = opval;
6140 
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
6141 
  }
6142 
  {
6143 
    SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
6144 
    OPRND (pc) = opval;
6145 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6146 
  }
6147 
}
6148 
 
6149 
#undef OPRND
6150 
#undef FLD
6151 
}
6152 
  NEXT (vpc);
6153 
 
6154 
CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
6155 
  {
6156 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6157 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6158 
#define FLD(f) abuf->fields.sfmt_trap.f
6159 
#define OPRND(f) par_exec->operands.sfmt_trap.f
6160 
    int UNUSED written = abuf->written;
6161 
    IADDR UNUSED pc = abuf->addr;
6162 
    SEM_BRANCH_INIT
6163 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6164 
 
6165 
  CPU (h_bbpsw) = OPRND (h_bbpsw_UQI);
6166 
  CPU (h_bpsw) = OPRND (h_bpsw_UQI);
6167 
  SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14));
6168 
  SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
6169 
  SET_H_PSW (OPRND (h_psw_UQI));
6170 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
6171 
 
6172 
  SEM_BRANCH_FINI (vpc);
6173 
#undef OPRND
6174 
#undef FLD
6175 
  }
6176 
  NEXT (vpc);
6177 
 
6178 
  CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
6179 
{
6180 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6181 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6182 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6183 
#define OPRND(f) par_exec->operands.sfmt_unlock.f
6184 
  int UNUSED written = 0;
6185 
  IADDR UNUSED pc = abuf->addr;
6186 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6187 
 
6188 
{
6189 
if (CPU (h_lock)) {
6190 
  {
6191 
    SI opval = * FLD (i_src1);
6192 
    OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
6193 
    OPRND (h_memory_SI_src2) = opval;
6194 
    written |= (1 << 4);
6195 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6196 
  }
6197 
}
6198 
  {
6199 
    BI opval = 0;
6200 
    OPRND (h_lock_BI) = opval;
6201 
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
6202 
  }
6203 
}
6204 
 
6205 
  abuf->written = written;
6206 
#undef OPRND
6207 
#undef FLD
6208 
}
6209 
  NEXT (vpc);
6210 
 
6211 
CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
6212 
  {
6213 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6214 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6215 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6216 
#define OPRND(f) par_exec->operands.sfmt_unlock.f
6217 
    int UNUSED written = abuf->written;
6218 
    IADDR UNUSED pc = abuf->addr;
6219 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6220 
 
6221 
  CPU (h_lock) = OPRND (h_lock_BI);
6222 
  if (written & (1 << 4))
6223 
    {
6224 
      SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
6225 
    }
6226 
 
6227 
#undef OPRND
6228 
#undef FLD
6229 
  }
6230 
  NEXT (vpc);
6231 
 
6232 
  CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
6233 
{
6234 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6235 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6236 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6237 
#define OPRND(f) par_exec->operands.sfmt_cmpz.f
6238 
  int UNUSED written = 0;
6239 
  IADDR UNUSED pc = abuf->addr;
6240 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6241 
 
6242 
  {
6243 
    BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
6244 
    OPRND (condbit) = opval;
6245 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6246 
  }
6247 
 
6248 
#undef OPRND
6249 
#undef FLD
6250 
}
6251 
  NEXT (vpc);
6252 
 
6253 
CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
6254 
  {
6255 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6256 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6257 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6258 
#define OPRND(f) par_exec->operands.sfmt_cmpz.f
6259 
    int UNUSED written = abuf->written;
6260 
    IADDR UNUSED pc = abuf->addr;
6261 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6262 
 
6263 
  CPU (h_cond) = OPRND (condbit);
6264 
 
6265 
#undef OPRND
6266 
#undef FLD
6267 
  }
6268 
  NEXT (vpc);
6269 
 
6270 
  CASE (sem, INSN_PAR_SADD) : /* sadd */
6271 
{
6272 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6273 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6274 
#define FLD(f) abuf->fields.sfmt_empty.f
6275 
#define OPRND(f) par_exec->operands.sfmt_sadd.f
6276 
  int UNUSED written = 0;
6277 
  IADDR UNUSED pc = abuf->addr;
6278 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6279 
 
6280 
  {
6281 
    DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
6282 
    OPRND (h_accums_DI_0) = opval;
6283 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6284 
  }
6285 
 
6286 
#undef OPRND
6287 
#undef FLD
6288 
}
6289 
  NEXT (vpc);
6290 
 
6291 
CASE (sem, INSN_WRITE_SADD) : /* sadd */
6292 
  {
6293 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6294 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6295 
#define FLD(f) abuf->fields.sfmt_empty.f
6296 
#define OPRND(f) par_exec->operands.sfmt_sadd.f
6297 
    int UNUSED written = abuf->written;
6298 
    IADDR UNUSED pc = abuf->addr;
6299 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6300 
 
6301 
  SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0));
6302 
 
6303 
#undef OPRND
6304 
#undef FLD
6305 
  }
6306 
  NEXT (vpc);
6307 
 
6308 
  CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6309 
{
6310 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6311 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6312 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6313 
#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6314 
  int UNUSED written = 0;
6315 
  IADDR UNUSED pc = abuf->addr;
6316 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6317 
 
6318 
  {
6319 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6320 
    OPRND (h_accums_DI_1) = opval;
6321 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6322 
  }
6323 
 
6324 
#undef OPRND
6325 
#undef FLD
6326 
}
6327 
  NEXT (vpc);
6328 
 
6329 
CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6330 
  {
6331 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6332 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6333 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6334 
#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6335 
    int UNUSED written = abuf->written;
6336 
    IADDR UNUSED pc = abuf->addr;
6337 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6338 
 
6339 
  SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6340 
 
6341 
#undef OPRND
6342 
#undef FLD
6343 
  }
6344 
  NEXT (vpc);
6345 
 
6346 
  CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6347 
{
6348 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6349 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6350 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6351 
#define OPRND(f) par_exec->operands.sfmt_msblo.f
6352 
  int UNUSED written = 0;
6353 
  IADDR UNUSED pc = abuf->addr;
6354 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6355 
 
6356 
  {
6357 
    DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6358 
    OPRND (accum) = opval;
6359 
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6360 
  }
6361 
 
6362 
#undef OPRND
6363 
#undef FLD
6364 
}
6365 
  NEXT (vpc);
6366 
 
6367 
CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6368 
  {
6369 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6370 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6371 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6372 
#define OPRND(f) par_exec->operands.sfmt_msblo.f
6373 
    int UNUSED written = abuf->written;
6374 
    IADDR UNUSED pc = abuf->addr;
6375 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6376 
 
6377 
  SET_H_ACCUM (OPRND (accum));
6378 
 
6379 
#undef OPRND
6380 
#undef FLD
6381 
  }
6382 
  NEXT (vpc);
6383 
 
6384 
  CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6385 
{
6386 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6387 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6388 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6389 
#define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6390 
  int UNUSED written = 0;
6391 
  IADDR UNUSED pc = abuf->addr;
6392 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6393 
 
6394 
  {
6395 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6396 
    OPRND (h_accums_DI_1) = opval;
6397 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6398 
  }
6399 
 
6400 
#undef OPRND
6401 
#undef FLD
6402 
}
6403 
  NEXT (vpc);
6404 
 
6405 
CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6406 
  {
6407 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6408 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6409 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6410 
#define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6411 
    int UNUSED written = abuf->written;
6412 
    IADDR UNUSED pc = abuf->addr;
6413 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6414 
 
6415 
  SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6416 
 
6417 
#undef OPRND
6418 
#undef FLD
6419 
  }
6420 
  NEXT (vpc);
6421 
 
6422 
  CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6423 
{
6424 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6425 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6426 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6427 
#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6428 
  int UNUSED written = 0;
6429 
  IADDR UNUSED pc = abuf->addr;
6430 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6431 
 
6432 
  {
6433 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6434 
    OPRND (h_accums_DI_1) = opval;
6435 
    TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6436 
  }
6437 
 
6438 
#undef OPRND
6439 
#undef FLD
6440 
}
6441 
  NEXT (vpc);
6442 
 
6443 
CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6444 
  {
6445 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6446 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6447 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6448 
#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6449 
    int UNUSED written = abuf->written;
6450 
    IADDR UNUSED pc = abuf->addr;
6451 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6452 
 
6453 
  SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6454 
 
6455 
#undef OPRND
6456 
#undef FLD
6457 
  }
6458 
  NEXT (vpc);
6459 
 
6460 
  CASE (sem, INSN_PAR_SC) : /* sc */
6461 
{
6462 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6463 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6464 
#define FLD(f) abuf->fields.sfmt_empty.f
6465 
#define OPRND(f) par_exec->operands.sfmt_sc.f
6466 
  int UNUSED written = 0;
6467 
  IADDR UNUSED pc = abuf->addr;
6468 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6469 
 
6470 
if (ZEXTBISI (CPU (h_cond)))
6471 
  SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6472 
 
6473 
#undef OPRND
6474 
#undef FLD
6475 
}
6476 
  NEXT (vpc);
6477 
 
6478 
CASE (sem, INSN_WRITE_SC) : /* sc */
6479 
  {
6480 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6481 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6482 
#define FLD(f) abuf->fields.sfmt_empty.f
6483 
#define OPRND(f) par_exec->operands.sfmt_sc.f
6484 
    int UNUSED written = abuf->written;
6485 
    IADDR UNUSED pc = abuf->addr;
6486 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6487 
 
6488 
 
6489 
#undef OPRND
6490 
#undef FLD
6491 
  }
6492 
  NEXT (vpc);
6493 
 
6494 
  CASE (sem, INSN_PAR_SNC) : /* snc */
6495 
{
6496 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6497 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6498 
#define FLD(f) abuf->fields.sfmt_empty.f
6499 
#define OPRND(f) par_exec->operands.sfmt_sc.f
6500 
  int UNUSED written = 0;
6501 
  IADDR UNUSED pc = abuf->addr;
6502 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6503 
 
6504 
if (ZEXTBISI (NOTBI (CPU (h_cond))))
6505 
  SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6506 
 
6507 
#undef OPRND
6508 
#undef FLD
6509 
}
6510 
  NEXT (vpc);
6511 
 
6512 
CASE (sem, INSN_WRITE_SNC) : /* snc */
6513 
  {
6514 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6515 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6516 
#define FLD(f) abuf->fields.sfmt_empty.f
6517 
#define OPRND(f) par_exec->operands.sfmt_sc.f
6518 
    int UNUSED written = abuf->written;
6519 
    IADDR UNUSED pc = abuf->addr;
6520 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6521 
 
6522 
 
6523 
#undef OPRND
6524 
#undef FLD
6525 
  }
6526 
  NEXT (vpc);
6527 
 
6528 
  CASE (sem, INSN_PAR_CLRPSW) : /* clrpsw $uimm8 */
6529 
{
6530 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6531 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6532 
#define FLD(f) abuf->fields.sfmt_clrpsw.f
6533 
#define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6534 
  int UNUSED written = 0;
6535 
  IADDR UNUSED pc = abuf->addr;
6536 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6537 
 
6538 
  {
6539 
    USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280));
6540 
    OPRND (h_cr_USI_0) = opval;
6541 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6542 
  }
6543 
 
6544 
#undef OPRND
6545 
#undef FLD
6546 
}
6547 
  NEXT (vpc);
6548 
 
6549 
CASE (sem, INSN_WRITE_CLRPSW) : /* clrpsw $uimm8 */
6550 
  {
6551 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6552 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6553 
#define FLD(f) abuf->fields.sfmt_clrpsw.f
6554 
#define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6555 
    int UNUSED written = abuf->written;
6556 
    IADDR UNUSED pc = abuf->addr;
6557 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6558 
 
6559 
  SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6560 
 
6561 
#undef OPRND
6562 
#undef FLD
6563 
  }
6564 
  NEXT (vpc);
6565 
 
6566 
  CASE (sem, INSN_PAR_SETPSW) : /* setpsw $uimm8 */
6567 
{
6568 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6569 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6570 
#define FLD(f) abuf->fields.sfmt_clrpsw.f
6571 
#define OPRND(f) par_exec->operands.sfmt_setpsw.f
6572 
  int UNUSED written = 0;
6573 
  IADDR UNUSED pc = abuf->addr;
6574 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6575 
 
6576 
  {
6577 
    USI opval = FLD (f_uimm8);
6578 
    OPRND (h_cr_USI_0) = opval;
6579 
    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6580 
  }
6581 
 
6582 
#undef OPRND
6583 
#undef FLD
6584 
}
6585 
  NEXT (vpc);
6586 
 
6587 
CASE (sem, INSN_WRITE_SETPSW) : /* setpsw $uimm8 */
6588 
  {
6589 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6590 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6591 
#define FLD(f) abuf->fields.sfmt_clrpsw.f
6592 
#define OPRND(f) par_exec->operands.sfmt_setpsw.f
6593 
    int UNUSED written = abuf->written;
6594 
    IADDR UNUSED pc = abuf->addr;
6595 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6596 
 
6597 
  SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6598 
 
6599 
#undef OPRND
6600 
#undef FLD
6601 
  }
6602 
  NEXT (vpc);
6603 
 
6604 
  CASE (sem, INSN_PAR_BTST) : /* btst $uimm3,$sr */
6605 
{
6606 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6607 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6608 
#define FLD(f) abuf->fields.sfmt_bset.f
6609 
#define OPRND(f) par_exec->operands.sfmt_btst.f
6610 
  int UNUSED written = 0;
6611 
  IADDR UNUSED pc = abuf->addr;
6612 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6613 
 
6614 
  {
6615 
    BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
6616 
    OPRND (condbit) = opval;
6617 
    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6618 
  }
6619 
 
6620 
#undef OPRND
6621 
#undef FLD
6622 
}
6623 
  NEXT (vpc);
6624 
 
6625 
CASE (sem, INSN_WRITE_BTST) : /* btst $uimm3,$sr */
6626 
  {
6627 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6628 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6629 
#define FLD(f) abuf->fields.sfmt_bset.f
6630 
#define OPRND(f) par_exec->operands.sfmt_btst.f
6631 
    int UNUSED written = abuf->written;
6632 
    IADDR UNUSED pc = abuf->addr;
6633 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6634 
 
6635 
  CPU (h_cond) = OPRND (condbit);
6636 
 
6637 
#undef OPRND
6638 
#undef FLD
6639 
  }
6640 
  NEXT (vpc);
6641 
 
6642 
 
6643 
    }
6644 
  ENDSWITCH (sem) /* End of semantic switch.  */
6645 
 
6646 
  /* At this point `vpc' contains the next insn to execute.  */
6647 
}
6648 
 
6649 
#undef DEFINE_SWITCH
6650 
#endif /* DEFINE_SWITCH */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.