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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [mn10300/] [dv-mn103ser.c] - Blame information for rev 862

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1 227 jeremybenn 
/*  This file is part of the program GDB, the GNU debugger.
2 
 
3 
    Copyright (C) 1998, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
4 
    Contributed by Cygnus Solutions.
5 
 
6 
    This program is free software; you can redistribute it and/or modify
7 
    it under the terms of the GNU General Public License as published by
8 
    the Free Software Foundation; either version 3 of the License, or
9 
    (at your option) any later version.
10 
 
11 
    This program is distributed in the hope that it will be useful,
12 
    but WITHOUT ANY WARRANTY; without even the implied warranty of
13 
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 
    GNU General Public License for more details.
15 
 
16 
    You should have received a copy of the GNU General Public License
17 
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
18 
 
19 
    */
20 
 
21 
#include "sim-main.h"
22 
#include "hw-main.h"
23 
#include "dv-sockser.h"
24 
 
25 
 
26 
/* DEVICE
27 
 
28 
 
29 
   mn103ser - mn103002 serial devices 0, 1 and 2.
30 
 
31 
 
32 
   DESCRIPTION
33 
 
34 
   Implements the mn103002 serial interfaces as described in the
35 
   mn103002 user guide.
36 
 
37 
 
38 
   PROPERTIES
39 
 
40 
   reg = <serial-addr> <serial-size>
41 
 
42 
 
43 
   BUGS
44 
 
45 
   */
46 
 
47 
 
48 
/* The serial devices' registers' address block */
49 
 
50 
struct mn103ser_block {
51 
  unsigned_word base;
52 
  unsigned_word bound;
53 
};
54 
 
55 
 
56 
 
57 
enum serial_register_types {
58 
    SC0CTR,
59 
    SC1CTR,
60 
    SC2CTR,
61 
    SC0ICR,
62 
    SC1ICR,
63 
    SC2ICR,
64 
    SC0TXB,
65 
    SC1TXB,
66 
    SC2TXB,
67 
    SC0RXB,
68 
    SC1RXB,
69 
    SC2RXB,
70 
    SC0STR,
71 
    SC1STR,
72 
    SC2STR,
73 
    SC2TIM,
74 
};
75 
 
76 
 
77 
/* Access dv-sockser state */
78 
extern char* sockser_addr;
79 
#define USE_SOCKSER_P (sockser_addr != NULL)
80 
 
81 
 
82 
#define NR_SERIAL_DEVS  3
83 
#define SIO_STAT_RRDY 0x0010
84 
 
85 
typedef struct _mn10300_serial {
86 
  unsigned16 status, control;
87 
  unsigned8  txb, rxb, intmode;
88 
  struct hw_event *event;
89 
} mn10300_serial;
90 
 
91 
 
92 
 
93 
struct mn103ser {
94 
  struct mn103ser_block block;
95 
  mn10300_serial device[NR_SERIAL_DEVS];
96 
  unsigned8      serial2_timer_reg;
97 
  do_hw_poll_read_method *reader;
98 
};
99 
 
100 
/* output port ID's */
101 
 
102 
/* for mn103002 */
103 
enum {
104 
  SERIAL0_RECEIVE,
105 
  SERIAL1_RECEIVE,
106 
  SERIAL2_RECEIVE,
107 
  SERIAL0_SEND,
108 
  SERIAL1_SEND,
109 
  SERIAL2_SEND,
110 
};
111 
 
112 
 
113 
static const struct hw_port_descriptor mn103ser_ports[] = {
114 
 
115 
  { "serial-0-receive",  SERIAL0_RECEIVE, 0, output_port, },
116 
  { "serial-1-receive",  SERIAL1_RECEIVE, 0, output_port, },
117 
  { "serial-2-receive",  SERIAL2_RECEIVE, 0, output_port, },
118 
  { "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
119 
  { "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
120 
  { "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
121 
 
122 
  { NULL, },
123 
};
124 
 
125 
 
126 
 
127 
/* Finish off the partially created hw device.  Attach our local
128 
   callbacks.  Wire up our port names etc */
129 
 
130 
static hw_io_read_buffer_method mn103ser_io_read_buffer;
131 
static hw_io_write_buffer_method mn103ser_io_write_buffer;
132 
 
133 
static void
134 
attach_mn103ser_regs (struct hw *me,
135 
                      struct mn103ser *serial)
136 
{
137 
  unsigned_word attach_address;
138 
  int attach_space;
139 
  unsigned attach_size;
140 
  reg_property_spec reg;
141 
 
142 
  if (hw_find_property (me, "reg") == NULL)
143 
    hw_abort (me, "Missing \"reg\" property");
144 
 
145 
  if (!hw_find_reg_array_property (me, "reg", 0, &reg))
146 
    hw_abort (me, "\"reg\" property must contain three addr/size entries");
147 
  hw_unit_address_to_attach_address (hw_parent (me),
148 
                                     &reg.address,
149 
                                     &attach_space,
150 
                                     &attach_address,
151 
                                     me);
152 
  serial->block.base = attach_address;
153 
  hw_unit_size_to_attach_size (hw_parent (me),
154 
                               &reg.size,
155 
                               &attach_size, me);
156 
  serial->block.bound = attach_address + (attach_size - 1);
157 
  hw_attach_address (hw_parent (me),
158 
                     0,
159 
                     attach_space, attach_address, attach_size,
160 
                     me);
161 
}
162 
 
163 
static void
164 
mn103ser_finish (struct hw *me)
165 
{
166 
  struct mn103ser *serial;
167 
  int i;
168 
 
169 
  serial = HW_ZALLOC (me, struct mn103ser);
170 
  set_hw_data (me, serial);
171 
  set_hw_io_read_buffer (me, mn103ser_io_read_buffer);
172 
  set_hw_io_write_buffer (me, mn103ser_io_write_buffer);
173 
  set_hw_ports (me, mn103ser_ports);
174 
 
175 
  /* Attach ourself to our parent bus */
176 
  attach_mn103ser_regs (me, serial);
177 
 
178 
  /* If so configured, enable polled input */
179 
  if (hw_find_property (me, "poll?") != NULL
180 
      && hw_find_boolean_property (me, "poll?"))
181 
    {
182 
      serial->reader = sim_io_poll_read;
183 
    }
184 
  else
185 
    {
186 
      serial->reader = sim_io_read;
187 
    }
188 
 
189 
  /* Initialize the serial device registers. */
190 
  for ( i=0; i<NR_SERIAL_DEVS; ++i )
191 
    {
192 
      serial->device[i].txb = 0;
193 
      serial->device[i].rxb = 0;
194 
      serial->device[i].status = 0;
195 
      serial->device[i].control = 0;
196 
      serial->device[i].intmode = 0;
197 
      serial->device[i].event = NULL;
198 
    }
199 
}
200 
 
201 
 
202 
/* read and write */
203 
 
204 
static int
205 
decode_addr (struct hw *me,
206 
             struct mn103ser *serial,
207 
             unsigned_word address)
208 
{
209 
  unsigned_word offset;
210 
  offset = address - serial->block.base;
211 
  switch (offset)
212 
    {
213 
    case 0x00: return SC0CTR;
214 
    case 0x04: return SC0ICR;
215 
    case 0x08: return SC0TXB;
216 
    case 0x09: return SC0RXB;
217 
    case 0x0C: return SC0STR;
218 
    case 0x10: return SC1CTR;
219 
    case 0x14: return SC1ICR;
220 
    case 0x18: return SC1TXB;
221 
    case 0x19: return SC1RXB;
222 
    case 0x1C: return SC1STR;
223 
    case 0x20: return SC2CTR;
224 
    case 0x24: return SC2ICR;
225 
    case 0x28: return SC2TXB;
226 
    case 0x29: return SC2RXB;
227 
    case 0x2C: return SC2STR;
228 
    case 0x2D: return SC2TIM;
229 
    default:
230 
      {
231 
        hw_abort (me, "bad address");
232 
        return -1;
233 
      }
234 
    }
235 
}
236 
 
237 
static void
238 
do_polling_event (struct hw *me,
239 
                  void *data)
240 
{
241 
  struct mn103ser *serial = hw_data(me);
242 
  long serial_reg = (long) data;
243 
  char c;
244 
  int count;
245 
 
246 
  if(USE_SOCKSER_P)
247 
    {
248 
      int rd;
249 
      rd = dv_sockser_read (hw_system (me));
250 
      if(rd != -1)
251 
        {
252 
          c = (char) rd;
253 
          count = 1;
254 
        }
255 
      else
256 
        {
257 
          count = HW_IO_NOT_READY;
258 
        }
259 
    }
260 
  else
261 
    {
262 
      count = do_hw_poll_read (me, serial->reader,
263 
                               0/*STDIN*/, &c, sizeof(c));
264 
    }
265 
 
266 
 
267 
  switch (count)
268 
    {
269 
    case HW_IO_NOT_READY:
270 
    case HW_IO_EOF:
271 
      serial->device[serial_reg].rxb = 0;
272 
      serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
273 
      break;
274 
    default:
275 
      serial->device[serial_reg].rxb = c;
276 
      serial->device[serial_reg].status |= SIO_STAT_RRDY;
277 
      hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
278 
    }
279 
 
280 
  /* Schedule next polling event */
281 
  serial->device[serial_reg].event
282 
    = hw_event_queue_schedule (me, 1000,
283 
                               do_polling_event, (void *)serial_reg);
284 
 
285 
}
286 
 
287 
static void
288 
read_control_reg (struct hw *me,
289 
                  struct mn103ser *serial,
290 
                  unsigned_word serial_reg,
291 
                  void *dest,
292 
                  unsigned  nr_bytes)
293 
{
294 
  /* really allow 1 byte read, too */
295 
  if ( nr_bytes == 2 )
296 
    {
297 
      *(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].control);
298 
    }
299 
  else
300 
    {
301 
      hw_abort (me, "bad read size of %d bytes from SC%dCTR.", nr_bytes,
302 
                serial_reg);
303 
    }
304 
}
305 
 
306 
 
307 
static void
308 
read_intmode_reg (struct hw *me,
309 
                  struct mn103ser *serial,
310 
                  unsigned_word serial_reg,
311 
                  void *dest,
312 
                  unsigned  nr_bytes)
313 
{
314 
  if ( nr_bytes == 1 )
315 
    {
316 
      *(unsigned8 *)dest = serial->device[serial_reg].intmode;
317 
    }
318 
  else
319 
    {
320 
      hw_abort (me, "bad read size of %d bytes from SC%dICR.", nr_bytes,
321 
                serial_reg);
322 
    }
323 
}
324 
 
325 
 
326 
static void
327 
read_txb (struct hw *me,
328 
          struct mn103ser *serial,
329 
          unsigned_word serial_reg,
330 
          void *dest,
331 
          unsigned  nr_bytes)
332 
{
333 
  if ( nr_bytes == 1 )
334 
    {
335 
      *(unsigned8 *)dest = serial->device[serial_reg].txb;
336 
    }
337 
  else
338 
    {
339 
      hw_abort (me, "bad read size of %d bytes from SC%dTXB.", nr_bytes,
340 
                serial_reg);
341 
    }
342 
}
343 
 
344 
 
345 
static void
346 
read_rxb (struct hw *me,
347 
          struct mn103ser *serial,
348 
          unsigned_word serial_reg,
349 
          void *dest,
350 
          unsigned  nr_bytes)
351 
{
352 
  if ( nr_bytes == 1 )
353 
    {
354 
      *(unsigned8 *)dest = serial->device[serial_reg].rxb;
355 
      /* Reception buffer is now empty. */
356 
      serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
357 
    }
358 
  else
359 
    {
360 
      hw_abort (me, "bad read size of %d bytes from SC%dRXB.", nr_bytes,
361 
                serial_reg);
362 
    }
363 
}
364 
 
365 
 
366 
static void
367 
read_status_reg (struct hw *me,
368 
                 struct mn103ser *serial,
369 
                 unsigned_word serial_reg,
370 
                 void *dest,
371 
                 unsigned  nr_bytes)
372 
{
373 
  char c;
374 
  int count;
375 
 
376 
  if ( (serial->device[serial_reg].status & SIO_STAT_RRDY) == 0 )
377 
    {
378 
      /* FIFO is empty */
379 
      /* Kill current poll event */
380 
      if ( NULL != serial->device[serial_reg].event )
381 
        {
382 
          hw_event_queue_deschedule (me, serial->device[serial_reg].event);
383 
          serial->device[serial_reg].event = NULL;
384 
        }
385 
 
386 
      if(USE_SOCKSER_P)
387 
        {
388 
          int rd;
389 
          rd = dv_sockser_read (hw_system (me));
390 
          if(rd != -1)
391 
            {
392 
              c = (char) rd;
393 
              count = 1;
394 
            }
395 
          else
396 
            {
397 
              count = HW_IO_NOT_READY;
398 
            }
399 
        }
400 
      else
401 
        {
402 
          count = do_hw_poll_read (me, serial->reader,
403 
                                   0/*STDIN*/, &c, sizeof(c));
404 
        }
405 
 
406 
      switch (count)
407 
        {
408 
        case HW_IO_NOT_READY:
409 
        case HW_IO_EOF:
410 
          serial->device[serial_reg].rxb = 0;
411 
          serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
412 
          break;
413 
        default:
414 
          serial->device[serial_reg].rxb = c;
415 
          serial->device[serial_reg].status |= SIO_STAT_RRDY;
416 
          hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
417 
        }
418 
 
419 
      /* schedule polling event */
420 
      serial->device[serial_reg].event
421 
        = hw_event_queue_schedule (me, 1000,
422 
                                   do_polling_event,
423 
                                   (void *) (long) serial_reg);
424 
    }
425 
 
426 
  if ( nr_bytes == 1 )
427 
    {
428 
      *(unsigned8 *)dest = (unsigned8)serial->device[serial_reg].status;
429 
    }
430 
  else if ( nr_bytes == 2 && serial_reg != SC2STR )
431 
    {
432 
      *(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].status);
433 
    }
434 
  else
435 
    {
436 
      hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
437 
                serial_reg);
438 
    }
439 
}
440 
 
441 
 
442 
static void
443 
read_serial2_timer_reg (struct hw *me,
444 
                        struct mn103ser *serial,
445 
                        void *dest,
446 
                        unsigned  nr_bytes)
447 
{
448 
  if ( nr_bytes == 1 )
449 
    {
450 
      * (unsigned8 *) dest = (unsigned8) serial->serial2_timer_reg;
451 
    }
452 
  else
453 
    {
454 
      hw_abort (me, "bad read size of %d bytes to SC2TIM.", nr_bytes);
455 
    }
456 
}
457 
 
458 
 
459 
static unsigned
460 
mn103ser_io_read_buffer (struct hw *me,
461 
                         void *dest,
462 
                         int space,
463 
                         unsigned_word base,
464 
                         unsigned nr_bytes)
465 
{
466 
  struct mn103ser *serial = hw_data (me);
467 
  enum serial_register_types serial_reg;
468 
  HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
469 
 
470 
  serial_reg = decode_addr (me, serial, base);
471 
  switch (serial_reg)
472 
    {
473 
    /* control registers */
474 
    case SC0CTR:
475 
    case SC1CTR:
476 
    case SC2CTR:
477 
      read_control_reg(me, serial, serial_reg-SC0CTR, dest, nr_bytes);
478 
      HW_TRACE ((me, "read - ctrl reg%d has 0x%x\n", serial_reg-SC0CTR,
479 
                 *(unsigned8 *)dest));
480 
      break;
481 
 
482 
    /* interrupt mode registers */
483 
    case SC0ICR:
484 
    case SC1ICR:
485 
    case SC2ICR:
486 
      read_intmode_reg(me, serial, serial_reg-SC0ICR, dest, nr_bytes);
487 
      HW_TRACE ((me, "read - intmode reg%d has 0x%x\n", serial_reg-SC0ICR,
488 
                 *(unsigned8 *)dest));
489 
      break;
490 
 
491 
    /* transmission buffers */
492 
    case SC0TXB:
493 
    case SC1TXB:
494 
    case SC2TXB:
495 
      read_txb(me, serial, serial_reg-SC0TXB, dest, nr_bytes);
496 
      HW_TRACE ((me, "read - txb%d has %c\n", serial_reg-SC0TXB,
497 
                 *(char *)dest));
498 
      break;
499 
 
500 
    /* reception buffers */
501 
    case SC0RXB:
502 
    case SC1RXB:
503 
    case SC2RXB:
504 
      read_rxb(me, serial, serial_reg-SC0RXB, dest, nr_bytes);
505 
      HW_TRACE ((me, "read - rxb%d has %c\n", serial_reg-SC0RXB,
506 
                 *(char *)dest));
507 
     break;
508 
 
509 
    /* status registers */
510 
    case SC0STR:
511 
    case SC1STR:
512 
    case SC2STR:
513 
      read_status_reg(me, serial, serial_reg-SC0STR, dest, nr_bytes);
514 
      HW_TRACE ((me, "read - status reg%d has 0x%x\n", serial_reg-SC0STR,
515 
                 *(unsigned8 *)dest));
516 
      break;
517 
 
518 
    case SC2TIM:
519 
      read_serial2_timer_reg(me, serial, dest, nr_bytes);
520 
      HW_TRACE ((me, "read - serial2 timer reg %d\n", *(unsigned8 *)dest));
521 
      break;
522 
 
523 
    default:
524 
      hw_abort(me, "invalid address");
525 
    }
526 
 
527 
  return nr_bytes;
528 
}
529 
 
530 
 
531 
static void
532 
write_control_reg (struct hw *me,
533 
                   struct mn103ser *serial,
534 
                   unsigned_word serial_reg,
535 
                   const void *source,
536 
                   unsigned  nr_bytes)
537 
{
538 
  unsigned16 val = LE2H_2 (*(unsigned16 *)source);
539 
 
540 
  /* really allow 1 byte write, too */
541 
  if ( nr_bytes == 2 )
542 
    {
543 
      if ( serial_reg == 2 && (val & 0x0C04) != 0 )
544 
        {
545 
          hw_abort(me, "Cannot write to read-only bits of SC2CTR.");
546 
        }
547 
      else
548 
        {
549 
          serial->device[serial_reg].control = val;
550 
        }
551 
    }
552 
  else
553 
    {
554 
      hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
555 
                serial_reg);
556 
    }
557 
}
558 
 
559 
 
560 
static void
561 
write_intmode_reg (struct hw *me,
562 
                   struct mn103ser *serial,
563 
                   unsigned_word serial_reg,
564 
                   const void *source,
565 
                   unsigned  nr_bytes)
566 
{
567 
unsigned8 val = *(unsigned8 *)source;
568 
 
569 
  if ( nr_bytes == 1 )
570 
    {
571 
      /* Check for attempt to write to read-only bits of register. */
572 
      if ( ( serial_reg == 2 && (val & 0xCA) != 0 )
573 
           || ( serial_reg != 2 && (val & 0x4A) != 0 ) )
574 
        {
575 
          hw_abort(me, "Cannot write to read-only bits of SC%dICR.",
576 
                   serial_reg);
577 
        }
578 
      else
579 
        {
580 
          serial->device[serial_reg].intmode = val;
581 
        }
582 
    }
583 
  else
584 
    {
585 
      hw_abort (me, "bad write size of %d bytes to SC%dICR.", nr_bytes,
586 
                serial_reg);
587 
    }
588 
}
589 
 
590 
 
591 
static void
592 
write_txb (struct hw *me,
593 
           struct mn103ser *serial,
594 
           unsigned_word serial_reg,
595 
           const void *source,
596 
           unsigned  nr_bytes)
597 
{
598 
  if ( nr_bytes == 1 )
599 
    {
600 
      serial->device[serial_reg].txb = *(unsigned8 *)source;
601 
 
602 
      if(USE_SOCKSER_P)
603 
        {
604 
          dv_sockser_write(hw_system (me), * (char*) source);
605 
        }
606 
      else
607 
        {
608 
          sim_io_write_stdout(hw_system (me), (char *)source, 1);
609 
          sim_io_flush_stdout(hw_system (me));
610 
        }
611 
 
612 
      hw_port_event (me, serial_reg+SERIAL0_SEND, 1);
613 
    }
614 
  else
615 
    {
616 
      hw_abort (me, "bad write size of %d bytes to SC%dTXB.", nr_bytes,
617 
                serial_reg);
618 
    }
619 
}
620 
 
621 
 
622 
static void
623 
write_serial2_timer_reg (struct hw *me,
624 
                         struct mn103ser *serial,
625 
                         const void *source,
626 
                         unsigned  nr_bytes)
627 
{
628 
  if ( nr_bytes == 1 )
629 
    {
630 
      serial->serial2_timer_reg = *(unsigned8 *)source;
631 
    }
632 
  else
633 
    {
634 
      hw_abort (me, "bad write size of %d bytes to SC2TIM.", nr_bytes);
635 
    }
636 
}
637 
 
638 
 
639 
static unsigned
640 
mn103ser_io_write_buffer (struct hw *me,
641 
                          const void *source,
642 
                          int space,
643 
                          unsigned_word base,
644 
                          unsigned nr_bytes)
645 
{
646 
  struct mn103ser *serial = hw_data (me);
647 
  enum serial_register_types serial_reg;
648 
  HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
649 
 
650 
  serial_reg = decode_addr (me, serial, base);
651 
  switch (serial_reg)
652 
    {
653 
    /* control registers */
654 
    case SC0CTR:
655 
    case SC1CTR:
656 
    case SC2CTR:
657 
      HW_TRACE ((me, "write - ctrl reg%d has 0x%x, nrbytes=%d.\n",
658 
                 serial_reg-SC0CTR, *(unsigned8 *)source, nr_bytes));
659 
      write_control_reg(me, serial, serial_reg-SC0CTR, source, nr_bytes);
660 
      break;
661 
 
662 
    /* interrupt mode registers */
663 
    case SC0ICR:
664 
    case SC1ICR:
665 
    case SC2ICR:
666 
      HW_TRACE ((me, "write - intmode reg%d has 0x%x, nrbytes=%d.\n",
667 
                 serial_reg-SC0ICR, *(unsigned8 *)source, nr_bytes));
668 
      write_intmode_reg(me, serial, serial_reg-SC0ICR, source, nr_bytes);
669 
      break;
670 
 
671 
    /* transmission buffers */
672 
    case SC0TXB:
673 
    case SC1TXB:
674 
    case SC2TXB:
675 
      HW_TRACE ((me, "write - txb%d has %c, nrbytes=%d.\n",
676 
                 serial_reg-SC0TXB, *(char *)source, nr_bytes));
677 
      write_txb(me, serial, serial_reg-SC0TXB, source, nr_bytes);
678 
      break;
679 
 
680 
    /* reception buffers */
681 
    case SC0RXB:
682 
    case SC1RXB:
683 
    case SC2RXB:
684 
      hw_abort(me, "Cannot write to reception buffer.");
685 
     break;
686 
 
687 
    /* status registers */
688 
    case SC0STR:
689 
    case SC1STR:
690 
    case SC2STR:
691 
      hw_abort(me, "Cannot write to status register.");
692 
      break;
693 
 
694 
    case SC2TIM:
695 
      HW_TRACE ((me, "read - serial2 timer reg %d (nrbytes=%d)\n",
696 
                 *(unsigned8 *)source, nr_bytes));
697 
      write_serial2_timer_reg(me, serial, source, nr_bytes);
698 
      break;
699 
 
700 
    default:
701 
      hw_abort(me, "invalid address");
702 
    }
703 
 
704 
  return nr_bytes;
705 
}
706 
 
707 
 
708 
const struct hw_descriptor dv_mn103ser_descriptor[] = {
709 
  { "mn103ser", mn103ser_finish, },
710 
  { NULL },
711 
};

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