OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [rx/] [gdb-if.c] - Blame information for rev 853

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
/* gdb-if.c -- sim interface to GDB.
2
 
3
Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
4
Contributed by Red Hat, Inc.
5
 
6
This file is part of the GNU simulators.
7
 
8
This program is free software; you can redistribute it and/or modify
9
it under the terms of the GNU General Public License as published by
10
the Free Software Foundation; either version 3 of the License, or
11
(at your option) any later version.
12
 
13
This program is distributed in the hope that it will be useful,
14
but WITHOUT ANY WARRANTY; without even the implied warranty of
15
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
GNU General Public License for more details.
17
 
18
You should have received a copy of the GNU General Public License
19
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
#include <stdio.h>
22
#include <assert.h>
23
#include <signal.h>
24
#include <string.h>
25
#include <ctype.h>
26
#include <stdlib.h>
27
 
28
#include "ansidecl.h"
29
#include "gdb/callback.h"
30
#include "gdb/remote-sim.h"
31
#include "gdb/signals.h"
32
#include "gdb/sim-rx.h"
33
 
34
#include "cpu.h"
35
#include "mem.h"
36
#include "load.h"
37
#include "syscalls.h"
38
#include "err.h"
39
 
40
/* Ideally, we'd wrap up all the minisim's data structures in an
41
   object and pass that around.  However, neither GDB nor run needs
42
   that ability.
43
 
44
   So we just have one instance, that lives in global variables, and
45
   each time we open it, we re-initialize it.  */
46
struct sim_state
47
{
48
  const char *message;
49
};
50
 
51
static struct sim_state the_minisim = {
52
  "This is the sole rx minisim instance.  See libsim.a's global variables."
53
};
54
 
55
static int open;
56
 
57
SIM_DESC
58
sim_open (SIM_OPEN_KIND kind,
59
          struct host_callback_struct *callback,
60
          struct bfd *abfd, char **argv)
61
{
62
  if (open)
63
    fprintf (stderr, "rx minisim: re-opened sim\n");
64
 
65
  /* The 'run' interface doesn't use this function, so we don't care
66
     about KIND; it's always SIM_OPEN_DEBUG.  */
67
  if (kind != SIM_OPEN_DEBUG)
68
    fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
69
             kind);
70
 
71
  set_callbacks (callback);
72
 
73
  /* We don't expect any command-line arguments.  */
74
 
75
  init_mem ();
76
  init_regs ();
77
  execution_error_init_debugger ();
78
 
79
  sim_disasm_init (abfd);
80
  open = 1;
81
  return &the_minisim;
82
}
83
 
84
static void
85
check_desc (SIM_DESC sd)
86
{
87
  if (sd != &the_minisim)
88
    fprintf (stderr, "rx minisim: desc != &the_minisim\n");
89
}
90
 
91
void
92
sim_close (SIM_DESC sd, int quitting)
93
{
94
  check_desc (sd);
95
 
96
  /* Not much to do.  At least free up our memory.  */
97
  init_mem ();
98
 
99
  open = 0;
100
}
101
 
102
static bfd *
103
open_objfile (const char *filename)
104
{
105
  bfd *prog = bfd_openr (filename, 0);
106
 
107
  if (!prog)
108
    {
109
      fprintf (stderr, "Can't read %s\n", filename);
110
      return 0;
111
    }
112
 
113
  if (!bfd_check_format (prog, bfd_object))
114
    {
115
      fprintf (stderr, "%s not a rx program\n", filename);
116
      return 0;
117
    }
118
 
119
  return prog;
120
}
121
 
122
static struct swap_list
123
{
124
  bfd_vma start, end;
125
  struct swap_list *next;
126
} *swap_list = NULL;
127
 
128
static void
129
free_swap_list (void)
130
{
131
  while (swap_list)
132
    {
133
      struct swap_list *next = swap_list->next;
134
      free (swap_list);
135
      swap_list = next;
136
    }
137
}
138
 
139
/* When running in big endian mode, we must do an additional
140
   byte swap of memory areas used to hold instructions.  See
141
   the comment preceding rx_load in load.c to see why this is
142
   so.
143
 
144
   Construct a list of memory areas that must be byte swapped.
145
   This list will be consulted when either reading or writing
146
   memory.  */
147
 
148
static void
149
build_swap_list (struct bfd *abfd)
150
{
151
  asection *s;
152
  free_swap_list ();
153
 
154
  /* Nothing to do when in little endian mode.  */
155
  if (!rx_big_endian)
156
    return;
157
 
158
  for (s = abfd->sections; s; s = s->next)
159
    {
160
      if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE))
161
        {
162
          struct swap_list *sl;
163
          bfd_size_type size;
164
 
165
          size = bfd_get_section_size (s);
166
          if (size <= 0)
167
            continue;
168
 
169
          sl = malloc (sizeof (struct swap_list));
170
          assert (sl != NULL);
171
          sl->next = swap_list;
172
          sl->start = bfd_section_lma (abfd, s);
173
          sl->end = sl->start + size;
174
          swap_list = sl;
175
        }
176
    }
177
}
178
 
179
static int
180
addr_in_swap_list (bfd_vma addr)
181
{
182
  struct swap_list *s;
183
 
184
  for (s = swap_list; s; s = s->next)
185
    {
186
      if (s->start <= addr && addr < s->end)
187
        return 1;
188
    }
189
  return 0;
190
}
191
 
192
SIM_RC
193
sim_load (SIM_DESC sd, char *prog, struct bfd *abfd, int from_tty)
194
{
195
  check_desc (sd);
196
 
197
  if (!abfd)
198
    abfd = open_objfile (prog);
199
  if (!abfd)
200
    return SIM_RC_FAIL;
201
 
202
  rx_load (abfd);
203
  build_swap_list (abfd);
204
 
205
  return SIM_RC_OK;
206
}
207
 
208
SIM_RC
209
sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
210
{
211
  check_desc (sd);
212
 
213
  if (abfd)
214
    {
215
      rx_load (abfd);
216
      build_swap_list (abfd);
217
    }
218
 
219
  return SIM_RC_OK;
220
}
221
 
222
int
223
sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
224
{
225
  int i;
226
 
227
  check_desc (sd);
228
 
229
  if (mem == 0)
230
    return 0;
231
 
232
  execution_error_clear_last_error ();
233
 
234
  for (i = 0; i < length; i++)
235
    {
236
      bfd_vma addr = mem + i;
237
      int do_swap = addr_in_swap_list (addr);
238
      buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
239
 
240
      if (execution_error_get_last_error () != SIM_ERR_NONE)
241
        return i;
242
    }
243
 
244
  return length;
245
}
246
 
247
int
248
sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
249
{
250
  int i;
251
 
252
  check_desc (sd);
253
 
254
  execution_error_clear_last_error ();
255
 
256
  for (i = 0; i < length; i++)
257
    {
258
      bfd_vma addr = mem + i;
259
      int do_swap = addr_in_swap_list (addr);
260
      mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
261
 
262
      if (execution_error_get_last_error () != SIM_ERR_NONE)
263
        return i;
264
    }
265
 
266
  return length;
267
}
268
 
269
/* Read the LENGTH bytes at BUF as an little-endian value.  */
270
static DI
271
get_le (unsigned char *buf, int length)
272
{
273
  DI acc = 0;
274
  while (--length >= 0)
275
    acc = (acc << 8) + buf[length];
276
 
277
  return acc;
278
}
279
 
280
/* Read the LENGTH bytes at BUF as a big-endian value.  */
281
static DI
282
get_be (unsigned char *buf, int length)
283
{
284
  DI acc = 0;
285
  while (length-- > 0)
286
    acc = (acc << 8) + *buf++;
287
 
288
  return acc;
289
}
290
 
291
/* Store VAL as a little-endian value in the LENGTH bytes at BUF.  */
292
static void
293
put_le (unsigned char *buf, int length, DI val)
294
{
295
  int i;
296
 
297
  for (i = 0; i < length; i++)
298
    {
299
      buf[i] = val & 0xff;
300
      val >>= 8;
301
    }
302
}
303
 
304
/* Store VAL as a big-endian value in the LENGTH bytes at BUF.  */
305
static void
306
put_be (unsigned char *buf, int length, DI val)
307
{
308
  int i;
309
 
310
  for (i = length-1; i >= 0; i--)
311
    {
312
      buf[i] = val & 0xff;
313
      val >>= 8;
314
    }
315
}
316
 
317
 
318
static int
319
check_regno (enum sim_rx_regnum regno)
320
{
321
  return 0 <= regno && regno < sim_rx_num_regs;
322
}
323
 
324
static size_t
325
reg_size (enum sim_rx_regnum regno)
326
{
327
  size_t size;
328
 
329
  switch (regno)
330
    {
331
    case sim_rx_r0_regnum:
332
      size = sizeof (regs.r[0]);
333
      break;
334
    case sim_rx_r1_regnum:
335
      size = sizeof (regs.r[1]);
336
      break;
337
    case sim_rx_r2_regnum:
338
      size = sizeof (regs.r[2]);
339
      break;
340
    case sim_rx_r3_regnum:
341
      size = sizeof (regs.r[3]);
342
      break;
343
    case sim_rx_r4_regnum:
344
      size = sizeof (regs.r[4]);
345
      break;
346
    case sim_rx_r5_regnum:
347
      size = sizeof (regs.r[5]);
348
      break;
349
    case sim_rx_r6_regnum:
350
      size = sizeof (regs.r[6]);
351
      break;
352
    case sim_rx_r7_regnum:
353
      size = sizeof (regs.r[7]);
354
      break;
355
    case sim_rx_r8_regnum:
356
      size = sizeof (regs.r[8]);
357
      break;
358
    case sim_rx_r9_regnum:
359
      size = sizeof (regs.r[9]);
360
      break;
361
    case sim_rx_r10_regnum:
362
      size = sizeof (regs.r[10]);
363
      break;
364
    case sim_rx_r11_regnum:
365
      size = sizeof (regs.r[11]);
366
      break;
367
    case sim_rx_r12_regnum:
368
      size = sizeof (regs.r[12]);
369
      break;
370
    case sim_rx_r13_regnum:
371
      size = sizeof (regs.r[13]);
372
      break;
373
    case sim_rx_r14_regnum:
374
      size = sizeof (regs.r[14]);
375
      break;
376
    case sim_rx_r15_regnum:
377
      size = sizeof (regs.r[15]);
378
      break;
379
    case sim_rx_isp_regnum:
380
      size = sizeof (regs.r_isp);
381
      break;
382
    case sim_rx_usp_regnum:
383
      size = sizeof (regs.r_usp);
384
      break;
385
    case sim_rx_intb_regnum:
386
      size = sizeof (regs.r_intb);
387
      break;
388
    case sim_rx_pc_regnum:
389
      size = sizeof (regs.r_pc);
390
      break;
391
    case sim_rx_ps_regnum:
392
      size = sizeof (regs.r_psw);
393
      break;
394
    case sim_rx_bpc_regnum:
395
      size = sizeof (regs.r_bpc);
396
      break;
397
    case sim_rx_bpsw_regnum:
398
      size = sizeof (regs.r_bpsw);
399
      break;
400
    case sim_rx_fintv_regnum:
401
      size = sizeof (regs.r_fintv);
402
      break;
403
    case sim_rx_fpsw_regnum:
404
      size = sizeof (regs.r_fpsw);
405
      break;
406
    default:
407
      size = 0;
408
      break;
409
    }
410
  return size;
411
}
412
 
413
int
414
sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
415
{
416
  size_t size;
417
  DI val;
418
 
419
  check_desc (sd);
420
 
421
  if (!check_regno (regno))
422
    return 0;
423
 
424
  size = reg_size (regno);
425
 
426
  if (length != size)
427
    return 0;
428
 
429
  switch (regno)
430
    {
431
    case sim_rx_r0_regnum:
432
      val = get_reg (0);
433
      break;
434
    case sim_rx_r1_regnum:
435
      val = get_reg (1);
436
      break;
437
    case sim_rx_r2_regnum:
438
      val = get_reg (2);
439
      break;
440
    case sim_rx_r3_regnum:
441
      val = get_reg (3);
442
      break;
443
    case sim_rx_r4_regnum:
444
      val = get_reg (4);
445
      break;
446
    case sim_rx_r5_regnum:
447
      val = get_reg (5);
448
      break;
449
    case sim_rx_r6_regnum:
450
      val = get_reg (6);
451
      break;
452
    case sim_rx_r7_regnum:
453
      val = get_reg (7);
454
      break;
455
    case sim_rx_r8_regnum:
456
      val = get_reg (8);
457
      break;
458
    case sim_rx_r9_regnum:
459
      val = get_reg (9);
460
      break;
461
    case sim_rx_r10_regnum:
462
      val = get_reg (10);
463
      break;
464
    case sim_rx_r11_regnum:
465
      val = get_reg (11);
466
      break;
467
    case sim_rx_r12_regnum:
468
      val = get_reg (12);
469
      break;
470
    case sim_rx_r13_regnum:
471
      val = get_reg (13);
472
      break;
473
    case sim_rx_r14_regnum:
474
      val = get_reg (14);
475
      break;
476
    case sim_rx_r15_regnum:
477
      val = get_reg (15);
478
      break;
479
    case sim_rx_isp_regnum:
480
      val = get_reg (isp);
481
      break;
482
    case sim_rx_usp_regnum:
483
      val = get_reg (usp);
484
      break;
485
    case sim_rx_intb_regnum:
486
      val = get_reg (intb);
487
      break;
488
    case sim_rx_pc_regnum:
489
      val = get_reg (pc);
490
      break;
491
    case sim_rx_ps_regnum:
492
      val = get_reg (psw);
493
      break;
494
    case sim_rx_bpc_regnum:
495
      val = get_reg (bpc);
496
      break;
497
    case sim_rx_bpsw_regnum:
498
      val = get_reg (bpsw);
499
      break;
500
    case sim_rx_fintv_regnum:
501
      val = get_reg (fintv);
502
      break;
503
    case sim_rx_fpsw_regnum:
504
      val = get_reg (fpsw);
505
      break;
506
    default:
507
      fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
508
               regno);
509
      return -1;
510
    }
511
 
512
  if (rx_big_endian)
513
    put_be (buf, length, val);
514
  else
515
    put_le (buf, length, val);
516
 
517
  return size;
518
}
519
 
520
int
521
sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
522
{
523
  size_t size;
524
  DI val;
525
 
526
  check_desc (sd);
527
 
528
  if (!check_regno (regno))
529
    return 0;
530
 
531
  size = reg_size (regno);
532
 
533
  if (length != size)
534
    return 0;
535
 
536
  if (rx_big_endian)
537
    val = get_be (buf, length);
538
  else
539
    val = get_le (buf, length);
540
 
541
  switch (regno)
542
    {
543
    case sim_rx_r0_regnum:
544
      put_reg (0, val);
545
      break;
546
    case sim_rx_r1_regnum:
547
      put_reg (1, val);
548
      break;
549
    case sim_rx_r2_regnum:
550
      put_reg (2, val);
551
      break;
552
    case sim_rx_r3_regnum:
553
      put_reg (3, val);
554
      break;
555
    case sim_rx_r4_regnum:
556
      put_reg (4, val);
557
      break;
558
    case sim_rx_r5_regnum:
559
      put_reg (5, val);
560
      break;
561
    case sim_rx_r6_regnum:
562
      put_reg (6, val);
563
      break;
564
    case sim_rx_r7_regnum:
565
      put_reg (7, val);
566
      break;
567
    case sim_rx_r8_regnum:
568
      put_reg (8, val);
569
      break;
570
    case sim_rx_r9_regnum:
571
      put_reg (9, val);
572
      break;
573
    case sim_rx_r10_regnum:
574
      put_reg (10, val);
575
      break;
576
    case sim_rx_r11_regnum:
577
      put_reg (11, val);
578
      break;
579
    case sim_rx_r12_regnum:
580
      put_reg (12, val);
581
      break;
582
    case sim_rx_r13_regnum:
583
      put_reg (13, val);
584
      break;
585
    case sim_rx_r14_regnum:
586
      put_reg (14, val);
587
      break;
588
    case sim_rx_r15_regnum:
589
      put_reg (15, val);
590
      break;
591
    case sim_rx_isp_regnum:
592
      put_reg (isp, val);
593
      break;
594
    case sim_rx_usp_regnum:
595
      put_reg (usp, val);
596
      break;
597
    case sim_rx_intb_regnum:
598
      put_reg (intb, val);
599
      break;
600
    case sim_rx_pc_regnum:
601
      put_reg (pc, val);
602
      break;
603
    case sim_rx_ps_regnum:
604
      put_reg (psw, val);
605
      break;
606
    case sim_rx_bpc_regnum:
607
      put_reg (bpc, val);
608
      break;
609
    case sim_rx_bpsw_regnum:
610
      put_reg (bpsw, val);
611
      break;
612
    case sim_rx_fintv_regnum:
613
      put_reg (fintv, val);
614
      break;
615
    case sim_rx_fpsw_regnum:
616
      put_reg (fpsw, val);
617
      break;
618
    default:
619
      fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
620
               regno);
621
      return -1;
622
    }
623
 
624
  return size;
625
}
626
 
627
void
628
sim_info (SIM_DESC sd, int verbose)
629
{
630
  check_desc (sd);
631
 
632
  printf ("The rx minisim doesn't collect any statistics.\n");
633
}
634
 
635
static volatile int stop;
636
static enum sim_stop reason;
637
int siggnal;
638
 
639
 
640
/* Given a signal number used by the RX bsp (that is, newlib),
641
   return a host signal number.  (Oddly, the gdb/sim interface uses
642
   host signal numbers...)  */
643
int
644
rx_signal_to_host (int rx)
645
{
646
  switch (rx)
647
    {
648
    case 4:
649
#ifdef SIGILL
650
      return SIGILL;
651
#else
652
      return SIGSEGV;
653
#endif
654
 
655
    case 5:
656
      return SIGTRAP;
657
 
658
    case 10:
659
#ifdef SIGBUS
660
      return SIGBUS;
661
#else
662
      return SIGSEGV;
663
#endif
664
 
665
    case 11:
666
      return SIGSEGV;
667
 
668
    case 24:
669
#ifdef SIGXCPU
670
      return SIGXCPU;
671
#else
672
      break;
673
#endif
674
 
675
    case 2:
676
      return SIGINT;
677
 
678
    case 8:
679
#ifdef SIGFPE
680
      return SIGFPE;
681
#else
682
      break;
683
#endif
684
 
685
    case 6:
686
      return SIGABRT;
687
    }
688
 
689
  return 0;
690
}
691
 
692
 
693
/* Take a step return code RC and set up the variables consulted by
694
   sim_stop_reason appropriately.  */
695
void
696
handle_step (int rc)
697
{
698
  if (execution_error_get_last_error () != SIM_ERR_NONE)
699
    {
700
      reason = sim_stopped;
701
      siggnal = TARGET_SIGNAL_SEGV;
702
    }
703
  if (RX_STEPPED (rc) || RX_HIT_BREAK (rc))
704
    {
705
      reason = sim_stopped;
706
      siggnal = TARGET_SIGNAL_TRAP;
707
    }
708
  else if (RX_STOPPED (rc))
709
    {
710
      reason = sim_stopped;
711
      siggnal = rx_signal_to_host (RX_STOP_SIG (rc));
712
    }
713
  else
714
    {
715
      assert (RX_EXITED (rc));
716
      reason = sim_exited;
717
      siggnal = RX_EXIT_STATUS (rc);
718
    }
719
}
720
 
721
 
722
void
723
sim_resume (SIM_DESC sd, int step, int sig_to_deliver)
724
{
725
  check_desc (sd);
726
 
727
  if (sig_to_deliver != 0)
728
    {
729
      fprintf (stderr,
730
               "Warning: the rx minisim does not implement "
731
               "signal delivery yet.\n" "Resuming with no signal.\n");
732
    }
733
 
734
  execution_error_clear_last_error ();
735
 
736
  if (step)
737
    handle_step (decode_opcode ());
738
  else
739
    {
740
      /* We don't clear 'stop' here, because then we would miss
741
         interrupts that arrived on the way here.  Instead, we clear
742
         the flag in sim_stop_reason, after GDB has disabled the
743
         interrupt signal handler.  */
744
      for (;;)
745
        {
746
          if (stop)
747
            {
748
              stop = 0;
749
              reason = sim_stopped;
750
              siggnal = TARGET_SIGNAL_INT;
751
              break;
752
            }
753
 
754
          int rc = decode_opcode ();
755
 
756
          if (execution_error_get_last_error () != SIM_ERR_NONE)
757
            {
758
              reason = sim_stopped;
759
              siggnal = TARGET_SIGNAL_SEGV;
760
              break;
761
            }
762
 
763
          if (!RX_STEPPED (rc))
764
            {
765
              handle_step (rc);
766
              break;
767
            }
768
        }
769
    }
770
}
771
 
772
int
773
sim_stop (SIM_DESC sd)
774
{
775
  stop = 1;
776
 
777
  return 1;
778
}
779
 
780
void
781
sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p)
782
{
783
  check_desc (sd);
784
 
785
  *reason_p = reason;
786
  *sigrc_p = siggnal;
787
}
788
 
789
void
790
sim_do_command (SIM_DESC sd, char *cmd)
791
{
792
  check_desc (sd);
793
 
794
  char *p = cmd;
795
 
796
  /* Skip leading whitespace.  */
797
  while (isspace (*p))
798
    p++;
799
 
800
  /* Find the extent of the command word.  */
801
  for (p = cmd; *p; p++)
802
    if (isspace (*p))
803
      break;
804
 
805
  /* Null-terminate the command word, and record the start of any
806
     further arguments.  */
807
  char *args;
808
  if (*p)
809
    {
810
      *p = '\0';
811
      args = p + 1;
812
      while (isspace (*args))
813
        args++;
814
    }
815
  else
816
    args = p;
817
 
818
  if (strcmp (cmd, "trace") == 0)
819
    {
820
      if (strcmp (args, "on") == 0)
821
        trace = 1;
822
      else if (strcmp (args, "off") == 0)
823
        trace = 0;
824
      else
825
        printf ("The 'sim trace' command expects 'on' or 'off' "
826
                "as an argument.\n");
827
    }
828
  else if (strcmp (cmd, "verbose") == 0)
829
    {
830
      if (strcmp (args, "on") == 0)
831
        verbose = 1;
832
      else if (strcmp (args, "off") == 0)
833
        verbose = 0;
834
      else
835
        printf ("The 'sim verbose' command expects 'on' or 'off'"
836
                " as an argument.\n");
837
    }
838
  else
839
    printf ("The 'sim' command expects either 'trace' or 'verbose'"
840
            " as a subcommand.\n");
841
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.