URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [d10v-elf/] [t-mod-ld-pre.s] - Blame information for rev 820

Go to most recent revision | Details | Compare with Previous | View Log


.include "t-macros.i"
 
.section        .rodata
 
        .text
        .globl  main
        .type   main,@function
main:
    mvfc        r0, PSW             ||  ldi.s       r14, #0
    ldi.l       r2, 0x100               ; MOD_E
    ldi.l       r3, 0x108               ; MOD_S
 
test_mod_dec_ld:
    mvtc        r2, MOD_E           ||  bseti       r0, #7
    mvtc        r3, MOD_S
    mvtc        r0, PSW                 ; modulo mode enable
    mv          r1,r3                           ; r1=0x108
    ld          r4, @r1-        ||      nop     ; r1=0x106
    ld          r4, @r1-        ||      nop     ; r1=0x104
    ld          r4, @r1-        ||      nop     ; r1=0x102
    ld          r4, @r1-        ||      nop     ; r1=0x100
    ld          r4, @r1-        ||      nop     ; r1=0x108 
    ld          r4, @r1-        ||      nop     ; r1=0x106 
 
    cmpeqi      r1,#0x106
    brf0f       _ERR            ;  branch to error
 
test_mod_inc_ld:
    mvtc        r2, MOD_S
    mvtc        r3, MOD_E
    mv          r1,r2                           ; r1=0x100
    ld          r4, @r1+        ||      nop     ; r1=0x102
    ld          r4, @r1+        ||      nop     ; r1=0x104
    ld          r4, @r1+        ||      nop     ; r1=0x106
    ld          r4, @r1+        ||      nop     ; r1=0x108
    ld          r4, @r1+        ||      nop     ; r1=0x100
    ld          r4, @r1+        ||      nop     ; r1=0x102
 
    cmpeqi      r1,#0x102
    brf0f       _ERR
 
test_mod_dec_ld2w:
    mvtc        r2, MOD_E
    mvtc        r3, MOD_S
    mv          r1,r3                           ; r1=0x108
    ld2W        r4, @r1-        ||      nop     ; r1=0x104
    ld2W        r4, @r1-        ||      nop     ; r1=0x100
    ld2W        r4, @r1-        ||      nop     ; r1=0x108 
    ld2W        r4, @r1-        ||      nop     ; r1=0x104 
 
    cmpeqi      r1,#0x104
    brf0f       _ERR            ; <= branch to error
 
test_mod_inc_ld2w:
    mvtc        r2, MOD_S
    mvtc        r3, MOD_E           ||  BCLRI       r0, #7
    mv          r1,r2                           ; r1=0x100
    ld2W        r4, @r1+        ||      nop     ; r1=0x104
    ld2W        r4, @r1+        ||      nop     ; r1=0x108
    ld2W        r4, @r1+        ||      nop     ; r1=0x100
    ld2W        r4, @r1+        ||      nop     ; r1=0x104
 
    cmpeqi      r1,#0x104
    brf0f       _ERR
 
test_mod_dec_ld_dis:
    mvtc        r0, PSW                 ; modulo mode disable
    mvtc        r2, MOD_E
    mvtc        r3, MOD_S
    mv          r1,r3                           ; r1=0x108
    ld          r4, @r1-        ||      nop     ; r1=0x106
    ld          r4, @r1-        ||      nop     ; r1=0x104
    ld          r4, @r1-        ||      nop     ; r1=0x102
    ld          r4, @r1-        ||      nop     ; r1=0x100
    ld          r4, @r1-        ||      nop     ; r1=0xFE
    ld          r4, @r1-        ||      nop     ; r1=0xFC
 
    cmpeqi      r1,#0xFC
    brf0f       _ERR
 
test_mod_inc_ld_dis:
    mvtc        r2, MOD_S
    mvtc        r3, MOD_E
    mv          r1,r2                           ; r1=0x100
    ld          r4, @r1+        ||      nop     ; r1=0x102
    ld          r4, @r1+        ||      nop     ; r1=0x104
    ld          r4, @r1+        ||      nop     ; r1=0x106
    ld          r4, @r1+        ||      nop     ; r1=0x108
    ld          r4, @r1+        ||      nop     ; r1=0x10A
    ld          r4, @r1+        ||      nop     ; r1=0x10C
 
    cmpeqi      r1,#0x10C
    brf0f       _ERR
 
test_mod_dec_ld2w_dis:
    mvtc        r2, MOD_E
    mvtc        r3, MOD_S
    mv          r1,r3                           ; r1=0x108
    ld2W        r4, @r1-        ||      nop     ; r1=0x104
    ld2W        r4, @r1-        ||      nop     ; r1=0x100
    ld2W        r4, @r1-        ||      nop     ; r1=0xFC
    ld2W        r4, @r1-        ||      nop     ; r1=0xF8
 
    cmpeqi      r1,#0xF8
    brf0f       _ERR
 
 test_mod_inc_ld2w_dis:
    mvtc        r2, MOD_S
    mvtc        r3, MOD_E
    mv          r1,r2                           ; r1=0x100
    ld2W        r4, @r1+        ||      nop     ; r1=0x104
    ld2W        r4, @r1+        ||      nop     ; r1=0x108
    ld2W        r4, @r1+        ||      nop     ; r1=0x10C
    ld2W        r4, @r1+        ||      nop     ; r1=0x110
 
    cmpeqi      r1,#0x110
    brf0f       _ERR
 
_OK:
        exit0
 
_ERR:
        exit47
 
 
 

Line No.	Rev	Author	Line
1	227	jeremybenn	`.include "t-macros.i"`
2
3			`.section .rodata`
4
5			`.text`
6			`.globl main`
7			`.type main,@function`
8			`main:`
9			`mvfc r0, PSW \|\| ldi.s r14, #0`
10			`ldi.l r2, 0x100 ; MOD_E`
11			`ldi.l r3, 0x108 ; MOD_S`
12
13			`test_mod_dec_ld:`
14			`mvtc r2, MOD_E \|\| bseti r0, #7`
15			`mvtc r3, MOD_S`
16			`mvtc r0, PSW ; modulo mode enable`
17			`mv r1,r3 ; r1=0x108`
18			`ld r4, @r1- \|\| nop ; r1=0x106`
19			`ld r4, @r1- \|\| nop ; r1=0x104`
20			`ld r4, @r1- \|\| nop ; r1=0x102`
21			`ld r4, @r1- \|\| nop ; r1=0x100`
22			`ld r4, @r1- \|\| nop ; r1=0x108`
23			`ld r4, @r1- \|\| nop ; r1=0x106`
24
25			`cmpeqi r1,#0x106`
26			`brf0f _ERR ; branch to error`
27
28			`test_mod_inc_ld:`
29			`mvtc r2, MOD_S`
30			`mvtc r3, MOD_E`
31			`mv r1,r2 ; r1=0x100`
32			`ld r4, @r1+ \|\| nop ; r1=0x102`
33			`ld r4, @r1+ \|\| nop ; r1=0x104`
34			`ld r4, @r1+ \|\| nop ; r1=0x106`
35			`ld r4, @r1+ \|\| nop ; r1=0x108`
36			`ld r4, @r1+ \|\| nop ; r1=0x100`
37			`ld r4, @r1+ \|\| nop ; r1=0x102`
38
39			`cmpeqi r1,#0x102`
40			`brf0f _ERR`
41
42			`test_mod_dec_ld2w:`
43			`mvtc r2, MOD_E`
44			`mvtc r3, MOD_S`
45			`mv r1,r3 ; r1=0x108`
46			`ld2W r4, @r1- \|\| nop ; r1=0x104`
47			`ld2W r4, @r1- \|\| nop ; r1=0x100`
48			`ld2W r4, @r1- \|\| nop ; r1=0x108`
49			`ld2W r4, @r1- \|\| nop ; r1=0x104`
50
51			`cmpeqi r1,#0x104`
52			`brf0f _ERR ; <= branch to error`
53
54			`test_mod_inc_ld2w:`
55			`mvtc r2, MOD_S`
56			`mvtc r3, MOD_E \|\| BCLRI r0, #7`
57			`mv r1,r2 ; r1=0x100`
58			`ld2W r4, @r1+ \|\| nop ; r1=0x104`
59			`ld2W r4, @r1+ \|\| nop ; r1=0x108`
60			`ld2W r4, @r1+ \|\| nop ; r1=0x100`
61			`ld2W r4, @r1+ \|\| nop ; r1=0x104`
62
63			`cmpeqi r1,#0x104`
64			`brf0f _ERR`
65
66			`test_mod_dec_ld_dis:`
67			`mvtc r0, PSW ; modulo mode disable`
68			`mvtc r2, MOD_E`
69			`mvtc r3, MOD_S`
70			`mv r1,r3 ; r1=0x108`
71			`ld r4, @r1- \|\| nop ; r1=0x106`
72			`ld r4, @r1- \|\| nop ; r1=0x104`
73			`ld r4, @r1- \|\| nop ; r1=0x102`
74			`ld r4, @r1- \|\| nop ; r1=0x100`
75			`ld r4, @r1- \|\| nop ; r1=0xFE`
76			`ld r4, @r1- \|\| nop ; r1=0xFC`
77
78			`cmpeqi r1,#0xFC`
79			`brf0f _ERR`
80
81			`test_mod_inc_ld_dis:`
82			`mvtc r2, MOD_S`
83			`mvtc r3, MOD_E`
84			`mv r1,r2 ; r1=0x100`
85			`ld r4, @r1+ \|\| nop ; r1=0x102`
86			`ld r4, @r1+ \|\| nop ; r1=0x104`
87			`ld r4, @r1+ \|\| nop ; r1=0x106`
88			`ld r4, @r1+ \|\| nop ; r1=0x108`
89			`ld r4, @r1+ \|\| nop ; r1=0x10A`
90			`ld r4, @r1+ \|\| nop ; r1=0x10C`
91
92			`cmpeqi r1,#0x10C`
93			`brf0f _ERR`
94
95			`test_mod_dec_ld2w_dis:`
96			`mvtc r2, MOD_E`
97			`mvtc r3, MOD_S`
98			`mv r1,r3 ; r1=0x108`
99			`ld2W r4, @r1- \|\| nop ; r1=0x104`
100			`ld2W r4, @r1- \|\| nop ; r1=0x100`
101			`ld2W r4, @r1- \|\| nop ; r1=0xFC`
102			`ld2W r4, @r1- \|\| nop ; r1=0xF8`
103
104			`cmpeqi r1,#0xF8`
105			`brf0f _ERR`
106
107			`test_mod_inc_ld2w_dis:`
108			`mvtc r2, MOD_S`
109			`mvtc r3, MOD_E`
110			`mv r1,r2 ; r1=0x100`
111			`ld2W r4, @r1+ \|\| nop ; r1=0x104`
112			`ld2W r4, @r1+ \|\| nop ; r1=0x108`
113			`ld2W r4, @r1+ \|\| nop ; r1=0x10C`
114			`ld2W r4, @r1+ \|\| nop ; r1=0x110`
115
116			`cmpeqi r1,#0x110`
117			`brf0f _ERR`
118
119			`_OK:`
120			`exit0`
121
122			`_ERR:`
123			`exit47`
124
125
126

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [d10v-elf/] [t-mod-ld-pre.s] - Blame information for rev 820