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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [wacc.cgs] - Blame information for rev 816

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Line No. Rev Author Line
1 227 jeremybenn
# Intel(r) Wireless MMX(tm) technology testcase for WACC
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# mach: xscale
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# as: -mcpu=xscale+iwmmxt
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        .include "testutils.inc"
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        start
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        .global wacc
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wacc:
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        # Enable access to CoProcessors 0 & 1 before
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        # we attempt these instructions.
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        mvi_h_gr   r1, 3
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        mcr        p15, 0, r1, cr15, cr1, 0
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        # Test Unsigned Byte Wide Accumulation
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        mvi_h_gr   r0, 0x12345678
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        mvi_h_gr   r1, 0x9abcdef0
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        mvi_h_gr   r2, 0
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        mvi_h_gr   r3, 0
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        tmcrr      wr0, r0, r1
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        tmcrr      wr1, r2, r3
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        waccb      wr1, wr0
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        tmrrc      r0, r1, wr0
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        tmrrc      r2, r3, wr1
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        test_h_gr  r0, 0x12345678
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        test_h_gr  r1, 0x9abcdef0
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        test_h_gr  r2, 0x00000438
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        test_h_gr  r3, 0x00000000
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        # Test Unsigned Half Word Wide Accumulation
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        mvi_h_gr   r0, 0x12345678
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        mvi_h_gr   r1, 0x9abcdef0
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        mvi_h_gr   r2, 0
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        mvi_h_gr   r3, 0
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        tmcrr      wr0, r0, r1
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        tmcrr      wr1, r2, r3
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        wacch      wr1, wr0
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        tmrrc      r0, r1, wr0
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        tmrrc      r2, r3, wr1
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        test_h_gr  r0, 0x12345678
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        test_h_gr  r1, 0x9abcdef0
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        test_h_gr  r2, 0x0001e258
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        test_h_gr  r3, 0x00000000
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        # Test Unsigned Word Wide Accumulation
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        mvi_h_gr   r0, 0x12345678
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        mvi_h_gr   r1, 0x9abcdef0
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        mvi_h_gr   r2, 0
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        mvi_h_gr   r3, 0
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        tmcrr      wr0, r0, r1
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        tmcrr      wr1, r2, r3
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        waccw      wr1, wr0
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        tmrrc      r0, r1, wr0
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        tmrrc      r2, r3, wr1
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        test_h_gr  r0, 0x12345678
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        test_h_gr  r1, 0x9abcdef0
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        test_h_gr  r2, 0xacf13568
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        test_h_gr  r3, 0x00000000
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        pass

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