OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [wmadd.cgs] - Blame information for rev 834

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# Intel(r) Wireless MMX(tm) technology testcase for WMADD
2
# mach: xscale
3
# as: -mcpu=xscale+iwmmxt
4
 
5
        .include "testutils.inc"
6
 
7
        start
8
 
9
        .global wmadd
10
wmadd:
11
        # Enable access to CoProcessors 0 & 1 before
12
        # we attempt these instructions.
13
 
14
        mvi_h_gr   r1, 3
15
        mcr        p15, 0, r1, cr15, cr1, 0
16
 
17
        # Test Unsigned, Multiply Addition
18
 
19
        mvi_h_gr   r0, 0x12345678
20
        mvi_h_gr   r1, 0x9abcdef0
21
        mvi_h_gr   r2, 0x11111111
22
        mvi_h_gr   r3, 0x22222222
23
        mvi_h_gr   r4, 0
24
        mvi_h_gr   r5, 0
25
 
26
        tmcrr      wr0, r0, r1
27
        tmcrr      wr1, r2, r3
28
        tmcrr      wr2, r4, r5
29
 
30
        wmaddu     wr2, wr0, wr1
31
 
32
        tmrrc      r0, r1, wr0
33
        tmrrc      r2, r3, wr1
34
        tmrrc      r4, r5, wr2
35
 
36
        test_h_gr  r0, 0x12345678
37
        test_h_gr  r1, 0x9abcdef0
38
        test_h_gr  r2, 0x11111111
39
        test_h_gr  r3, 0x22222222
40
        test_h_gr  r4, 0x06fa5f6c
41
        test_h_gr  r5, 0x325b00d8
42
 
43
        # Test Signed, Multiply Addition
44
 
45
        mvi_h_gr   r0, 0x12345678
46
        mvi_h_gr   r1, 0x9abcdef0
47
        mvi_h_gr   r2, 0x11111111
48
        mvi_h_gr   r3, 0x22222222
49
        mvi_h_gr   r4, 0
50
        mvi_h_gr   r5, 0
51
 
52
        tmcrr      wr0, r0, r1
53
        tmcrr      wr1, r2, r3
54
        tmcrr      wr2, r4, r5
55
 
56
        wmadds     wr2, wr0, wr1
57
 
58
        tmrrc      r0, r1, wr0
59
        tmrrc      r2, r3, wr1
60
        tmrrc      r4, r5, wr2
61
 
62
        test_h_gr  r0, 0x12345678
63
        test_h_gr  r1, 0x9abcdef0
64
        test_h_gr  r2, 0x11111111
65
        test_h_gr  r3, 0x22222222
66
        test_h_gr  r4, 0x06fa5f6c
67
        test_h_gr  r5, 0xee1700d8
68
 
69
        pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.