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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [movmp.ms] - Blame information for rev 842

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# mach: crisv3 crisv8 crisv10 crisv32
# output: ffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nbb113344\n664433aa\ncc557788\nabcde012\nabcde000\n77880000\n0\n
 
# Test generic "move Ps,[]" and "move [],Pd" insns; the ones with
# functionality common to all models.
 
 .include "testutils.inc"
 start
 
 .data
filler:
 .byte 0xaa
 .word 0x4433
 .dword 0x55778866
 .byte 0xcc
 
 .text
; Test that writing to zero-registers is a nop
 .if 0
 ; We used to just ignore the writes, but now an error is emitted.  We
 ; keep the test-code but disabled, in case we need to change this again.
 move 0xaa,p0
 move 0x4433,p4
 move 0x55774433,p8
 .endif
 
 moveq -1,r3
 setf zcvn
 clear.b r3
 test_cc 1 1 1 1
 dumpr3
 
 moveq -1,r3
 clearf zcvn
 clear.w r3
 test_cc 0 0 0 0
 dumpr3
 
 moveq -1,r3
 clear.d r3
 dumpr3
 
; "Write" using ordinary memory references too.
 .if 0 ; See ".if 0" above.
 move.d filler,r6
 move [r6],p0
 move [r6],p4
 move [r6],p8
 .endif
 
 moveq -1,r3
 clear.b r3
 dumpr3
 
 moveq -1,r3
 clear.w r3
 dumpr3
 
 moveq -1,r3
 clear.d r3
 dumpr3
 
; And postincremented.
 .if 0 ; See ".if 0" above.
 move [r6+],p0
 move [r6+],p4
 move [r6+],p8
 .endif
 
 moveq -1,r3
 clear.b r3
 dumpr3
 
 moveq -1,r3
 clear.w r3
 dumpr3
 
 moveq -1,r3
 clear.d r3
 dumpr3
 
; Now see that we can write to the registers too.
 
; [PC+]
 move.d filler,r9
 move 0xbb113344,srp
 move srp,r3
 dumpr3
 
; [R+]
 move [r9+],srp
 move srp,r3
 dumpr3
 
; [R]
 move [r9],srp
 move srp,r3
 dumpr3
 
; And check writing to memory, clear and srp.
 
 move.d filler,r9
 move 0xabcde012,srp
 setf zcvn
 move srp,[r9+]
 test_cc 1 1 1 1
 subq 4,r9
 move.d [r9],r3
 dumpr3
 
 clearf zcvn
 clear.b [r9]
 test_cc 0 0 0 0
 move.d [r9],r3
 dumpr3
 
 addq 2,r9
 clear.w [r9+]
 subq 2,r9
 move.d [r9],r3
 dumpr3
 
 clear.d [r9]
 move.d [r9],r3
 dumpr3
 
 quit

Line No.	Rev	Author	Line
1	227	jeremybenn	`# mach: crisv3 crisv8 crisv10 crisv32`
2			`# output: ffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nbb113344\n664433aa\ncc557788\nabcde012\nabcde000\n77880000\n0\n`
3
4			`# Test generic "move Ps,[]" and "move [],Pd" insns; the ones with`
5			`# functionality common to all models.`
6
7			`.include "testutils.inc"`
8			`start`
9
10			`.data`
11			`filler:`
12			`.byte 0xaa`
13			`.word 0x4433`
14			`.dword 0x55778866`
15			`.byte 0xcc`
16
17			`.text`
18			`; Test that writing to zero-registers is a nop`
19			`.if 0`
20			`; We used to just ignore the writes, but now an error is emitted. We`
21			`; keep the test-code but disabled, in case we need to change this again.`
22			`move 0xaa,p0`
23			`move 0x4433,p4`
24			`move 0x55774433,p8`
25			`.endif`
26
27			`moveq -1,r3`
28			`setf zcvn`
29			`clear.b r3`
30			`test_cc 1 1 1 1`
31			`dumpr3`
32
33			`moveq -1,r3`
34			`clearf zcvn`
35			`clear.w r3`
36			`test_cc 0 0 0 0`
37			`dumpr3`
38
39			`moveq -1,r3`
40			`clear.d r3`
41			`dumpr3`
42
43			`; "Write" using ordinary memory references too.`
44			`.if 0 ; See ".if 0" above.`
45			`move.d filler,r6`
46			`move [r6],p0`
47			`move [r6],p4`
48			`move [r6],p8`
49			`.endif`
50
51			`moveq -1,r3`
52			`clear.b r3`
53			`dumpr3`
54
55			`moveq -1,r3`
56			`clear.w r3`
57			`dumpr3`
58
59			`moveq -1,r3`
60			`clear.d r3`
61			`dumpr3`
62
63			`; And postincremented.`
64			`.if 0 ; See ".if 0" above.`
65			`move [r6+],p0`
66			`move [r6+],p4`
67			`move [r6+],p8`
68			`.endif`
69
70			`moveq -1,r3`
71			`clear.b r3`
72			`dumpr3`
73
74			`moveq -1,r3`
75			`clear.w r3`
76			`dumpr3`
77
78			`moveq -1,r3`
79			`clear.d r3`
80			`dumpr3`
81
82			`; Now see that we can write to the registers too.`
83
84			`; [PC+]`
85			`move.d filler,r9`
86			`move 0xbb113344,srp`
87			`move srp,r3`
88			`dumpr3`
89
90			`; [R+]`
91			`move [r9+],srp`
92			`move srp,r3`
93			`dumpr3`
94
95			`; [R]`
96			`move [r9],srp`
97			`move srp,r3`
98			`dumpr3`
99
100			`; And check writing to memory, clear and srp.`
101
102			`move.d filler,r9`
103			`move 0xabcde012,srp`
104			`setf zcvn`
105			`move srp,[r9+]`
106			`test_cc 1 1 1 1`
107			`subq 4,r9`
108			`move.d [r9],r3`
109			`dumpr3`
110
111			`clearf zcvn`
112			`clear.b [r9]`
113			`test_cc 0 0 0 0`
114			`move.d [r9],r3`
115			`dumpr3`
116
117			`addq 2,r9`
118			`clear.w [r9+]`
119			`subq 2,r9`
120			`move.d [r9],r3`
121			`dumpr3`
122
123			`clear.d [r9]`
124			`move.d [r9],r3`
125			`dumpr3`
126
127			`quit`

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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [movmp.ms] - Blame information for rev 842