URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [cris/] [hw/] [rv-n-cris/] [mem1.ms] - Blame information for rev 856

Go to most recent revision | Details | Compare with Previous | View Log


#mach: crisv10 crisv32
#sim(crisv10): --hw-device "/rv/trace? true"
#sim(crisv32): --hw-device "/rv/trace? true"
#output: /rv: WD\n
#output: /rv: REG R 0xd0000036\n
#output: /rv: := 0x76543210\n
#output: /rv: DMA W 0x20020..0x2003f\n
#output: /rv: 0x20020: 12 23 34 56\n
#output: /rv: 0x20024: 79 8a bd de\n
#output: /rv: 0x20028: fb ad ba db\n
#output: /rv: 0x2002c: ad 56 78 9a\n
#output: /rv: 0x20030: fd e1 23 45\n
#output: /rv: 0x20034: 66 54 32 1a\n
#output: /rv: 0x20038: ac cb be ed\n
#output: /rv: 0x2003c: db ed aa da\n
#output: /rv: REG R 0xd0000038\n
#output: /rv: := 0x76543211\n
#output: /rv: DMA R 0x20000..0x2001f\n
#output: /rv: 0x20000: aa 55 12 23\n
#output: /rv: 0x20004: 34 56 79 8a\n
#output: /rv: 0x20008: bd de fb ad\n
#output: /rv: 0x2000c: ba db ad 56\n
#output: /rv: 0x20010: 78 9a fd e1\n
#output: /rv: 0x20014: 23 45 66 54\n
#output: /rv: 0x20018: 32 1a ac cb\n
#output: /rv: 0x2001c: be ed db ed\n
#output: /rv: IRQ 0x8\n
#output: /rv: REG R 0xd0000038\n
#output: /rv: := 0x76543212\n
#output: pass\n
 
# Trivial test of DMA.
 
# Locations of IRQ notifiers above depend on when the simulator is
# polled; adjustments may be needed (after checking that no poll is
# gone due to a bug!)
 
#r W,
#r r,a8836,76543210
#r s,e020,12233456798abddefbadbadbad56789afde123456654321aaccbbeeddbedaada
#r r,a8838,76543211
#r l,e000,aa5512233456798abddefbadbadbad56789afde123456654321aaccbbeeddbed
#r I,8
#r r,a8838,76543212
 
 .include "testutils.inc"
 start
 test_h_mem 0x76543210 0xd0000036
 
 move.d 0x2003f,$r1
 move.d 0x10000,$r3
0:
 test.b [$r1]
 bne 1f
 subq 1,$r3
 bne 0b
 nop
 
1:
 test_h_mem 0x56342312 0x20020
 test_h_mem 0xdebd8a79 0x20024
 test_h_mem 0xdbbaadfb 0x20028
 test_h_mem 0x9a7856ad 0x2002c
 test_h_mem 0x4523e1fd 0x20030
 test_h_mem 0x1a325466 0x20034
 test_h_mem 0xedbecbac 0x20038
 test_h_mem 0xdaaaeddb 0x2003c
 
 move.d 0x20020,$r0
 move.d 0x20000,$r1
 move.w 0x55aa,$r2
 move.w $r2,[r1+]
 .rept 8
 move.d [$r0+],$r2
 move.d $r2,[$r1+]
 .endr
 
 test_h_mem 0x76543211 0xd0000038
 
 .if ..asm.arch.cris.v32
 move irqvec1,$ebp
 .else
 move irqvec1,$ibr
 .endif
 ei
 move.d 0x100000,$r9
0:
 subq 1,$r9
 bne 0b
 nop
killme:
 fail
 
irq0x34:
 test_h_mem 0x76543212 0xd0000038
 pass
 
 .fill 65536*2+128,1,0
 
 singlevec irqvec1,0x34,irq0x34

Line No.	Rev	Author	Line
1	227	jeremybenn	`#mach: crisv10 crisv32`
2			`#sim(crisv10): --hw-device "/rv/trace? true"`
3			`#sim(crisv32): --hw-device "/rv/trace? true"`
4			`#output: /rv: WD\n`
5			`#output: /rv: REG R 0xd0000036\n`
6			`#output: /rv: := 0x76543210\n`
7			`#output: /rv: DMA W 0x20020..0x2003f\n`
8			`#output: /rv: 0x20020: 12 23 34 56\n`
9			`#output: /rv: 0x20024: 79 8a bd de\n`
10			`#output: /rv: 0x20028: fb ad ba db\n`
11			`#output: /rv: 0x2002c: ad 56 78 9a\n`
12			`#output: /rv: 0x20030: fd e1 23 45\n`
13			`#output: /rv: 0x20034: 66 54 32 1a\n`
14			`#output: /rv: 0x20038: ac cb be ed\n`
15			`#output: /rv: 0x2003c: db ed aa da\n`
16			`#output: /rv: REG R 0xd0000038\n`
17			`#output: /rv: := 0x76543211\n`
18			`#output: /rv: DMA R 0x20000..0x2001f\n`
19			`#output: /rv: 0x20000: aa 55 12 23\n`
20			`#output: /rv: 0x20004: 34 56 79 8a\n`
21			`#output: /rv: 0x20008: bd de fb ad\n`
22			`#output: /rv: 0x2000c: ba db ad 56\n`
23			`#output: /rv: 0x20010: 78 9a fd e1\n`
24			`#output: /rv: 0x20014: 23 45 66 54\n`
25			`#output: /rv: 0x20018: 32 1a ac cb\n`
26			`#output: /rv: 0x2001c: be ed db ed\n`
27			`#output: /rv: IRQ 0x8\n`
28			`#output: /rv: REG R 0xd0000038\n`
29			`#output: /rv: := 0x76543212\n`
30			`#output: pass\n`
31
32			`# Trivial test of DMA.`
33
34			`# Locations of IRQ notifiers above depend on when the simulator is`
35			`# polled; adjustments may be needed (after checking that no poll is`
36			`# gone due to a bug!)`
37
38			`#r W,`
39			`#r r,a8836,76543210`
40			`#r s,e020,12233456798abddefbadbadbad56789afde123456654321aaccbbeeddbedaada`
41			`#r r,a8838,76543211`
42			`#r l,e000,aa5512233456798abddefbadbadbad56789afde123456654321aaccbbeeddbed`
43			`#r I,8`
44			`#r r,a8838,76543212`
45
46			`.include "testutils.inc"`
47			`start`
48			`test_h_mem 0x76543210 0xd0000036`
49
50			`move.d 0x2003f,$r1`
51			`move.d 0x10000,$r3`
52			`0:`
53			`test.b [$r1]`
54			`bne 1f`
55			`subq 1,$r3`
56			`bne 0b`
57			`nop`
58
59			`1:`
60			`test_h_mem 0x56342312 0x20020`
61			`test_h_mem 0xdebd8a79 0x20024`
62			`test_h_mem 0xdbbaadfb 0x20028`
63			`test_h_mem 0x9a7856ad 0x2002c`
64			`test_h_mem 0x4523e1fd 0x20030`
65			`test_h_mem 0x1a325466 0x20034`
66			`test_h_mem 0xedbecbac 0x20038`
67			`test_h_mem 0xdaaaeddb 0x2003c`
68
69			`move.d 0x20020,$r0`
70			`move.d 0x20000,$r1`
71			`move.w 0x55aa,$r2`
72			`move.w $r2,[r1+]`
73			`.rept 8`
74			`move.d [$r0+],$r2`
75			`move.d $r2,[$r1+]`
76			`.endr`
77
78			`test_h_mem 0x76543211 0xd0000038`
79
80			`.if ..asm.arch.cris.v32`
81			`move irqvec1,$ebp`
82			`.else`
83			`move irqvec1,$ibr`
84			`.endif`
85			`ei`
86			`move.d 0x100000,$r9`
87			`0:`
88			`subq 1,$r9`
89			`bne 0b`
90			`nop`
91			`killme:`
92			`fail`
93
94			`irq0x34:`
95			`test_h_mem 0x76543212 0xd0000038`
96			`pass`
97
98			`.fill 65536*2+128,1,0`
99
100			`singlevec irqvec1,0x34,irq0x34`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [cris/] [hw/] [rv-n-cris/] [mem1.ms] - Blame information for rev 856