OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [cris/] [hw/] [rv-n-cris/] [poll1.ms] - Blame information for rev 816

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
#mach: crisv32
2
#sim(crisv32): --hw-device "/rv/dummy 0x12"
3
 
4
# A variant of trivial2.ms to check that the right thing happens when
5
# we reach the poll function with a dummy device.
6
 
7
 .include "testutils.inc"
8
 start
9
 move.d 0xd0000000,$r0
10
 move.d [$r0+],$r3
11
 cmp.d 0x12121212,$r3
12
 beq ok
13
 nop
14
bad:
15
 fail
16
ok:
17
 move.d 0x10000,$r10
18
0:
19
 bne 0b
20
 subq 1,$r10
21
 
22
 pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.