OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [fr30/] [borl.cgs] - Blame information for rev 842

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# fr30 testcase for borl $Rj,@$Ri
2
# mach(): fr30
3
 
4
        .include "testutils.inc"
5
 
6
        START
7
 
8
        .text
9
        .global borl
10
borl:
11
        ; Test borl $Rj,@$Ri
12
        mvi_h_mem       0x55555555,sp
13
        set_cc          0x0f            ; Condition codes should not change
14
        borl            0x0a,@sp
15
        test_cc         1 1 1 1
16
        test_h_mem      0x5f555555,sp
17
 
18
        mvi_h_mem       0xf0ffffff,sp
19
        set_cc          0x04            ; Condition codes should not change
20
        borl            0x00,@sp
21
        test_cc         0 1 0 0
22
        test_h_mem      0xf0ffffff,sp
23
 
24
        mvi_h_mem       0xdcadbeef,sp
25
        set_cc          0x09            ; Condition codes should not change
26
        borl            0x02,@sp
27
        test_cc         1 0 0 1
28
        test_h_mem      0xdeadbeef,sp
29
 
30
        pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.