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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [bcltlr.cgs] - Blame information for rev 842

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# frv testcase for bcltlr $ICCi,$ccond,$hint
# mach: all
 
        .include "testutils.inc"
 
        start
 
        .global bcltlr
bcltlr:
        ; ccond is true
        set_spr_immed   128,lcr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        bcltlr          icc0,0,0
 
        set_spr_addr    bad,lr
        set_icc         0x1 1
        bcltlr          icc1,0,1
 
        set_spr_addr    ok3,lr
        set_icc         0x2 2
        bcltlr          icc2,0,2
        fail
ok3:
        set_spr_addr    ok4,lr
        set_icc         0x3 3
        bcltlr          icc3,0,3
        fail
ok4:
        set_spr_addr    bad,lr
        set_icc         0x4 0
        bcltlr          icc0,0,0
 
        set_spr_addr    bad,lr
        set_icc         0x5 1
        bcltlr          icc1,0,1
 
        set_spr_addr    ok7,lr
        set_icc         0x6 2
        bcltlr          icc2,0,2
        fail
ok7:
        set_spr_addr    ok8,lr
        set_icc         0x7 3
        bcltlr          icc3,0,3
        fail
ok8:
        set_spr_addr    ok9,lr
        set_icc         0x8 0
        bcltlr          icc0,0,0
        fail
ok9:
        set_spr_addr    oka,lr
        set_icc         0x9 1
        bcltlr          icc1,0,1
        fail
oka:
        set_spr_addr    bad,lr
        set_icc         0xa 2
        bcltlr          icc2,0,2
 
        set_spr_addr    bad,lr
        set_icc         0xb 3
        bcltlr          icc3,0,3
 
        set_spr_addr    okd,lr
        set_icc         0xc 0
        bcltlr          icc0,0,0
        fail
okd:
        set_spr_addr    oke,lr
        set_icc         0xd 1
        bcltlr          icc1,0,1
        fail
oke:
        set_spr_addr    bad,lr
        set_icc         0xe 2
        bcltlr          icc2,0,2
 
        set_spr_addr    bad,lr
        set_icc         0xf 3
        bcltlr          icc3,0,3
 
        ; ccond is true
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        bcltlr          icc0,1,0
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x1 1
        bcltlr          icc1,1,1
 
        set_spr_immed   1,lcr
        set_spr_addr    okj,lr
        set_icc         0x2 2
        bcltlr          icc2,1,2
        fail
okj:
        set_spr_immed   1,lcr
        set_spr_addr    okk,lr
        set_icc         0x3 3
        bcltlr          icc3,1,3
        fail
okk:
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x4 0
        bcltlr          icc0,1,0
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x5 1
        bcltlr          icc1,1,1
 
        set_spr_immed   1,lcr
        set_spr_addr    okn,lr
        set_icc         0x6 2
        bcltlr          icc2,1,2
        fail
okn:
        set_spr_immed   1,lcr
        set_spr_addr    oko,lr
        set_icc         0x7 3
        bcltlr          icc3,1,3
        fail
oko:
        set_spr_immed   1,lcr
        set_spr_addr    okp,lr
        set_icc         0x8 0
        bcltlr          icc0,1,0
        fail
okp:
        set_spr_immed   1,lcr
        set_spr_addr    okq,lr
        set_icc         0x9 1
        bcltlr          icc1,1,1
        fail
okq:
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0xa 2
        bcltlr          icc2,1,2
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0xb 3
        bcltlr          icc3,1,3
 
        set_spr_immed   1,lcr
        set_spr_addr    okt,lr
        set_icc         0xc 0
        bcltlr          icc0,1,0
        fail
okt:
        set_spr_immed   1,lcr
        set_spr_addr    oku,lr
        set_icc         0xd 1
        bcltlr          icc1,1,1
        fail
oku:
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0xe 2
        bcltlr          icc2,1,2
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0xf 3
        bcltlr          icc3,1,3
 
        ; ccond is false
        set_spr_immed   128,lcr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        bcltlr          icc0,1,0
 
        set_icc         0x1 1
        bcltlr          icc1,1,1
 
        set_icc         0x2 2
        bcltlr          icc2,1,2
 
        set_icc         0x3 3
        bcltlr          icc3,1,3
 
        set_icc         0x4 0
        bcltlr          icc0,1,0
 
        set_icc         0x5 1
        bcltlr          icc1,1,1
 
        set_icc         0x6 2
        bcltlr          icc2,1,2
 
        set_icc         0x7 3
        bcltlr          icc3,1,3
 
        set_icc         0x8 0
        bcltlr          icc0,1,0
 
        set_icc         0x9 1
        bcltlr          icc1,1,1
 
        set_icc         0xa 2
        bcltlr          icc2,1,2
 
        set_icc         0xb 3
        bcltlr          icc3,1,3
 
        set_icc         0xc 0
        bcltlr          icc0,1,0
 
        set_icc         0xd 1
        bcltlr          icc1,1,1
 
        set_icc         0xe 2
        bcltlr          icc2,1,2
 
        set_icc         0xf 3
        bcltlr          icc3,1,3
 
        ; ccond is false
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        bcltlr          icc0,0,0
 
        set_spr_immed   1,lcr
        set_icc         0x1 1
        bcltlr          icc1,0,1
 
        set_spr_immed   1,lcr
        set_icc         0x2 2
        bcltlr          icc2,0,2
 
        set_spr_immed   1,lcr
        set_icc         0x3 3
        bcltlr          icc3,0,3
 
        set_spr_immed   1,lcr
        set_icc         0x4 0
        bcltlr          icc0,0,0
 
        set_spr_immed   1,lcr
        set_icc         0x5 1
        bcltlr          icc1,0,1
 
        set_spr_immed   1,lcr
        set_icc         0x6 2
        bcltlr          icc2,0,2
 
        set_spr_immed   1,lcr
        set_icc         0x7 3
        bcltlr          icc3,0,3
 
        set_spr_immed   1,lcr
        set_icc         0x8 0
        bcltlr          icc0,0,0
 
        set_spr_immed   1,lcr
        set_icc         0x9 1
        bcltlr          icc1,0,1
 
        set_spr_immed   1,lcr
        set_icc         0xa 2
        bcltlr          icc2,0,2
 
        set_spr_immed   1,lcr
        set_icc         0xb 3
        bcltlr          icc3,0,3
 
        set_spr_immed   1,lcr
        set_icc         0xc 0
        bcltlr          icc0,0,0
 
        set_spr_immed   1,lcr
        set_icc         0xd 1
        bcltlr          icc1,0,1
 
        set_spr_immed   1,lcr
        set_icc         0xe 2
        bcltlr          icc2,0,2
 
        set_spr_immed   1,lcr
        set_icc         0xf 3
        bcltlr          icc3,0,3
 
        pass
bad:
        fail

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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [bcltlr.cgs] - Blame information for rev 842

Line No.	Rev	Author	Line
1	227	jeremybenn	`# frv testcase for bcltlr $ICCi,$ccond,$hint`
2			`# mach: all`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global bcltlr`
9			`bcltlr:`
10			`; ccond is true`
11			`set_spr_immed 128,lcr`
12			`set_spr_addr bad,lr`
13			`set_icc 0x0 0`
14			`bcltlr icc0,0,0`
15
16			`set_spr_addr bad,lr`
17			`set_icc 0x1 1`
18			`bcltlr icc1,0,1`
19
20			`set_spr_addr ok3,lr`
21			`set_icc 0x2 2`
22			`bcltlr icc2,0,2`
23			`fail`
24			`ok3:`
25			`set_spr_addr ok4,lr`
26			`set_icc 0x3 3`
27			`bcltlr icc3,0,3`
28			`fail`
29			`ok4:`
30			`set_spr_addr bad,lr`
31			`set_icc 0x4 0`
32			`bcltlr icc0,0,0`
33
34			`set_spr_addr bad,lr`
35			`set_icc 0x5 1`
36			`bcltlr icc1,0,1`
37
38			`set_spr_addr ok7,lr`
39			`set_icc 0x6 2`
40			`bcltlr icc2,0,2`
41			`fail`
42			`ok7:`
43			`set_spr_addr ok8,lr`
44			`set_icc 0x7 3`
45			`bcltlr icc3,0,3`
46			`fail`
47			`ok8:`
48			`set_spr_addr ok9,lr`
49			`set_icc 0x8 0`
50			`bcltlr icc0,0,0`
51			`fail`
52			`ok9:`
53			`set_spr_addr oka,lr`
54			`set_icc 0x9 1`
55			`bcltlr icc1,0,1`
56			`fail`
57			`oka:`
58			`set_spr_addr bad,lr`
59			`set_icc 0xa 2`
60			`bcltlr icc2,0,2`
61
62			`set_spr_addr bad,lr`
63			`set_icc 0xb 3`
64			`bcltlr icc3,0,3`
65
66			`set_spr_addr okd,lr`
67			`set_icc 0xc 0`
68			`bcltlr icc0,0,0`
69			`fail`
70			`okd:`
71			`set_spr_addr oke,lr`
72			`set_icc 0xd 1`
73			`bcltlr icc1,0,1`
74			`fail`
75			`oke:`
76			`set_spr_addr bad,lr`
77			`set_icc 0xe 2`
78			`bcltlr icc2,0,2`
79
80			`set_spr_addr bad,lr`
81			`set_icc 0xf 3`
82			`bcltlr icc3,0,3`
83
84			`; ccond is true`
85			`set_spr_immed 1,lcr`
86			`set_spr_addr bad,lr`
87			`set_icc 0x0 0`
88			`bcltlr icc0,1,0`
89
90			`set_spr_immed 1,lcr`
91			`set_spr_addr bad,lr`
92			`set_icc 0x1 1`
93			`bcltlr icc1,1,1`
94
95			`set_spr_immed 1,lcr`
96			`set_spr_addr okj,lr`
97			`set_icc 0x2 2`
98			`bcltlr icc2,1,2`
99			`fail`
100			`okj:`
101			`set_spr_immed 1,lcr`
102			`set_spr_addr okk,lr`
103			`set_icc 0x3 3`
104			`bcltlr icc3,1,3`
105			`fail`
106			`okk:`
107			`set_spr_immed 1,lcr`
108			`set_spr_addr bad,lr`
109			`set_icc 0x4 0`
110			`bcltlr icc0,1,0`
111
112			`set_spr_immed 1,lcr`
113			`set_spr_addr bad,lr`
114			`set_icc 0x5 1`
115			`bcltlr icc1,1,1`
116
117			`set_spr_immed 1,lcr`
118			`set_spr_addr okn,lr`
119			`set_icc 0x6 2`
120			`bcltlr icc2,1,2`
121			`fail`
122			`okn:`
123			`set_spr_immed 1,lcr`
124			`set_spr_addr oko,lr`
125			`set_icc 0x7 3`
126			`bcltlr icc3,1,3`
127			`fail`
128			`oko:`
129			`set_spr_immed 1,lcr`
130			`set_spr_addr okp,lr`
131			`set_icc 0x8 0`
132			`bcltlr icc0,1,0`
133			`fail`
134			`okp:`
135			`set_spr_immed 1,lcr`
136			`set_spr_addr okq,lr`
137			`set_icc 0x9 1`
138			`bcltlr icc1,1,1`
139			`fail`
140			`okq:`
141			`set_spr_immed 1,lcr`
142			`set_spr_addr bad,lr`
143			`set_icc 0xa 2`
144			`bcltlr icc2,1,2`
145
146			`set_spr_immed 1,lcr`
147			`set_spr_addr bad,lr`
148			`set_icc 0xb 3`
149			`bcltlr icc3,1,3`
150
151			`set_spr_immed 1,lcr`
152			`set_spr_addr okt,lr`
153			`set_icc 0xc 0`
154			`bcltlr icc0,1,0`
155			`fail`
156			`okt:`
157			`set_spr_immed 1,lcr`
158			`set_spr_addr oku,lr`
159			`set_icc 0xd 1`
160			`bcltlr icc1,1,1`
161			`fail`
162			`oku:`
163			`set_spr_immed 1,lcr`
164			`set_spr_addr bad,lr`
165			`set_icc 0xe 2`
166			`bcltlr icc2,1,2`
167
168			`set_spr_immed 1,lcr`
169			`set_spr_addr bad,lr`
170			`set_icc 0xf 3`
171			`bcltlr icc3,1,3`
172
173			`; ccond is false`
174			`set_spr_immed 128,lcr`
175			`set_spr_addr bad,lr`
176			`set_icc 0x0 0`
177			`bcltlr icc0,1,0`
178
179			`set_icc 0x1 1`
180			`bcltlr icc1,1,1`
181
182			`set_icc 0x2 2`
183			`bcltlr icc2,1,2`
184
185			`set_icc 0x3 3`
186			`bcltlr icc3,1,3`
187
188			`set_icc 0x4 0`
189			`bcltlr icc0,1,0`
190
191			`set_icc 0x5 1`
192			`bcltlr icc1,1,1`
193
194			`set_icc 0x6 2`
195			`bcltlr icc2,1,2`
196
197			`set_icc 0x7 3`
198			`bcltlr icc3,1,3`
199
200			`set_icc 0x8 0`
201			`bcltlr icc0,1,0`
202
203			`set_icc 0x9 1`
204			`bcltlr icc1,1,1`
205
206			`set_icc 0xa 2`
207			`bcltlr icc2,1,2`
208
209			`set_icc 0xb 3`
210			`bcltlr icc3,1,3`
211
212			`set_icc 0xc 0`
213			`bcltlr icc0,1,0`
214
215			`set_icc 0xd 1`
216			`bcltlr icc1,1,1`
217
218			`set_icc 0xe 2`
219			`bcltlr icc2,1,2`
220
221			`set_icc 0xf 3`
222			`bcltlr icc3,1,3`
223
224			`; ccond is false`
225			`set_spr_immed 1,lcr`
226			`set_spr_addr bad,lr`
227			`set_icc 0x0 0`
228			`bcltlr icc0,0,0`
229
230			`set_spr_immed 1,lcr`
231			`set_icc 0x1 1`
232			`bcltlr icc1,0,1`
233
234			`set_spr_immed 1,lcr`
235			`set_icc 0x2 2`
236			`bcltlr icc2,0,2`
237
238			`set_spr_immed 1,lcr`
239			`set_icc 0x3 3`
240			`bcltlr icc3,0,3`
241
242			`set_spr_immed 1,lcr`
243			`set_icc 0x4 0`
244			`bcltlr icc0,0,0`
245
246			`set_spr_immed 1,lcr`
247			`set_icc 0x5 1`
248			`bcltlr icc1,0,1`
249
250			`set_spr_immed 1,lcr`
251			`set_icc 0x6 2`
252			`bcltlr icc2,0,2`
253
254			`set_spr_immed 1,lcr`
255			`set_icc 0x7 3`
256			`bcltlr icc3,0,3`
257
258			`set_spr_immed 1,lcr`
259			`set_icc 0x8 0`
260			`bcltlr icc0,0,0`
261
262			`set_spr_immed 1,lcr`
263			`set_icc 0x9 1`
264			`bcltlr icc1,0,1`
265
266			`set_spr_immed 1,lcr`
267			`set_icc 0xa 2`
268			`bcltlr icc2,0,2`
269
270			`set_spr_immed 1,lcr`
271			`set_icc 0xb 3`
272			`bcltlr icc3,0,3`
273
274			`set_spr_immed 1,lcr`
275			`set_icc 0xc 0`
276			`bcltlr icc0,0,0`
277
278			`set_spr_immed 1,lcr`
279			`set_icc 0xd 1`
280			`bcltlr icc1,0,1`
281
282			`set_spr_immed 1,lcr`
283			`set_icc 0xe 2`
284			`bcltlr icc2,0,2`
285
286			`set_spr_immed 1,lcr`
287			`set_icc 0xf 3`
288			`bcltlr icc3,0,3`
289
290			`pass`
291			`bad:`
292			`fail`