OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [fbltlr.cgs] - Blame information for rev 227

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# frv testcase for fbltlr $FCCi,$hint
2
# mach: all
3
 
4
        .include "testutils.inc"
5
 
6
        start
7
 
8
        .global fbltlr
9
fbltlr:
10
        set_spr_addr    bad,lr
11
        set_fcc         0x0 0
12
        fbltlr          fcc0,0
13
 
14
        set_spr_addr    bad,lr
15
        set_fcc         0x1 1
16
        fbltlr          fcc1,1
17
 
18
        set_spr_addr    bad,lr
19
        set_fcc         0x2 2
20
        fbltlr          fcc2,2
21
 
22
        set_spr_addr    bad,lr
23
        set_fcc         0x3 3
24
        fbltlr          fcc3,3
25
 
26
        set_spr_addr    ok5,lr
27
        set_fcc         0x4 0
28
        fbltlr          fcc0,0
29
        fail
30
ok5:
31
        set_spr_addr    ok6,lr
32
        set_fcc         0x5 1
33
        fbltlr          fcc1,1
34
        fail
35
ok6:
36
        set_spr_addr    ok7,lr
37
        set_fcc         0x6 2
38
        fbltlr          fcc2,2
39
        fail
40
ok7:
41
        set_spr_addr    ok8,lr
42
        set_fcc         0x7 3
43
        fbltlr          fcc3,3
44
        fail
45
ok8:
46
        set_spr_addr    bad,lr
47
        set_fcc         0x8 0
48
        fbltlr          fcc0,0
49
 
50
        set_spr_addr    bad,lr
51
        set_fcc         0x9 1
52
        fbltlr          fcc1,1
53
 
54
        set_spr_addr    bad,lr
55
        set_fcc         0xa 2
56
        fbltlr          fcc2,2
57
 
58
        set_spr_addr    bad,lr
59
        set_fcc         0xb 3
60
        fbltlr          fcc3,3
61
 
62
        set_spr_addr    okd,lr
63
        set_fcc         0xc 0
64
        fbltlr          fcc0,0
65
        fail
66
okd:
67
        set_spr_addr    oke,lr
68
        set_fcc         0xd 1
69
        fbltlr          fcc1,1
70
        fail
71
oke:
72
        set_spr_addr    okf,lr
73
        set_fcc         0xe 2
74
        fbltlr          fcc2,2
75
        fail
76
okf:
77
        set_spr_addr    okg,lr
78
        set_fcc         0xf 3
79
        fbltlr          fcc3,3
80
        fail
81
okg:
82
        pass
83
bad:
84
        fail

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.