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jeremybenn |
# frv testcase for smass $GRi,$GRj
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# mach: fr405 fr450
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.include "../testutils.inc"
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start
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.global smass
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smass1:
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; Positive operands
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set_gr_immed 3,gr7 ; multiply small numbers
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 3,gr7
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test_gr_immed 2,gr8
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test_spr_immed 7,iacc0l ; result 3*2+1
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test_spr_immed 0,iacc0h
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smass2:
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set_gr_immed 1,gr7 ; multiply by 1
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 1,gr7
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test_gr_immed 2,gr8
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test_spr_immed 3,iacc0l ; result 1*2+1
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test_spr_immed 0,iacc0h
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smass3:
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set_gr_immed 2,gr7 ; multiply by 1
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set_gr_immed 1,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 1,gr8
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test_gr_immed 2,gr7
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test_spr_immed 3,iacc0l ; result 2*1+1
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test_spr_immed 0,iacc0h
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smass4:
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set_gr_immed 0,gr7 ; multiply by 0
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 2,gr8
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test_gr_immed 0,gr7
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test_spr_immed 1,iacc0l ; result 0*2+1
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test_spr_immed 0,iacc0h
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smass5:
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set_gr_immed 2,gr7 ; multiply by 0
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set_gr_immed 0,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 0,gr8
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test_gr_immed 2,gr7
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test_spr_immed 1,iacc0l ; result 2*0+1
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test_spr_immed 0,iacc0h
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smass6:
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set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 2,gr8
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test_gr_limmed 0x3fff,0xffff,gr7
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test_spr_limmed 0x7fff,0xffff,iacc0l ; 3fffffff*2+1
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test_spr_immed 0,iacc0h
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smass7:
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set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 2,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_limmed 0x8000,0x0001,iacc0l ; 40000000*2+1
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test_spr_immed 0,iacc0h
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smass8:
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set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
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set_gr_immed 4,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 4,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_immed 1,iacc0l ; 40000000*4+1
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test_spr_immed 1,iacc0h
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smass9:
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set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result
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set_gr_limmed 0x7fff,0xffff,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_limmed 0x7fff,0xffff,gr8
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test_gr_limmed 0x7fff,0xffff,gr7
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test_spr_immed 0x00000002,iacc0l ; 7fffffff*7fffffff+1
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test_spr_limmed 0x3fff,0xffff,iacc0h
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smass10:
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; Mixed operands
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set_gr_immed -3,gr7 ; multiply small numbers
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 2,gr8
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test_gr_immed -3,gr7
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test_spr_immed -5,iacc0l ; -3*2+1
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test_spr_immed -1,iacc0h
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smass11:
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set_gr_immed 3,gr7 ; multiply small numbers
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed 3,gr7
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test_spr_immed -5,iacc0l ; 3*-2+1
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test_spr_immed -1,iacc0h
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smass12:
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set_gr_immed 1,gr7 ; multiply by 1
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed 1,gr7
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test_spr_immed -1,iacc0l ; 1*-2+1
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test_spr_immed -1,iacc0h
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smass13:
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set_gr_immed -2,gr7 ; multiply by 1
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set_gr_immed 1,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 1,gr8
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test_gr_immed -2,gr7
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test_spr_immed -1,iacc0l ; -2*1+1
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test_spr_immed -1,iacc0h
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smass14:
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set_gr_immed 0,gr7 ; multiply by 0
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed 0,gr7
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test_spr_immed 1,iacc0l ; 0*-2+1
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test_spr_immed 0,iacc0h
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smass15:
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set_gr_immed -2,gr7 ; multiply by 0
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set_gr_immed 0,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed 0,gr8
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test_gr_immed -2,gr7
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test_spr_immed 1,iacc0l ; -2*0+1
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test_spr_immed 0,iacc0h
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smass16:
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set_gr_limmed 0x2000,0x0001,gr7 ; 31 bit result
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_limmed 0x2000,0x0001,gr7
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test_spr_limmed 0xbfff,0xffff,iacc0l ; 20000001*-2+1
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test_spr_limmed 0xffff,0xffff,iacc0h
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smass17:
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set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_limmed 0x8000,0x0001,iacc0l ; 40000000*-2+1
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test_spr_limmed 0xffff,0xffff,iacc0h
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smass18:
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set_gr_limmed 0x4000,0x0001,gr7 ; 32 bit result
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_limmed 0x4000,0x0001,gr7
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test_spr_limmed 0x7fff,0xffff,iacc0l ; 40000001*-2+1
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test_spr_limmed 0xffff,0xffff,iacc0h
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smass19:
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set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
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set_gr_immed -4,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -4,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_limmed 0x0000,0x0001,iacc0l ; 40000000*-4+1
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test_spr_limmed 0xffff,0xffff,iacc0h
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smass20:
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set_gr_limmed 0x7fff,0xffff,gr7 ; max negative result
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set_gr_limmed 0x8000,0x0000,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_limmed 0x8000,0x0000,gr8
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test_gr_limmed 0x7fff,0xffff,gr7
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test_spr_limmed 0x8000,0x0001,iacc0l ; 7fffffff*80000000+1
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test_spr_limmed 0xc000,0x0000,iacc0h
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smass21:
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; Negative operands
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set_gr_immed -3,gr7 ; multiply small numbers
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed -3,gr7
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test_spr_immed 7,iacc0l ; -3*-2+1
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test_spr_immed 0,iacc0h
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smass22:
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set_gr_immed -1,gr7 ; multiply by 1
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed -1,gr7
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test_spr_immed 3,iacc0l ; -1*-2+1
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test_spr_immed 0,iacc0h
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smass23:
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set_gr_immed -2,gr7 ; multiply by 1
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set_gr_immed -1,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -1,gr8
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test_gr_immed -2,gr7
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test_spr_immed 3,iacc0l ; -2*-1+1
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test_spr_immed 0,iacc0h
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smass24:
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set_gr_limmed 0xc000,0x0001,gr7 ; 31 bit result
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_limmed 0xc000,0x0001,gr7
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test_spr_limmed 0x7fff,0xffff,iacc0l ; c0000001*-2+1
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test_spr_immed 0,iacc0h
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smass25:
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set_gr_limmed 0xc000,0x0000,gr7 ; 32 bit result
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -2,gr8
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test_gr_limmed 0xc000,0x0000,gr7
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test_spr_limmed 0x8000,0x0001,iacc0l ; c0000000*-2+1
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test_spr_immed 0,iacc0h
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smass26:
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set_gr_limmed 0xc000,0x0000,gr7 ; 33 bit result
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set_gr_immed -4,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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test_gr_immed -4,gr8
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test_gr_limmed 0xc000,0x0000,gr7
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270 |
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test_spr_immed 0x00000001,iacc0l ; c0000000*-4+1
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test_spr_immed 1,iacc0h
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smass27:
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set_gr_limmed 0x8000,0x0001,gr7 ; almost max positive result
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274 |
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set_gr_limmed 0x8000,0x0001,gr8
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275 |
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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277 |
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smass gr7,gr8
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278 |
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test_gr_limmed 0x8000,0x0001,gr8
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279 |
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test_gr_limmed 0x8000,0x0001,gr7
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280 |
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test_spr_immed 0x00000002,iacc0l ; 80000001*80000001+1
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test_spr_limmed 0x3fff,0xffff,iacc0h
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282 |
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smass28:
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set_gr_limmed 0x8000,0x0000,gr7 ; max positive result
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set_gr_limmed 0x8000,0x0000,gr8
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285 |
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smass gr7,gr8
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288 |
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test_gr_limmed 0x8000,0x0000,gr8
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test_gr_limmed 0x8000,0x0000,gr7
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test_spr_immed 0x00000001,iacc0l ; 80000000*80000000+1
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291 |
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test_spr_limmed 0x4000,0x0000,iacc0h
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292 |
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smass29:
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set_gr_limmed 0x7fff,0xffff,gr7 ; not quite overflow (pos)
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295 |
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set_gr_limmed 0x7fff,0xffff,gr8
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296 |
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set_spr_limmed 0xffff,0xfffe,iacc0l
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297 |
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set_spr_limmed 0x4000,0x0000,iacc0h
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298 |
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smass gr7,gr8
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299 |
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test_gr_limmed 0x7fff,0xffff,gr8
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300 |
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test_gr_limmed 0x7fff,0xffff,gr7
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301 |
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test_spr_limmed 0xffff,0xffff,iacc0l ; 7fffffff*7fffffff+
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302 |
|
|
test_spr_limmed 0x7fff,0xffff,iacc0h ; 40000000fffffffe
|
303 |
|
|
|
304 |
|
|
smass30:
|
305 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; just barely overflow (pos)
|
306 |
|
|
set_gr_limmed 0x7fff,0xffff,gr8
|
307 |
|
|
set_spr_limmed 0xffff,0xffff,iacc0l
|
308 |
|
|
set_spr_limmed 0x4000,0x0000,iacc0h
|
309 |
|
|
smass gr7,gr8
|
310 |
|
|
test_gr_limmed 0x7fff,0xffff,gr8
|
311 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
312 |
|
|
test_spr_limmed 0xffff,0xffff,iacc0l ; 7fffffff*7fffffff+
|
313 |
|
|
test_spr_limmed 0x7fff,0xffff,iacc0h ; 40000000ffffffff
|
314 |
|
|
|
315 |
|
|
smass31:
|
316 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; maximum overflow (pos)
|
317 |
|
|
set_gr_limmed 0x7fff,0xffff,gr8
|
318 |
|
|
set_spr_limmed 0xffff,0xffff,iacc0l
|
319 |
|
|
set_spr_limmed 0x7fff,0xffff,iacc0h
|
320 |
|
|
smass gr7,gr8
|
321 |
|
|
test_gr_limmed 0x7fff,0xffff,gr8
|
322 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
323 |
|
|
test_spr_limmed 0xffff,0xffff,iacc0l ; 7fffffff*7fffffff+
|
324 |
|
|
test_spr_limmed 0x7fff,0xffff,iacc0h ; 7fffffffffffffff
|
325 |
|
|
|
326 |
|
|
smass32:
|
327 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; not quite overflow (neg)
|
328 |
|
|
set_gr_limmed 0x8000,0x0000,gr8
|
329 |
|
|
set_spr_limmed 0x8000,0x0000,iacc0l
|
330 |
|
|
set_spr_limmed 0xbfff,0xffff,iacc0h
|
331 |
|
|
smass gr7,gr8
|
332 |
|
|
test_gr_limmed 0x8000,0x0000,gr8
|
333 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
334 |
|
|
test_spr_limmed 0x0000,0x0000,iacc0l ; 7fffffff*7fffffff+
|
335 |
|
|
test_spr_limmed 0x8000,0x0000,iacc0h ; bfffffff80000000
|
336 |
|
|
|
337 |
|
|
smass33:
|
338 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; just barely overflow (neg)
|
339 |
|
|
set_gr_limmed 0x8000,0x0000,gr8
|
340 |
|
|
set_spr_limmed 0x7fff,0xffff,iacc0l
|
341 |
|
|
set_spr_limmed 0xbfff,0xffff,iacc0h
|
342 |
|
|
smass gr7,gr8
|
343 |
|
|
test_gr_limmed 0x8000,0x0000,gr8
|
344 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
345 |
|
|
test_spr_limmed 0x0000,0x0000,iacc0l ; 7fffffff*7fffffff+
|
346 |
|
|
test_spr_limmed 0x8000,0x0000,iacc0h ; bfffffff7fffffff
|
347 |
|
|
|
348 |
|
|
smass34:
|
349 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; maximum overflow (neg)
|
350 |
|
|
set_gr_limmed 0x8000,0x0000,gr8
|
351 |
|
|
set_spr_limmed 0x0000,0x0000,iacc0l
|
352 |
|
|
set_spr_limmed 0x8000,0x0000,iacc0h
|
353 |
|
|
smass gr7,gr8
|
354 |
|
|
test_gr_limmed 0x8000,0x0000,gr8
|
355 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
356 |
|
|
test_spr_limmed 0x0000,0x0000,iacc0l ; 7fffffff*7fffffff+
|
357 |
|
|
test_spr_limmed 0x8000,0x0000,iacc0h ; 8000000000000000
|
358 |
|
|
|
359 |
|
|
pass
|