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jeremybenn |
# frv testcase for smsss $GRi,$GRj
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# mach: fr405 fr450
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.include "../testutils.inc"
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start
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.global smsss
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smsss1:
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; Positive operands
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set_gr_immed 3,gr7 ; multiply small numbers
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 7,iacc0l
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smsss gr7,gr8
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test_gr_immed 3,gr7
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test_gr_immed 2,gr8
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test_spr_immed 1,iacc0l ; result 7-3*2
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test_spr_immed 0,iacc0h
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smsss2:
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set_gr_immed 1,gr7 ; multiply by 1
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 3,iacc0l
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smsss gr7,gr8
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test_gr_immed 1,gr7
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test_gr_immed 2,gr8
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test_spr_immed 1,iacc0l ; result 3-1*2
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test_spr_immed 0,iacc0h
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smsss3:
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set_gr_immed 2,gr7 ; multiply by 1
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set_gr_immed 1,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 3,iacc0l
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smsss gr7,gr8
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test_gr_immed 1,gr8
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test_gr_immed 2,gr7
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test_spr_immed 1,iacc0l ; result 3-2*1
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test_spr_immed 0,iacc0h
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smsss4:
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set_gr_immed 0,gr7 ; multiply by 0
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set_gr_immed 2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smsss gr7,gr8
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test_gr_immed 2,gr8
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test_gr_immed 0,gr7
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test_spr_immed 1,iacc0l ; result 1-0*2
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test_spr_immed 0,iacc0h
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smsss5:
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set_gr_immed 2,gr7 ; multiply by 0
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set_gr_immed 0,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smsss gr7,gr8
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test_gr_immed 0,gr8
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test_gr_immed 2,gr7
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test_spr_immed 1,iacc0l ; result 1-2*0
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test_spr_immed 0,iacc0h
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smsss6:
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set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result
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set_gr_immed 2,gr8
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set_spr_immed -1,iacc0h
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set_spr_immed -1,iacc0l
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smsss gr7,gr8
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test_gr_immed 2,gr8
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test_gr_limmed 0x3fff,0xffff,gr7
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test_spr_limmed 0x8000,0x0001,iacc0l ; -1-3fffffff*2
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test_spr_immed -1,iacc0h
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smsss7:
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set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
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set_gr_immed 2,gr8
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set_spr_immed -1,iacc0h
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set_spr_limmed 0x8000,0x0001,iacc0l
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smsss gr7,gr8
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test_gr_immed 2,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_immed 1,iacc0l ; ffffffff80000001-40000000*2
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test_spr_immed -1,iacc0h
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smsss8:
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set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
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set_gr_immed 4,gr8
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set_spr_immed -1,iacc0h
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set_spr_immed 1,iacc0l
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smsss gr7,gr8
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test_gr_immed 4,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_immed 1,iacc0l ; ffffffff00000001-40000000*4
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test_spr_immed -2,iacc0h
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smsss9:
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set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result
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set_gr_limmed 0x7fff,0xffff,gr8
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set_spr_limmed 0x7fff,0xffff,iacc0h
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set_spr_immed -1,iacc0l
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smsss gr7,gr8
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test_gr_limmed 0x7fff,0xffff,gr8
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test_gr_limmed 0x7fff,0xffff,gr7
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test_spr_limmed 0xffff,0xfffe,iacc0l ; 7fffffffffffffff-7fffffff*7fffffff
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test_spr_limmed 0x4000,0x0000,iacc0h
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smsss10:
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; Mixed operands
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set_gr_immed -3,gr7 ; multiply small numbers
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set_gr_immed 2,gr8
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set_spr_immed -1,iacc0h
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set_spr_immed -5,iacc0l
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smsss gr7,gr8
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test_gr_immed 2,gr8
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test_gr_immed -3,gr7
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test_spr_immed 1,iacc0l ; -5-(-3*2)
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test_spr_immed 0,iacc0h
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smsss11:
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set_gr_immed 3,gr7 ; multiply small numbers
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set_gr_immed -2,gr8
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set_spr_immed -1,iacc0h
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set_spr_immed -5,iacc0l
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smsss gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed 3,gr7
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test_spr_immed 1,iacc0l ; -5-(3*-2)
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test_spr_immed 0,iacc0h
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smsss12:
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set_gr_immed 1,gr7 ; multiply by 1
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set_gr_immed -2,gr8
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set_spr_immed -1,iacc0h
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set_spr_immed -1,iacc0l
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smsss gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed 1,gr7
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test_spr_immed 1,iacc0l ; -1-(1*-2)
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test_spr_immed 0,iacc0h
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smsss13:
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set_gr_immed -2,gr7 ; multiply by 1
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set_gr_immed 1,gr8
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set_spr_immed -1,iacc0h
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set_spr_immed -1,iacc0l
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smsss gr7,gr8
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test_gr_immed 1,gr8
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test_gr_immed -2,gr7
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test_spr_immed 1,iacc0l ; -1-(-2*1)
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test_spr_immed 0,iacc0h
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smsss14:
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set_gr_immed 0,gr7 ; multiply by 0
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smsss gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed 0,gr7
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test_spr_immed 1,iacc0l ; 1-(0*-2)
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test_spr_immed 0,iacc0h
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smsss15:
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set_gr_immed -2,gr7 ; multiply by 0
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set_gr_immed 0,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smsss gr7,gr8
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test_gr_immed 0,gr8
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test_gr_immed -2,gr7
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test_spr_immed 1,iacc0l ; 1-(-2*0)
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test_spr_immed 0,iacc0h
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smsss16:
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set_gr_limmed 0x2000,0x0000,gr7 ; 31 bit result
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_limmed 0x3fff,0xffff,iacc0l
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smsss gr7,gr8
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test_gr_immed -2,gr8
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test_gr_limmed 0x2000,0x0000,gr7
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test_spr_limmed 0x7fff,0xffff,iacc0l
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test_spr_immed 0,iacc0h ; 3fffffff-20000001*-2
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smsss17:
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set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smsss gr7,gr8
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test_gr_immed -2,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_limmed 0x8000,0x0001,iacc0l ; 1-40000000*-2
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test_spr_immed 0,iacc0h
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smsss18:
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set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
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set_gr_immed -2,gr8
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set_spr_immed -1,iacc0h
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set_spr_immed -1,iacc0l
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smsss gr7,gr8
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test_gr_immed -2,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_limmed 0x7fff,0xffff,iacc0l
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test_spr_immed 0,iacc0h ; -1-40000000*-2
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smsss19:
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set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
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set_gr_immed -4,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 1,iacc0l
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smsss gr7,gr8
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test_gr_immed -4,gr8
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test_gr_limmed 0x4000,0x0000,gr7
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test_spr_immed 1,iacc0l ; 200000001-(40000000*-4)
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test_spr_immed 1,iacc0h
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smsss20:
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set_gr_limmed 0x7fff,0xffff,gr7 ; max negative result
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set_gr_limmed 0x7fff,0xffff,gr8
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set_spr_limmed 0xbfff,0xffff,iacc0h
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set_spr_limmed 0x0000,0x0001,iacc0l
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smsss gr7,gr8
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test_gr_limmed 0x7fff,0xffff,gr8
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test_gr_limmed 0x7fff,0xffff,gr7
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| 209 |
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test_spr_immed 0,iacc0l ; bfffffff00000001-(7fffffff*7fffffff)
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test_spr_limmed 0x8000,0x0000,iacc0h
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smsss21:
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; Negative operands
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set_gr_immed -3,gr7 ; multiply small numbers
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set_gr_immed -2,gr8
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set_spr_immed 0,iacc0h
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set_spr_immed 7,iacc0l
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smsss gr7,gr8
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test_gr_immed -2,gr8
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test_gr_immed -3,gr7
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| 220 |
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test_spr_immed 1,iacc0l ; 7-(-3*-2)
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test_spr_immed 0,iacc0h
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smsss22:
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set_gr_immed -1,gr7 ; multiply by 1
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| 224 |
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set_gr_immed -2,gr8
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| 225 |
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set_spr_immed 0,iacc0h
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| 226 |
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set_spr_immed 3,iacc0l
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| 227 |
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smsss gr7,gr8
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| 228 |
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test_gr_immed -2,gr8
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| 229 |
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test_gr_immed -1,gr7
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| 230 |
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test_spr_immed 1,iacc0l ; 3-(-1*-2)
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| 231 |
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test_spr_immed 0,iacc0h
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| 232 |
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smsss23:
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| 233 |
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set_gr_immed -2,gr7 ; multiply by 1
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| 234 |
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set_gr_immed -1,gr8
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| 235 |
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set_spr_immed 0,iacc0h
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| 236 |
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set_spr_immed 3,iacc0l
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| 237 |
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smsss gr7,gr8
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| 238 |
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test_gr_immed -1,gr8
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| 239 |
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test_gr_immed -2,gr7
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| 240 |
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test_spr_immed 1,iacc0l ; 3-(-2*-1)
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| 241 |
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test_spr_immed 0,iacc0h
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| 242 |
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smsss24:
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| 243 |
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set_gr_immed -32768,gr7 ; 31 bit result
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| 244 |
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set_gr_immed -32768,gr8
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| 245 |
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set_spr_immed 0,iacc0h
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| 246 |
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set_spr_limmed 0xbfff,0xffff,iacc0l
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| 247 |
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smsss gr7,gr8
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| 248 |
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test_gr_immed -32768,gr8
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| 249 |
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test_gr_immed -32768,gr7
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| 250 |
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test_spr_limmed 0x7fff,0xffff,iacc0l ; 7ffffffb-(-2*-2)
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| 251 |
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test_spr_immed 0,iacc0h
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| 252 |
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smsss25:
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| 253 |
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set_gr_immed 0xffff,gr7 ; 32 bit result
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| 254 |
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set_gr_immed 0xffff,gr8
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| 255 |
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set_spr_immed 1,iacc0h
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| 256 |
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set_spr_limmed 0xfffe,0x0000,iacc0l
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| 257 |
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smsss gr7,gr8
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| 258 |
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test_gr_immed 0xffff,gr8
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| 259 |
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test_gr_immed 0xffff,gr7
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| 260 |
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test_spr_limmed 0xffff,0xffff,iacc0l ; 1fffe0000-ffff*ffff
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| 261 |
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test_spr_immed 0,iacc0h
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| 262 |
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smsss26:
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| 263 |
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set_gr_limmed 0x0001,0x0000,gr7 ; 33 bit result
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| 264 |
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set_gr_limmed 0x0001,0x0000,gr8
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| 265 |
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set_spr_immed 2,iacc0h
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| 266 |
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set_spr_immed 1,iacc0l
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| 267 |
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smsss gr7,gr8
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| 268 |
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test_gr_limmed 0x0001,0x0000,gr8
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| 269 |
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test_gr_limmed 0x0001,0x0000,gr7
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| 270 |
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test_spr_immed 1,iacc0l ; 0x200000001-0x10000*0x10000
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| 271 |
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test_spr_immed 1,iacc0h
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| 272 |
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smsss27:
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| 273 |
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set_gr_immed -2,gr7 ; almost max positive result
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| 274 |
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set_gr_immed -2,gr8
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| 275 |
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set_spr_limmed 0x7fff,0xffff,iacc0h
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| 276 |
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set_spr_limmed 0xffff,0xffff,iacc0l
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| 277 |
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smsss gr7,gr8
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| 278 |
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test_gr_immed -2,gr8
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| 279 |
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test_gr_immed -2,gr7
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| 280 |
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test_spr_limmed 0xffff,0xfffb,iacc0l ; maxpos - (-2*-2)
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| 281 |
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test_spr_limmed 0x7fff,0xffff,iacc0h
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| 282 |
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smsss28:
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| 283 |
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set_gr_immed 0,gr7 ; max positive result
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| 284 |
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set_gr_immed 0,gr8
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| 285 |
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set_spr_limmed 0x7fff,0xffff,iacc0h
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| 286 |
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set_spr_limmed 0xffff,0xffff,iacc0l
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| 287 |
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smsss gr7,gr8
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| 288 |
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test_gr_immed 0,gr8
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| 289 |
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test_gr_immed 0,gr7
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| 290 |
|
|
test_spr_limmed 0xffff,0xffff,iacc0l ; maxpos-(0*0)
|
| 291 |
|
|
test_spr_limmed 0x7fff,0xffff,iacc0h
|
| 292 |
|
|
smsss29:
|
| 293 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; not quite overflow (pos)
|
| 294 |
|
|
set_gr_limmed 0x8000,0x0000,gr8
|
| 295 |
|
|
set_spr_limmed 0x4000,0x0000,iacc0h
|
| 296 |
|
|
set_spr_limmed 0x7fff,0xffff,iacc0l
|
| 297 |
|
|
smsss gr7,gr8
|
| 298 |
|
|
test_gr_limmed 0x8000,0x0000,gr8
|
| 299 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
| 300 |
|
|
test_spr_limmed 0xffff,0xffff,iacc0l ; 400000007fffffff -
|
| 301 |
|
|
test_spr_limmed 0x7fff,0xffff,iacc0h ; 0x80000000*0x7fffffff
|
| 302 |
|
|
smsss30:
|
| 303 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; just barely overflow (pos)
|
| 304 |
|
|
set_gr_limmed 0x8000,0x0000,gr8
|
| 305 |
|
|
set_spr_limmed 0x4000,0x0000,iacc0h
|
| 306 |
|
|
set_spr_limmed 0x8000,0x0000,iacc0l
|
| 307 |
|
|
smsss gr7,gr8
|
| 308 |
|
|
test_gr_limmed 0x8000,0x0000,gr8
|
| 309 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
| 310 |
|
|
test_spr_limmed 0xffff,0xffff,iacc0l ; 4000000080000000 -
|
| 311 |
|
|
test_spr_limmed 0x7fff,0xffff,iacc0h ; 0x80000000*0x7fffffff
|
| 312 |
|
|
|
| 313 |
|
|
smsss31:
|
| 314 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; maximum overflow (pos)
|
| 315 |
|
|
set_gr_limmed 0x8000,0x0000,gr8
|
| 316 |
|
|
set_spr_limmed 0xffff,0xffff,iacc0l
|
| 317 |
|
|
set_spr_limmed 0x7fff,0xffff,iacc0h
|
| 318 |
|
|
smsss gr7,gr8
|
| 319 |
|
|
test_gr_limmed 0x8000,0x0000,gr8
|
| 320 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
| 321 |
|
|
test_spr_limmed 0xffff,0xffff,iacc0l ; 7fffffffffffffff -
|
| 322 |
|
|
test_spr_limmed 0x7fff,0xffff,iacc0h ; 80000000*80000000
|
| 323 |
|
|
smsss32:
|
| 324 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; not quite overflow (neg)
|
| 325 |
|
|
set_gr_limmed 0x7fff,0xffff,gr8
|
| 326 |
|
|
set_spr_immed 1,iacc0l
|
| 327 |
|
|
set_spr_limmed 0xbfff,0xffff,iacc0h
|
| 328 |
|
|
smsss gr7,gr8
|
| 329 |
|
|
test_gr_limmed 0x7fff,0xffff,gr8
|
| 330 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
| 331 |
|
|
test_spr_limmed 0x0000,0x0000,iacc0l ; bfffffff00000001 -
|
| 332 |
|
|
test_spr_limmed 0x8000,0x0000,iacc0h ; 0x7fffffff*0x7fffffff
|
| 333 |
|
|
smsss33:
|
| 334 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; just barely overflow (neg)
|
| 335 |
|
|
set_gr_limmed 0x7fff,0xffff,gr8
|
| 336 |
|
|
set_spr_immed 0,iacc0l
|
| 337 |
|
|
set_spr_limmed 0xbfff,0xffff,iacc0h
|
| 338 |
|
|
smsss gr7,gr8
|
| 339 |
|
|
test_gr_limmed 0x7fff,0xffff,gr8
|
| 340 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
| 341 |
|
|
test_spr_limmed 0x0000,0x0000,iacc0l ; 7fffffff*7fffffff+
|
| 342 |
|
|
test_spr_limmed 0x8000,0x0000,iacc0h ; bfffffff7fffffff
|
| 343 |
|
|
smsss34:
|
| 344 |
|
|
set_gr_limmed 0x7fff,0xffff,gr7 ; maximum overflow (neg)
|
| 345 |
|
|
set_gr_limmed 0x7fff,0xffff,gr8
|
| 346 |
|
|
set_spr_limmed 0x0000,0x0000,iacc0l
|
| 347 |
|
|
set_spr_limmed 0x8000,0x0000,iacc0h
|
| 348 |
|
|
smsss gr7,gr8
|
| 349 |
|
|
test_gr_limmed 0x7fff,0xffff,gr8
|
| 350 |
|
|
test_gr_limmed 0x7fff,0xffff,gr7
|
| 351 |
|
|
test_spr_limmed 0x0000,0x0000,iacc0l ; 8000000000000000-
|
| 352 |
|
|
test_spr_limmed 0x8000,0x0000,iacc0h ; 7fffffff*7fffffff+
|
| 353 |
|
|
|
| 354 |
|
|
pass
|
