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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [nfmadds.cgs] - Blame information for rev 842

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Line No. Rev Author Line
1 227 jeremybenn
# frv testcase for nfmadds $GRi,$GRj,$GRk
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# mach: frv
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# as(frv): -mcpu=frv
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        .include "testutils.inc"
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        float_constants
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        start
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        load_float_constants
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        .global nfmadds
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nfmadds:
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        set_fr_fr       fr16,fr1
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        nfmadds         fr16,fr4,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr8,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr12,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr16,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr20,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr24,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr28,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr32,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr36,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr40,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr44,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr16,fr48,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr4,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr8,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr12,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr16,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr20,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr24,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr28,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr32,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr36,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr40,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr44,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr20,fr48,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr0,fr1
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        test_fr_fr      fr1,fr0
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr4,fr1
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        test_fr_fr      fr1,fr4
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr8,fr1
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        test_fr_fr      fr1,fr8
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr12,fr1
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        test_fr_fr      fr1,fr12
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr16,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr20,fr1
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        test_fr_fr      fr1,fr16
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        test_fr_fr      fr1,fr20
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr24,fr1
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        test_fr_fr      fr1,fr24
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr28,fr1
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        test_fr_fr      fr1,fr28
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr32,fr1
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        test_fr_fr      fr1,fr32
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr36,fr1
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        test_fr_fr      fr1,fr36
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr40,fr1
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        test_fr_fr      fr1,fr40
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr44,fr1
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        test_fr_fr      fr1,fr44
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr48,fr1
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        test_fr_fr      fr1,fr48
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr16,fr1
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        nfmadds         fr28,fr52,fr1
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        test_fr_fr      fr1,fr52
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr36,fr1
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        nfmadds         fr28,fr8,fr1
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        test_fr_fr      fr1,fr32
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        nfmadds         fr8,fr28,fr1
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        test_fr_fr      fr1,fr28
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        set_fr_fr       fr36,fr1
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        nfmadds         fr32,fr36,fr1
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        test_fr_fr      fr1,fr44
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        test_spr_immed  0,fner1
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        test_spr_immed  0,fner0
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        ; TODO test cases to set ne flags
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        pass

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