OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [smulcc.cgs] - Blame information for rev 227

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# frv testcase for smulcc $GRi,$GRj,$GRk
2
# mach: all
3
 
4
        .include "testutils.inc"
5
 
6
        start
7
 
8
        .global smulcc
9
smulcc:
10
        ; Positive operands
11
        set_gr_immed    3,gr7           ; multiply small numbers
12
        set_gr_immed    2,gr8
13
        set_icc         0x0,0
14
        smulcc          gr7,gr8,gr8,icc0
15
        test_icc        0 0 0 0 icc0
16
        test_gr_immed   0,gr8
17
        test_gr_immed   6,gr9
18
 
19
        set_gr_immed    1,gr7           ; multiply by 1
20
        set_gr_immed    2,gr8
21
        set_icc         0x1,0
22
        smulcc          gr7,gr8,gr8,icc0
23
        test_icc        0 0 0 1 icc0
24
        test_gr_immed   0,gr8
25
        test_gr_immed   2,gr9
26
 
27
        set_gr_immed    2,gr7           ; multiply by 1
28
        set_gr_immed    1,gr8
29
        set_icc         0x2,0
30
        smulcc          gr7,gr8,gr8,icc0
31
        test_icc        0 0 1 0 icc0
32
        test_gr_immed   0,gr8
33
        test_gr_immed   2,gr9
34
 
35
        set_gr_immed    0,gr7           ; multiply by 0
36
        set_gr_immed    2,gr8
37
        set_icc         0xb,0
38
        smulcc          gr7,gr8,gr8,icc0
39
        test_icc        0 1 1 1 icc0
40
        test_gr_immed   0,gr8
41
        test_gr_immed   0,gr9
42
 
43
        set_gr_immed    2,gr7           ; multiply by 0
44
        set_gr_immed    0,gr8
45
        set_icc         0x8,0
46
        smulcc          gr7,gr8,gr8,icc0
47
        test_icc        0 1 0 0 icc0
48
        test_gr_immed   0,gr8
49
        test_gr_immed   0,gr9
50
 
51
        set_gr_limmed   0x3fff,0xffff,gr7       ; 31 bit result
52
        set_gr_immed    2,gr8
53
        set_icc         0xd,0
54
        smulcc          gr7,gr8,gr8,icc0
55
        test_icc        0 0 0 1 icc0
56
        test_gr_immed   0,gr8
57
        test_gr_limmed  0x7fff,0xfffe,gr9
58
 
59
        set_gr_limmed   0x4000,0x0000,gr7       ; 32 bit result
60
        set_gr_immed    2,gr8
61
        set_icc         0xe,0
62
        smulcc          gr7,gr8,gr8,icc0
63
        test_icc        0 0 1 0 icc0
64
        test_gr_immed   0,gr8
65
        test_gr_limmed  0x8000,0x0000,gr9
66
 
67
        set_gr_limmed   0x4000,0x0000,gr7       ; 33 bit result
68
        set_gr_immed    4,gr8
69
        set_icc         0xf,0
70
        smulcc          gr7,gr8,gr8,icc0
71
        test_icc        0 0 1 1 icc0
72
        test_gr_immed   1,gr8
73
        test_gr_limmed  0x0000,0x0000,gr9
74
 
75
        set_gr_limmed   0x7fff,0xffff,gr7       ; max positive result
76
        set_gr_limmed   0x7fff,0xffff,gr8
77
        set_icc         0xc,0
78
        smulcc          gr7,gr8,gr8,icc0
79
        test_icc        0 0 0 0 icc0
80
        test_gr_limmed  0x3fff,0xffff,gr8
81
        test_gr_immed   0x00000001,gr9
82
 
83
        ; Mixed operands
84
        set_gr_immed    -3,gr7          ; multiply small numbers
85
        set_gr_immed    2,gr8
86
        set_icc         0x5,0
87
        smulcc          gr7,gr8,gr8,icc0
88
        test_icc        1 0 0 1 icc0
89
        test_gr_immed   -1,gr8
90
        test_gr_immed   -6,gr9
91
 
92
        set_gr_immed    3,gr7           ; multiply small numbers
93
        set_gr_immed    -2,gr8
94
        set_icc         0x6,0
95
        smulcc          gr7,gr8,gr8,icc0
96
        test_icc        1 0 1 0 icc0
97
        test_gr_immed   -1,gr8
98
        test_gr_immed   -6,gr9
99
 
100
        set_gr_immed    1,gr7           ; multiply by 1
101
        set_gr_immed    -2,gr8
102
        set_icc         0x7,0
103
        smulcc          gr7,gr8,gr8,icc0
104
        test_icc        1 0 1 1 icc0
105
        test_gr_immed   -1,gr8
106
        test_gr_immed   -2,gr9
107
 
108
        set_gr_immed    -2,gr7          ; multiply by 1
109
        set_gr_immed    1,gr8
110
        set_icc         0x4,0
111
        smulcc          gr7,gr8,gr8,icc0
112
        test_icc        1 0 0 0 icc0
113
        test_gr_immed   -1,gr8
114
        test_gr_immed   -2,gr9
115
 
116
        set_gr_immed    0,gr7           ; multiply by 0
117
        set_gr_immed    -2,gr8
118
        set_icc         0x9,0
119
        smulcc          gr7,gr8,gr8,icc0
120
        test_icc        0 1 0 1 icc0
121
        test_gr_immed   0,gr8
122
        test_gr_immed   0,gr9
123
 
124
        set_gr_immed    -2,gr7          ; multiply by 0
125
        set_gr_immed    0,gr8
126
        set_icc         0xa,0
127
        smulcc          gr7,gr8,gr8,icc0
128
        test_icc        0 1 1 0 icc0
129
        test_gr_immed   0,gr8
130
        test_gr_immed   0,gr9
131
 
132
        set_gr_limmed   0x2000,0x0001,gr7       ; 31 bit result
133
        set_gr_immed    -2,gr8
134
        set_icc         0x7,0
135
        smulcc          gr7,gr8,gr8,icc0
136
        test_icc        1 0 1 1 icc0
137
        test_gr_limmed  0xffff,0xffff,gr8
138
        test_gr_limmed  0xbfff,0xfffe,gr9
139
 
140
        set_gr_limmed   0x4000,0x0000,gr7       ; 32 bit result
141
        set_gr_immed    -2,gr8
142
        set_icc         0x4,0
143
        smulcc          gr7,gr8,gr8,icc0
144
        test_icc        1 0 0 0 icc0
145
        test_gr_limmed  0xffff,0xffff,gr8
146
        test_gr_limmed  0x8000,0x0000,gr9
147
 
148
        set_gr_limmed   0x4000,0x0001,gr7       ; 32 bit result
149
        set_gr_immed    -2,gr8
150
        set_icc         0x5,0
151
        smulcc          gr7,gr8,gr8,icc0
152
        test_icc        1 0 0 1 icc0
153
        test_gr_limmed  0xffff,0xffff,gr8
154
        test_gr_limmed  0x7fff,0xfffe,gr9
155
 
156
        set_gr_limmed   0x4000,0x0000,gr7       ; 33 bit result
157
        set_gr_immed    -4,gr8
158
        set_icc         0x6,0
159
        smulcc          gr7,gr8,gr8,icc0
160
        test_icc        1 0 1 0 icc0
161
        test_gr_limmed  0xffff,0xffff,gr8
162
        test_gr_limmed  0x0000,0x0000,gr9
163
 
164
        set_gr_limmed   0x7fff,0xffff,gr7       ; max negative result
165
        set_gr_limmed   0x8000,0x0000,gr8
166
        set_icc         0x7,0
167
        smulcc          gr7,gr8,gr8,icc0
168
        test_icc        1 0 1 1 icc0
169
        test_gr_limmed  0xc000,0x0000,gr8
170
        test_gr_limmed  0x8000,0x0000,gr9
171
 
172
        ; Negative operands
173
        set_gr_immed    -3,gr7          ; multiply small numbers
174
        set_gr_immed    -2,gr8
175
        set_icc         0xc,0
176
        smulcc          gr7,gr8,gr8,icc0
177
        test_icc        0 0 0 0 icc0
178
        test_gr_immed   0,gr8
179
        test_gr_immed   6,gr9
180
 
181
        set_gr_immed    -1,gr7          ; multiply by 1
182
        set_gr_immed    -2,gr8
183
        set_icc         0xd,0
184
        smulcc          gr7,gr8,gr8,icc0
185
        test_icc        0 0 0 1 icc0
186
        test_gr_immed   0,gr8
187
        test_gr_immed   2,gr9
188
 
189
        set_gr_immed    -2,gr7          ; multiply by 1
190
        set_gr_immed    -1,gr8
191
        set_icc         0xe,0
192
        smulcc          gr7,gr8,gr8,icc0
193
        test_icc        0 0 1 0 icc0
194
        test_gr_immed   0,gr8
195
        test_gr_immed   2,gr9
196
 
197
        set_gr_limmed   0xc000,0x0001,gr7       ; 31 bit result
198
        set_gr_immed    -2,gr8
199
        set_icc         0xf,0
200
        smulcc          gr7,gr8,gr8,icc0
201
        test_icc        0 0 1 1 icc0
202
        test_gr_immed   0,gr8
203
        test_gr_limmed  0x7fff,0xfffe,gr9
204
 
205
        set_gr_limmed   0xc000,0x0000,gr7       ; 32 bit result
206
        set_gr_immed    -2,gr8
207
        set_icc         0xc,0
208
        smulcc          gr7,gr8,gr8,icc0
209
        test_icc        0 0 0 0 icc0
210
        test_gr_immed   0,gr8
211
        test_gr_limmed  0x8000,0x0000,gr9
212
 
213
        set_gr_limmed   0xc000,0x0000,gr7       ; 33 bit result
214
        set_gr_immed    -4,gr8
215
        set_icc         0xd,0
216
        smulcc          gr7,gr8,gr8,icc0
217
        test_icc        0 0 0 1 icc0
218
        test_gr_immed   1,gr8
219
        test_gr_immed   0x00000000,gr9
220
 
221
        set_gr_limmed   0x8000,0x0001,gr7       ; almost max positive result
222
        set_gr_limmed   0x8000,0x0001,gr8
223
        set_icc         0xe,0
224
        smulcc          gr7,gr8,gr8,icc0
225
        test_icc        0 0 1 0 icc0
226
        test_gr_limmed  0x3fff,0xffff,gr8
227
        test_gr_immed   0x00000001,gr9
228
 
229
 
230
        set_gr_limmed   0x8000,0x0000,gr7       ; max positive result
231
        set_gr_limmed   0x8000,0x0000,gr8
232
        set_icc         0xf,0
233
        smulcc          gr7,gr8,gr8,icc0
234
        test_icc        0 0 1 1 icc0
235
        test_gr_limmed  0x4000,0x0000,gr8
236
        test_gr_immed   0x00000000,gr9
237
 
238
        pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.