URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [h8300/] [biand.s] - Blame information for rev 856

Go to most recent revision | Details | Compare with Previous | View Log


# Hitachi H8 testcase 'biand', 'bior', 'bixor', 'bild', 'bist', 'bistz'
# mach(): all
# as(h8300):    --defsym sim_cpu=0
# as(h8300h):   --defsym sim_cpu=1
# as(h8300s):   --defsym sim_cpu=2
# as(h8sx):     --defsym sim_cpu=3
# ld(h8300h):   -m h8300helf
# ld(h8300s):   -m h8300self
# ld(h8sx):     -m h8300sxelf
 
        .include "testutils.inc"
 
        .data
byte_src:       .byte 0xa5
byte_dst:       .byte 0
 
        start
 
biand_imm3_reg8:
        set_grs_a5a5
        set_ccr_zero
        ;; biand xx:3, reg8
        biand   #6, r0l         ; this should NOT set the carry flag.
        test_cc_clear
        biand   #7, r0l         ; this should NOT set the carry flag.
        test_cc_clear
 
        orc     #1, ccr         ; set the carry flag
        biand   #6, r0l         ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        biand   #7, r0l         ; this should clear the carry flag
        test_cc_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
biand_imm3_ind:
        set_grs_a5a5
.if (sim_cpu == h8300)
        mov     #byte_src, r1
        set_ccr_zero
        ;; biand xx:3, ind
        biand   #6, @r1         ; this should NOT set the carry flag.
        test_cc_clear
        biand   #7, @r1         ; this should NOT set the carry flag.
        test_cc_clear
 
        orc     #1, ccr         ; set the carry flag
        biand   #6, @r1         ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        biand   #7, @r1         ; this should clear the carry flag
        test_cc_clear
;;;     test_h_gr16  byte_src r1        ;FIXME
.else
        mov     #byte_src, er1
        set_ccr_zero
        ;; biand xx:3, ind
        biand   #6, @er1        ; this should NOT set the carry flag.
        test_cc_clear
        biand   #7, @er1        ; this should NOT set the carry flag.
        test_cc_clear
 
        orc     #1, ccr         ; set the carry flag
        biand   #6, @er1        ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        biand   #7, @er1        ; this should clear the carry flag
        test_cc_clear
        test_h_gr32  byte_src er1
.endif                          ; h8300
        test_gr_a5a5 0           ; general registers should not be changed.
        test_gr_a5a5 2
        test_gr_a5a5 3
        test_gr_a5a5 4
        test_gr_a5a5 5
        test_gr_a5a5 6
        test_gr_a5a5 7
 
biand_imm3_abs8:
        set_grs_a5a5
        mov.b   r1l, @0x20
        set_ccr_zero
        ;; biand xx:3, aa:8
        biand   #6, @0x20:8     ; this should NOT set the carry flag.
        test_cc_clear
        biand   #7, @0x20:8     ; this should NOT set the carry flag.
        test_cc_clear
 
        orc     #1, ccr         ; set the carry flag
        biand   #6, @0x20:8     ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        biand   #7, @0x20:8     ; this should clear the carry flag
        test_cc_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
.if (sim_cpu > h8300h)
biand_imm3_abs16:
        set_grs_a5a5
        set_ccr_zero
        ;; biand xx:3, aa:16
        biand   #6, @byte_src:16        ; this should NOT set the carry flag.
        test_cc_clear
        biand   #7, @byte_src:16        ; this should NOT set the carry flag.
        test_cc_clear
 
        orc     #1, ccr                 ; set the carry flag
        biand   #6, @byte_src:16        ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        biand   #7, @byte_src:16        ; this should clear the carry flag
        test_cc_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
biand_imm3_abs32:
        set_grs_a5a5
        set_ccr_zero
        ;; biand xx:3, aa:32
        biand   #6, @byte_src:32        ; this should NOT set the carry flag.
        test_cc_clear
        biand   #7, @byte_src:32        ; this should NOT set the carry flag.
        test_cc_clear
 
        orc     #1, ccr                 ; set the carry flag
        biand   #6, @byte_src:32        ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        biand   #7, @byte_src:32        ; this should clear the carry flag
        test_cc_clear
 
        test_grs_a5a5           ; general registers should not be changed.
.endif
 
bior_imm3_reg8:
        set_grs_a5a5
        set_ccr_zero
        ;; bior xx:3, reg8
        bior    #7, r0l         ; this should NOT set the carry flag.
        test_cc_clear
 
        bior    #6, r0l         ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        orc     #1, ccr         ; set the carry flag
        bior    #6, r0l         ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        bior    #7, r0l         ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
bior_imm3_abs8:
        set_grs_a5a5
        mov.b   r1l, @0x20
        set_ccr_zero
        ;; bior xx:3, aa:8
        bior    #7, @0x20:8     ; this should NOT set the carry flag.
        test_cc_clear
        bior    #6, @0x20:8     ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        orc     #1, ccr         ; set the carry flag
        bior    #6, @0x20:8     ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        bior    #7, @0x20:8     ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
bixor_imm3_reg8:
        set_grs_a5a5
        set_ccr_zero
        ;; bixor xx:3, reg8
        bixor   #7, r0l         ; this should NOT set the carry flag.
        test_cc_clear
 
        bixor   #6, r0l         ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        orc     #1, ccr         ; set the carry flag
        bixor   #7, r0l         ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        bixor   #6, r0l         ; this should clear the carry flag
        test_cc_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
bixor_imm3_abs8:
        set_grs_a5a5
        mov.b   r1l, @0x20
        set_ccr_zero
        ;; bixor xx:3, aa:8
        bixor   #7, @0x20:8     ; this should NOT set the carry flag.
        test_cc_clear
        bixor   #6, @0x20:8     ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        orc     #1, ccr         ; set the carry flag
        bixor   #7, @0x20:8     ; this should NOT clear the carry flag
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        bixor   #6, @0x20:8     ; this should clear the carry flag
        test_cc_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
bild_imm3_reg8:
        set_grs_a5a5
        set_ccr_zero
        ;; bild xx:3, reg8
        bild    #7, r0l         ; this should NOT set the carry flag.
        test_cc_clear
        bild    #6, r0l         ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
bild_imm3_ind:
        set_grs_a5a5
.if (sim_cpu == h8300)
        mov     #byte_src, r1
        set_ccr_zero
        ;; bild xx:3, ind
        bild    #7, @r1         ; this should NOT set the carry flag.
        test_cc_clear
        bild    #6, @r1         ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
;;;     test_h_gr16  byte_src r1        ;FIXME
.else
        mov     #byte_src, er1
        set_ccr_zero
        ;; bild xx:3, ind
        bild    #7, @er1        ; this should NOT set the carry flag.
        test_cc_clear
        bild    #6, @er1        ; this should NOT set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        test_h_gr32  byte_src er1
.endif                          ; h8300
        test_gr_a5a5 0           ; general registers should not be changed.
        test_gr_a5a5 2
        test_gr_a5a5 3
        test_gr_a5a5 4
        test_gr_a5a5 5
        test_gr_a5a5 6
        test_gr_a5a5 7
 
bild_imm3_abs8:
        set_grs_a5a5
        mov.b   r1l, @0x20
        set_ccr_zero
        ;; bild xx:3, aa:8
        bild    #7, @0x20:8     ; this should NOT set the carry flag.
        test_cc_clear
        bild    #6, @0x20:8     ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
.if (sim_cpu > h8300h)
bild_imm3_abs16:
        set_grs_a5a5
        set_ccr_zero
        ;; bild xx:3, aa:16
        bild    #7, @byte_src:16        ; this should NOT set the carry flag.
        test_cc_clear
        bild    #6, @byte_src:16        ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        test_grs_a5a5           ; general registers should not be changed.
 
bild_imm3_abs32:
        set_grs_a5a5
        set_ccr_zero
        ;; bild xx:3, aa:32
        bild    #7, @byte_src:32        ; this should NOT set the carry flag.
        test_cc_clear
        bild    #6, @byte_src:32        ; this should set the carry flag.
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
 
        test_grs_a5a5           ; general registers should not be changed.
.endif
 
bist_imm3_reg8:
        set_grs_a5a5
        set_ccr_zero
        ;; bist xx:3, reg8
        bist    #6, r0l         ; this should set bit 6
        test_cc_clear
        test_h_gr16 0xa5e5 r0
 
        set_ccr_zero
        orc     #1, ccr         ; set the carry flag
        bist    #7, r0l         ; this should clear bit 7
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        test_h_gr16 0xa565 r0
 
        test_gr_a5a5 1          ; Rest of general regs should not be changed.
        test_gr_a5a5 2
        test_gr_a5a5 3
        test_gr_a5a5 4
        test_gr_a5a5 5
        test_gr_a5a5 6
        test_gr_a5a5 7
 
bist_imm3_abs8:
        set_grs_a5a5
        mov.b   r1l, @0x20
        set_ccr_zero
        ;; bist xx:3, aa:8
        bist    #6, @0x20:8     ; this should set bit 6
        test_cc_clear
        mov.b   @0x20, r0l
        test_h_gr16 0xa5e5 r0
 
        set_ccr_zero
        orc     #1, ccr         ; set the carry flag
        bist    #7, @0x20:8     ; this should clear bit 7
        test_carry_set
        test_ovf_clear
        test_neg_clear
        test_zero_clear
        mov.b   @0x20, r0l
        test_h_gr16 0xa565 r0
 
        test_gr_a5a5 1          ; general registers should not be changed.
        test_gr_a5a5 2
        test_gr_a5a5 3
        test_gr_a5a5 4
        test_gr_a5a5 5
        test_gr_a5a5 6
        test_gr_a5a5 7
 
.if (sim_cpu == h8sx)
bistz_imm3_abs8:
        set_grs_a5a5
        mov.b   r1l, @0x20
        set_ccr_zero
        ;; bistz xx:3, aa:8
        bistz   #6, @0x20:8     ; this should set bit 6
        test_cc_clear
        mov.b   @0x20, r0l
        test_h_gr16 0xa5e5 r0
 
        set_ccr_zero
        orc     #4, ccr         ; set the zero flag
        bistz   #7, @0x20:8     ; this should clear bit 7
        test_carry_clear
        test_ovf_clear
        test_neg_clear
        test_zero_set
        mov.b   @0x20, r0l
        test_h_gr16 0xa565 r0
 
        test_gr_a5a5 1          ; general registers should not be changed.
        test_gr_a5a5 2
        test_gr_a5a5 3
        test_gr_a5a5 4
        test_gr_a5a5 5
        test_gr_a5a5 6
        test_gr_a5a5 7
.endif                          ; h8sx
 
bnot_imm3_reg8:
        set_grs_a5a5
        set_ccr_zero
        ;; bnot xx:3, reg8
        bnot    #7, r0l
        test_cc_clear
        test_h_gr16 0xa525 r0
        set_ccr_zero
        bnot    #6, r0l
        test_cc_clear
        test_h_gr16 0xa565 r0
        set_ccr_zero
        bnot    #5, r0l
        test_cc_clear
        test_h_gr16 0xa545 r0
        set_ccr_zero
        bnot    #4, r0l
        test_cc_clear
        test_h_gr16 0xa555 r0
        set_ccr_zero
 
        bnot    #4, r0l
        bnot    #5, r0l
        bnot    #6, r0l
        bnot    #7, r0l
        test_cc_clear
        test_grs_a5a5           ; general registers should not be changed.
 
bnot_imm3_abs8:
        set_grs_a5a5
        mov.b   r1l, @0x20
        set_ccr_zero
        ;; bnot xx:3, aa:8
        bnot    #7, @0x20:8
        bnot    #6, @0x20:8
        bnot    #5, @0x20:8
        bnot    #4, @0x20:8
        test_cc_clear
        test_grs_a5a5
        mov     @0x20, r0l
        test_h_gr16 0xa555 r0
 
        pass
        exit 0

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [h8300/] [biand.s] - Blame information for rev 856

Line No.	Rev	Author	Line
1	227	jeremybenn	`# Hitachi H8 testcase 'biand', 'bior', 'bixor', 'bild', 'bist', 'bistz'`
2			`# mach(): all`
3			`# as(h8300): --defsym sim_cpu=0`
4			`# as(h8300h): --defsym sim_cpu=1`
5			`# as(h8300s): --defsym sim_cpu=2`
6			`# as(h8sx): --defsym sim_cpu=3`
7			`# ld(h8300h): -m h8300helf`
8			`# ld(h8300s): -m h8300self`
9			`# ld(h8sx): -m h8300sxelf`
10
11			`.include "testutils.inc"`
12
13			`.data`
14			`byte_src: .byte 0xa5`
15			`byte_dst: .byte 0`
16
17			`start`
18
19			`biand_imm3_reg8:`
20			`set_grs_a5a5`
21			`set_ccr_zero`
22			`;; biand xx:3, reg8`
23			`biand #6, r0l ; this should NOT set the carry flag.`
24			`test_cc_clear`
25			`biand #7, r0l ; this should NOT set the carry flag.`
26			`test_cc_clear`
27
28			`orc #1, ccr ; set the carry flag`
29			`biand #6, r0l ; this should NOT clear the carry flag`
30			`test_carry_set`
31			`test_ovf_clear`
32			`test_neg_clear`
33			`test_zero_clear`
34			`biand #7, r0l ; this should clear the carry flag`
35			`test_cc_clear`
36
37			`test_grs_a5a5 ; general registers should not be changed.`
38
39			`biand_imm3_ind:`
40			`set_grs_a5a5`
41			`.if (sim_cpu == h8300)`
42			`mov #byte_src, r1`
43			`set_ccr_zero`
44			`;; biand xx:3, ind`
45			`biand #6, @r1 ; this should NOT set the carry flag.`
46			`test_cc_clear`
47			`biand #7, @r1 ; this should NOT set the carry flag.`
48			`test_cc_clear`
49
50			`orc #1, ccr ; set the carry flag`
51			`biand #6, @r1 ; this should NOT clear the carry flag`
52			`test_carry_set`
53			`test_ovf_clear`
54			`test_neg_clear`
55			`test_zero_clear`
56			`biand #7, @r1 ; this should clear the carry flag`
57			`test_cc_clear`
58			`;;; test_h_gr16 byte_src r1 ;FIXME`
59			`.else`
60			`mov #byte_src, er1`
61			`set_ccr_zero`
62			`;; biand xx:3, ind`
63			`biand #6, @er1 ; this should NOT set the carry flag.`
64			`test_cc_clear`
65			`biand #7, @er1 ; this should NOT set the carry flag.`
66			`test_cc_clear`
67
68			`orc #1, ccr ; set the carry flag`
69			`biand #6, @er1 ; this should NOT clear the carry flag`
70			`test_carry_set`
71			`test_ovf_clear`
72			`test_neg_clear`
73			`test_zero_clear`
74			`biand #7, @er1 ; this should clear the carry flag`
75			`test_cc_clear`
76			`test_h_gr32 byte_src er1`
77			`.endif ; h8300`
78			`test_gr_a5a5 0 ; general registers should not be changed.`
79			`test_gr_a5a5 2`
80			`test_gr_a5a5 3`
81			`test_gr_a5a5 4`
82			`test_gr_a5a5 5`
83			`test_gr_a5a5 6`
84			`test_gr_a5a5 7`
85
86			`biand_imm3_abs8:`
87			`set_grs_a5a5`
88			`mov.b r1l, @0x20`
89			`set_ccr_zero`
90			`;; biand xx:3, aa:8`
91			`biand #6, @0x20:8 ; this should NOT set the carry flag.`
92			`test_cc_clear`
93			`biand #7, @0x20:8 ; this should NOT set the carry flag.`
94			`test_cc_clear`
95
96			`orc #1, ccr ; set the carry flag`
97			`biand #6, @0x20:8 ; this should NOT clear the carry flag`
98			`test_carry_set`
99			`test_ovf_clear`
100			`test_neg_clear`
101			`test_zero_clear`
102			`biand #7, @0x20:8 ; this should clear the carry flag`
103			`test_cc_clear`
104
105			`test_grs_a5a5 ; general registers should not be changed.`
106
107			`.if (sim_cpu > h8300h)`
108			`biand_imm3_abs16:`
109			`set_grs_a5a5`
110			`set_ccr_zero`
111			`;; biand xx:3, aa:16`
112			`biand #6, @byte_src:16 ; this should NOT set the carry flag.`
113			`test_cc_clear`
114			`biand #7, @byte_src:16 ; this should NOT set the carry flag.`
115			`test_cc_clear`
116
117			`orc #1, ccr ; set the carry flag`
118			`biand #6, @byte_src:16 ; this should NOT clear the carry flag`
119			`test_carry_set`
120			`test_ovf_clear`
121			`test_neg_clear`
122			`test_zero_clear`
123			`biand #7, @byte_src:16 ; this should clear the carry flag`
124			`test_cc_clear`
125
126			`test_grs_a5a5 ; general registers should not be changed.`
127
128			`biand_imm3_abs32:`
129			`set_grs_a5a5`
130			`set_ccr_zero`
131			`;; biand xx:3, aa:32`
132			`biand #6, @byte_src:32 ; this should NOT set the carry flag.`
133			`test_cc_clear`
134			`biand #7, @byte_src:32 ; this should NOT set the carry flag.`
135			`test_cc_clear`
136
137			`orc #1, ccr ; set the carry flag`
138			`biand #6, @byte_src:32 ; this should NOT clear the carry flag`
139			`test_carry_set`
140			`test_ovf_clear`
141			`test_neg_clear`
142			`test_zero_clear`
143			`biand #7, @byte_src:32 ; this should clear the carry flag`
144			`test_cc_clear`
145
146			`test_grs_a5a5 ; general registers should not be changed.`
147			`.endif`
148
149			`bior_imm3_reg8:`
150			`set_grs_a5a5`
151			`set_ccr_zero`
152			`;; bior xx:3, reg8`
153			`bior #7, r0l ; this should NOT set the carry flag.`
154			`test_cc_clear`
155
156			`bior #6, r0l ; this should set the carry flag.`
157			`test_carry_set`
158			`test_ovf_clear`
159			`test_neg_clear`
160			`test_zero_clear`
161
162			`orc #1, ccr ; set the carry flag`
163			`bior #6, r0l ; this should NOT clear the carry flag`
164			`test_carry_set`
165			`test_ovf_clear`
166			`test_neg_clear`
167			`test_zero_clear`
168			`bior #7, r0l ; this should NOT clear the carry flag`
169			`test_carry_set`
170			`test_ovf_clear`
171			`test_neg_clear`
172			`test_zero_clear`
173
174			`test_grs_a5a5 ; general registers should not be changed.`
175
176			`bior_imm3_abs8:`
177			`set_grs_a5a5`
178			`mov.b r1l, @0x20`
179			`set_ccr_zero`
180			`;; bior xx:3, aa:8`
181			`bior #7, @0x20:8 ; this should NOT set the carry flag.`
182			`test_cc_clear`
183			`bior #6, @0x20:8 ; this should set the carry flag.`
184			`test_carry_set`
185			`test_ovf_clear`
186			`test_neg_clear`
187			`test_zero_clear`
188
189			`orc #1, ccr ; set the carry flag`
190			`bior #6, @0x20:8 ; this should NOT clear the carry flag`
191			`test_carry_set`
192			`test_ovf_clear`
193			`test_neg_clear`
194			`test_zero_clear`
195			`bior #7, @0x20:8 ; this should NOT clear the carry flag`
196			`test_carry_set`
197			`test_ovf_clear`
198			`test_neg_clear`
199			`test_zero_clear`
200
201			`test_grs_a5a5 ; general registers should not be changed.`
202
203			`bixor_imm3_reg8:`
204			`set_grs_a5a5`
205			`set_ccr_zero`
206			`;; bixor xx:3, reg8`
207			`bixor #7, r0l ; this should NOT set the carry flag.`
208			`test_cc_clear`
209
210			`bixor #6, r0l ; this should set the carry flag.`
211			`test_carry_set`
212			`test_ovf_clear`
213			`test_neg_clear`
214			`test_zero_clear`
215
216			`orc #1, ccr ; set the carry flag`
217			`bixor #7, r0l ; this should NOT clear the carry flag`
218			`test_carry_set`
219			`test_ovf_clear`
220			`test_neg_clear`
221			`test_zero_clear`
222
223			`bixor #6, r0l ; this should clear the carry flag`
224			`test_cc_clear`
225
226			`test_grs_a5a5 ; general registers should not be changed.`
227
228			`bixor_imm3_abs8:`
229			`set_grs_a5a5`
230			`mov.b r1l, @0x20`
231			`set_ccr_zero`
232			`;; bixor xx:3, aa:8`
233			`bixor #7, @0x20:8 ; this should NOT set the carry flag.`
234			`test_cc_clear`
235			`bixor #6, @0x20:8 ; this should set the carry flag.`
236			`test_carry_set`
237			`test_ovf_clear`
238			`test_neg_clear`
239			`test_zero_clear`
240
241			`orc #1, ccr ; set the carry flag`
242			`bixor #7, @0x20:8 ; this should NOT clear the carry flag`
243			`test_carry_set`
244			`test_ovf_clear`
245			`test_neg_clear`
246			`test_zero_clear`
247
248			`bixor #6, @0x20:8 ; this should clear the carry flag`
249			`test_cc_clear`
250
251			`test_grs_a5a5 ; general registers should not be changed.`
252
253			`bild_imm3_reg8:`
254			`set_grs_a5a5`
255			`set_ccr_zero`
256			`;; bild xx:3, reg8`
257			`bild #7, r0l ; this should NOT set the carry flag.`
258			`test_cc_clear`
259			`bild #6, r0l ; this should set the carry flag.`
260			`test_carry_set`
261			`test_ovf_clear`
262			`test_neg_clear`
263			`test_zero_clear`
264
265			`test_grs_a5a5 ; general registers should not be changed.`
266
267			`bild_imm3_ind:`
268			`set_grs_a5a5`
269			`.if (sim_cpu == h8300)`
270			`mov #byte_src, r1`
271			`set_ccr_zero`
272			`;; bild xx:3, ind`
273			`bild #7, @r1 ; this should NOT set the carry flag.`
274			`test_cc_clear`
275			`bild #6, @r1 ; this should set the carry flag.`
276			`test_carry_set`
277			`test_ovf_clear`
278			`test_neg_clear`
279			`test_zero_clear`
280			`;;; test_h_gr16 byte_src r1 ;FIXME`
281			`.else`
282			`mov #byte_src, er1`
283			`set_ccr_zero`
284			`;; bild xx:3, ind`
285			`bild #7, @er1 ; this should NOT set the carry flag.`
286			`test_cc_clear`
287			`bild #6, @er1 ; this should NOT set the carry flag.`
288			`test_carry_set`
289			`test_ovf_clear`
290			`test_neg_clear`
291			`test_zero_clear`
292			`test_h_gr32 byte_src er1`
293			`.endif ; h8300`
294			`test_gr_a5a5 0 ; general registers should not be changed.`
295			`test_gr_a5a5 2`
296			`test_gr_a5a5 3`
297			`test_gr_a5a5 4`
298			`test_gr_a5a5 5`
299			`test_gr_a5a5 6`
300			`test_gr_a5a5 7`
301
302			`bild_imm3_abs8:`
303			`set_grs_a5a5`
304			`mov.b r1l, @0x20`
305			`set_ccr_zero`
306			`;; bild xx:3, aa:8`
307			`bild #7, @0x20:8 ; this should NOT set the carry flag.`
308			`test_cc_clear`
309			`bild #6, @0x20:8 ; this should set the carry flag.`
310			`test_carry_set`
311			`test_ovf_clear`
312			`test_neg_clear`
313			`test_zero_clear`
314
315			`test_grs_a5a5 ; general registers should not be changed.`
316
317			`.if (sim_cpu > h8300h)`
318			`bild_imm3_abs16:`
319			`set_grs_a5a5`
320			`set_ccr_zero`
321			`;; bild xx:3, aa:16`
322			`bild #7, @byte_src:16 ; this should NOT set the carry flag.`
323			`test_cc_clear`
324			`bild #6, @byte_src:16 ; this should set the carry flag.`
325			`test_carry_set`
326			`test_ovf_clear`
327			`test_neg_clear`
328			`test_zero_clear`
329
330			`test_grs_a5a5 ; general registers should not be changed.`
331
332			`bild_imm3_abs32:`
333			`set_grs_a5a5`
334			`set_ccr_zero`
335			`;; bild xx:3, aa:32`
336			`bild #7, @byte_src:32 ; this should NOT set the carry flag.`
337			`test_cc_clear`
338			`bild #6, @byte_src:32 ; this should set the carry flag.`
339			`test_carry_set`
340			`test_ovf_clear`
341			`test_neg_clear`
342			`test_zero_clear`
343
344			`test_grs_a5a5 ; general registers should not be changed.`
345			`.endif`
346
347			`bist_imm3_reg8:`
348			`set_grs_a5a5`
349			`set_ccr_zero`
350			`;; bist xx:3, reg8`
351			`bist #6, r0l ; this should set bit 6`
352			`test_cc_clear`
353			`test_h_gr16 0xa5e5 r0`
354
355			`set_ccr_zero`
356			`orc #1, ccr ; set the carry flag`
357			`bist #7, r0l ; this should clear bit 7`
358			`test_carry_set`
359			`test_ovf_clear`
360			`test_neg_clear`
361			`test_zero_clear`
362			`test_h_gr16 0xa565 r0`
363
364			`test_gr_a5a5 1 ; Rest of general regs should not be changed.`
365			`test_gr_a5a5 2`
366			`test_gr_a5a5 3`
367			`test_gr_a5a5 4`
368			`test_gr_a5a5 5`
369			`test_gr_a5a5 6`
370			`test_gr_a5a5 7`
371
372			`bist_imm3_abs8:`
373			`set_grs_a5a5`
374			`mov.b r1l, @0x20`
375			`set_ccr_zero`
376			`;; bist xx:3, aa:8`
377			`bist #6, @0x20:8 ; this should set bit 6`
378			`test_cc_clear`
379			`mov.b @0x20, r0l`
380			`test_h_gr16 0xa5e5 r0`
381
382			`set_ccr_zero`
383			`orc #1, ccr ; set the carry flag`
384			`bist #7, @0x20:8 ; this should clear bit 7`
385			`test_carry_set`
386			`test_ovf_clear`
387			`test_neg_clear`
388			`test_zero_clear`
389			`mov.b @0x20, r0l`
390			`test_h_gr16 0xa565 r0`
391
392			`test_gr_a5a5 1 ; general registers should not be changed.`
393			`test_gr_a5a5 2`
394			`test_gr_a5a5 3`
395			`test_gr_a5a5 4`
396			`test_gr_a5a5 5`
397			`test_gr_a5a5 6`
398			`test_gr_a5a5 7`
399
400			`.if (sim_cpu == h8sx)`
401			`bistz_imm3_abs8:`
402			`set_grs_a5a5`
403			`mov.b r1l, @0x20`
404			`set_ccr_zero`
405			`;; bistz xx:3, aa:8`
406			`bistz #6, @0x20:8 ; this should set bit 6`
407			`test_cc_clear`
408			`mov.b @0x20, r0l`
409			`test_h_gr16 0xa5e5 r0`
410
411			`set_ccr_zero`
412			`orc #4, ccr ; set the zero flag`
413			`bistz #7, @0x20:8 ; this should clear bit 7`
414			`test_carry_clear`
415			`test_ovf_clear`
416			`test_neg_clear`
417			`test_zero_set`
418			`mov.b @0x20, r0l`
419			`test_h_gr16 0xa565 r0`
420
421			`test_gr_a5a5 1 ; general registers should not be changed.`
422			`test_gr_a5a5 2`
423			`test_gr_a5a5 3`
424			`test_gr_a5a5 4`
425			`test_gr_a5a5 5`
426			`test_gr_a5a5 6`
427			`test_gr_a5a5 7`
428			`.endif ; h8sx`
429
430			`bnot_imm3_reg8:`
431			`set_grs_a5a5`
432			`set_ccr_zero`
433			`;; bnot xx:3, reg8`
434			`bnot #7, r0l`
435			`test_cc_clear`
436			`test_h_gr16 0xa525 r0`
437			`set_ccr_zero`
438			`bnot #6, r0l`
439			`test_cc_clear`
440			`test_h_gr16 0xa565 r0`
441			`set_ccr_zero`
442			`bnot #5, r0l`
443			`test_cc_clear`
444			`test_h_gr16 0xa545 r0`
445			`set_ccr_zero`
446			`bnot #4, r0l`
447			`test_cc_clear`
448			`test_h_gr16 0xa555 r0`
449			`set_ccr_zero`
450
451			`bnot #4, r0l`
452			`bnot #5, r0l`
453			`bnot #6, r0l`
454			`bnot #7, r0l`
455			`test_cc_clear`
456			`test_grs_a5a5 ; general registers should not be changed.`
457
458			`bnot_imm3_abs8:`
459			`set_grs_a5a5`
460			`mov.b r1l, @0x20`
461			`set_ccr_zero`
462			`;; bnot xx:3, aa:8`
463			`bnot #7, @0x20:8`
464			`bnot #6, @0x20:8`
465			`bnot #5, @0x20:8`
466			`bnot #4, @0x20:8`
467			`test_cc_clear`
468			`test_grs_a5a5`
469			`mov @0x20, r0l`
470			`test_h_gr16 0xa555 r0`
471
472			`pass`
473			`exit 0`