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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [h8300/] [nop.s] - Blame information for rev 833

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# Hitachi H8 testcase 'nop'
# mach(): all
# as(h8300):    --defsym sim_cpu=0
# as(h8300h):   --defsym sim_cpu=1
# as(h8300s):   --defsym sim_cpu=2
# as(h8sx):     --defsym sim_cpu=3
# ld(h8300h):   -m h8300helf
# ld(h8300s):   -m h8300self
# ld(h8sx):     -m h8300sxelf
 
        .include "testutils.inc"
 
        start
 
nop:    set_grs_a5a5
        set_ccr_zero
 
        nop
 
        test_cc_clear
        test_grs_a5a5
 
 
        pass
 
        exit 0

Line No.	Rev	Author	Line
1	227	jeremybenn	`# Hitachi H8 testcase 'nop'`
2			`# mach(): all`
3			`# as(h8300): --defsym sim_cpu=0`
4			`# as(h8300h): --defsym sim_cpu=1`
5			`# as(h8300s): --defsym sim_cpu=2`
6			`# as(h8sx): --defsym sim_cpu=3`
7			`# ld(h8300h): -m h8300helf`
8			`# ld(h8300s): -m h8300self`
9			`# ld(h8sx): -m h8300sxelf`
10
11			`.include "testutils.inc"`
12
13			`start`
14
15			`nop: set_grs_a5a5`
16			`set_ccr_zero`
17
18			`nop`
19
20			`test_cc_clear`
21			`test_grs_a5a5`
22
23
24			`pass`
25
26			`exit 0`

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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [h8300/] [nop.s] - Blame information for rev 833