OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [m32r/] [bnc24.cgs] - Blame information for rev 816

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# m32r testcase for bnc $disp24
2
# mach(): m32r m32rx
3
 
4
        .include "testutils.inc"
5
 
6
        start
7
 
8
        .global bnc24
9
bnc24:
10
        mvi_h_condbit 0
11
        bnc.l test0pass
12
 
13
test1fail:
14
        fail
15
test0pass:
16
 
17
        mvi_h_condbit 1
18
        bnc.l test1fail
19
 
20
        pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.